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1. 发明授权

US10866146B2 Sensor circuit, corresponding system and method 有权
公开(公告)号：US10866146B2
公开(公告)日：2020-12-15
申请号：US16356128
申请日：2019-03-18
申请人： STMicroelectronics S.r.l.
发明人： Calogero Marco Ippolito , Michele Vaiana
IPC分类号： H03M3/00 , G05F3/26 , G01K7/01
CPC分类号： G01K7/01 , G05F3/265 , H03M3/324 , H03M3/458
摘要： A circuit includes a first current source configured to produce a first current in a first current line through a first diode-connected transistor having a voltage drop across the first diode-connected transistor, the first current being proportional to an absolute temperature via a first proportionality factor; a second current source configured to produce a second current in a second current line through a second diode-connected transistor having a voltage drop across the second diode-connected transistor, the second current being proportional to the absolute temperature via a second proportionality factor; a third current source configured to produce a third current in a third current line through a third diode-connected transistor having a voltage drop across the third diode-connected transistor; and a processing network including a sigma-delta analog-to-digital converter, the processing network being coupled to the, the second, and the third diode-connected transistors.

2. 发明授权

US09350380B2 Sigma-delta modulator and analog-to-digital converter 有权
标题翻译： Σ-Δ调制器和模数转换器
公开(公告)号：US09350380B2
公开(公告)日：2016-05-24
申请号：US14425095
申请日：2013-02-28
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Lan Chen
IPC分类号： H03M3/00 , H03M1/00
CPC分类号： H03M3/324 , H03M1/002 , H03M3/38 , H03M3/424 , H03M3/438 , H03M3/50
摘要： A Sigma-Delta modulator and an analog-to-digital converter. The Sigma-Delta modulator comprises a quantizer, a correction module and an RC integrator. The correction module comprises a predetermined resistance through which a correction level is generated. The correction module is used to compare the correction level with a predetermined reference voltage by using a comparator in the quantizer, so as to generate a digital correction signal, based on which the resistance in a resistance correction array in the RC integrator is corrected. The predetermined resistance is of the same type as the resistance in the resistance correction array in the RC integrator. The Sigma-Delta modulator and the analog-to-digital converter can correct the resistance deviation in the RC integrator.
摘要翻译： Σ-Δ调制器和模数转换器。 Sigma-Delta调制器包括量化器，校正模块和RC积分器。校正模块包括产生校正水平的预定电阻。校正模块用于通过使用量化器中的比较器将校正电平与预定参考电压进行比较，以产生数字校正信号，基于该校正信号校正RC积分器中的电阻校正阵列中的电阻。预定电阻与RC积分器中的电阻校正阵列中的电阻相同。 Sigma-Delta调制器和模数转换器可以校正RC积分器中的电阻偏差。

3. 发明授权

US08593319B2 Image sensors and image processing systems 有权
标题翻译：图像传感器和图像处理系统
公开(公告)号：US08593319B2
公开(公告)日：2013-11-26
申请号：US13611451
申请日：2012-09-12
申请人： Min-Ho Kwon , Seog-Heon Ham , Jeong-Jin Roh , Jae-Jin Yeo , Yong-Suk Choi , Gun-Hee Han
发明人： Min-Ho Kwon , Seog-Heon Ham , Jeong-Jin Roh , Jae-Jin Yeo , Yong-Suk Choi , Gun-Hee Han
IPC分类号： H03M3/00
CPC分类号： H04N5/3698 , H03M3/324 , H03M3/368 , H03M3/43 , H03M3/452 , H04N5/374 , H04N5/378
摘要： An image sensor includes a delta-sigma analog-to-digital converter (ADC) including a delta-sigma modulator (DSM) and a voltage adjusting circuit. The DSM is configured to perform delta-sigma modulation on an analog signal from a unit pixel. The delta-sigma ADC is configured to convert the analog signal to a digital signal. The voltage adjusting circuit includes a replica inverter having a same configuration as at least one inverter included in the DSM. The voltage adjusting circuit is configured to adjust a power supply voltage and an input voltage provided to the at least one inverter based on a current flowing in the replica inverter.
摘要翻译：图像传感器包括包括Δ-Σ调制器（DSM）和电压调节电路的Δ-Σ模数转换器（ADC）。 DSM被配置为对来自单位像素的模拟信号执行Δ-Σ调制。 Δ-ΣADC配置为将模拟信号转换为数字信号。电压调整电路包括具有与DSM中包括的至少一个反相器相同配置的复制反相器。电压调整电路被配置为基于在复制逆变器中流动的电流来调整提供给至少一个逆变器的电源电压和输入电压。

4. 发明申请

US20060092063A1 PWM driver and class D amplifier using same 有权
标题翻译： PWM驱动器和D类放大器使用相同
公开(公告)号：US20060092063A1
公开(公告)日：2006-05-04
申请号：US11263453
申请日：2005-10-31
申请人： Toru Ido , Soichiro Ishizuka
发明人： Toru Ido , Soichiro Ishizuka
IPC分类号： H03M1/66
CPC分类号： H03F3/217 , H03F2200/331 , H03M3/324 , H03M3/432 , H03M3/456 , H03M3/50
摘要： The objective of the invention is to provide a class D amplifier that can reduce aliasing noise. The class D amplifier has D/A converter 10 that operates at the first sampling frequency, and PWM driver 3 that receives the output from D/A converter 10. Said PWM driver 3 operates at the second sampling frequency synchronized to the first sampling frequency. The second sampling frequency can be correlated to the delta wave frequency of the PWM driver. Also, synchronization of said first sampling frequency and said second sampling frequency can be carried out with one of said frequencies being an integer multiple of the other.
摘要翻译：本发明的目的是提供一种可以减少混叠噪声的D类放大器。 D类放大器具有以第一采样频率工作的D / A转换器10和接收D / A转换器10的输出的PWM驱动器3。所述PWM驱动器3以与第一采样频率同步的第二采样频率工作。第二采样频率可以与PWM驱动器的增量波频率相关。此外，所述第一采样频率和所述第二采样频率的同步可以执行，其中一个频率是另一个的整数倍。

5. 发明申请

US20040257091A1 Fast, high-resolution, indirect measurement of a physical value 有权
标题翻译：快速，高分辨率，间接测量物理价值
公开(公告)号：US20040257091A1
公开(公告)日：2004-12-23
申请号：US10810340
申请日：2004-03-26
发明人： Pavel Horsky , Ivan Koudar
IPC分类号： G01R027/02
CPC分类号： G01D3/028 , H03M3/324 , H03M3/356
摘要： A measurement method or system for measuring a physical value comprises, during a same clock cycle, forming an input signal, a reference signal and an offset signal, the input signal including a parasitic value and a useful measurement value. A relationship between the input signal where the parasitic value has been cancelled out, and the reference signal is derived. From this relationship, a value relating to the physical value is determined. The input signal, reference signal and offset signal are respectively associated with an input element, a reference element and a parasitic element. All elements have a common driving signal, and the parasitic value is depending on the common driving signal. The fact that different signals are formed during a same measurement cycle, and that these signals are sufficient to obtain the desired physical value, makes the measurement method or system of the present invention faster than prior art measurement methods or systems: only one conversion cycle is needed against two cycles needed for dual slope analog-to-digital conversion.
摘要翻译：用于测量物理值的测量方法或系统包括在同一时钟周期内形成输入信号，参考信号和偏移信号，所述输入信号包括寄生值和有用测量值。导出寄生值已被抵消的输入信号与参考信号之间的关系。根据该关系，确定与物理值有关的值。输入信号，参考信号和偏移信号分别与输入元件，参考元件和寄生元件相关联。所有元件均具有公共驱动信号，寄生值取决于公共驱动信号。在相同测量周期内形成不同信号，并且这些信号足以获得所需物理值的事实使得本发明的测量方法或系统比现有技术的测量方法或系统更快：只有一个转换周期是需要双斜率模数转换所需的两个周期。

6. 发明授权

US06696999B2 Sigma delta modulator 有权
标题翻译： Sigma delta调制器
公开(公告)号：US06696999B2
公开(公告)日：2004-02-24
申请号：US10196343
申请日：2002-07-16
申请人： George Ollos , Larry W. Dayhuff
发明人： George Ollos , Larry W. Dayhuff
IPC分类号： H03M300
CPC分类号： H03M3/324 , H03M3/43 , H03M3/438
摘要： A sigma delta modulator having an integrator with a first input for coupling to an analog signal and a second input for coupling to a reference voltage. A comparator is provided having a first input coupled to an output of the integrator and a second input for coupling to the reference voltage. The comparator produces signal having a logic state in accordance with the relative magnitude of signals at the first and second inputs thereof. The logic state is latched at the output of such comparator during latching transitions in a series of latching pulses fed to the comparator. A one-bit quantizer is provided for storing the logic state of at the output of the comparator at sampling transitions of a series of clock pulses fed to the one-bit quantizer. The series of clock pulses and the series of latching pulses are synchronized one with the other. Each one of the latching transitions occurs prior to a corresponding one of the sampling transitions. A buffer is coupled between an output of the quantizer and the first input of the integrator. The regulator produces a voltage to power the buffer. The reference voltage is a fractional portion of the voltage produced by the regulator for the buffer. In one embodiment, the modulator including a second integrator having a first input coupled to the output of the first integrator, a second input for coupling to the reference voltage, and an output coupled to the first input of the comparator. A second buffer is included coupled between an output of the quantizer and the first input of the second integrator.
摘要翻译：具有积分器的Σ-Δ调制器，具有用于耦合到模拟信号的第一输入端和用于耦合到参考电压的第二输入端。提供比较器，其具有耦合到积分器的输出的第一输入和用于耦合到参考电压的第二输入。比较器产生具有根据其第一和第二输入处的信号的相对幅度具有逻辑状态的信号。逻辑状态在锁存转换期间被锁存在这种比较器的输出端处，并在一系列被馈送到比较器的锁存脉冲中。提供一位量化器，用于在馈送给一比特量化器的一系列时钟脉冲的采样转变处存储比较器输出的逻辑状态。一系列时钟脉冲和一系列锁存脉冲同步，另一个。每个锁存转换发生在相应的一个采样转换之前。缓冲器耦合在量化器的输出端和积分器的第一输入端之间。调节器产生电压为缓冲器供电。参考电压是由缓冲器的稳压器产生的电压的一小部分。在一个实施例中，调制器包括第二积分器，其具有耦合到第一积分器的输出的第一输入端，耦合到参考电压的第二输入端和耦合到比较器的第一输入端的输出端。包括耦合在量化器的输出端和第二积分器的第一输入端之间的第二缓冲器。

7. 发明授权

US06542020B2 Non-linear signal correction 有权
公开(公告)号：US06542020B2
公开(公告)日：2003-04-01
申请号：US10146311
申请日：2002-05-14
申请人： Michiel A. P. Pertus , Anthonius Bakker , Johan H. Huijsing
发明人： Michiel A. P. Pertus , Anthonius Bakker , Johan H. Huijsing
IPC分类号： G06G712
CPC分类号： H03M1/0621 , G01D3/02 , G01K7/01 , G05F3/30 , H03M1/12 , H03M3/324 , H03M3/458
摘要： Signal correction in a bipolar transistor circuit having a base-emitter voltage and a non-linear output signal corresponding to a detectable characteristic is improved by correcting non-linearity in the signal at third and/or higher-orders. According to an example embodiment of the present invention, the output of the transistor is corrected as a function of the base-emitter voltage, the non-linear output signal and a generated non-linearity. The generated non-linearity is adapted to cancel the non-linearity of the non-linear output signal when added thereto. Various implementations of the present invention are applicable to a variety of applications, each of which may have selected characteristics that are accounted for by the generated non-linearity, which is selectively adapted for each particular application. In this manner, third and higher-order corrections can be made, and the detection of characteristics such as data, temperature and other terms is improved.

8. 发明申请

US20020158680A1 Non-linear signal correction 有权
标题翻译：非线性信号校正
公开(公告)号：US20020158680A1
公开(公告)日：2002-10-31
申请号：US10146311
申请日：2002-05-14
申请人： PHILIPS SEMICONDUCTORS
发明人： Michiel A.P. Pertus , Anthonius Bakker , Johan H. Huijsing
IPC分类号： G06G007/12
CPC分类号： H03M1/0621 , G01D3/02 , G01K7/01 , G05F3/30 , H03M1/12 , H03M3/324 , H03M3/458
摘要： Signal correction in a bipolar transistor circuit having a base-emitter voltage and a non-linear output signal corresponding to a detectable characteristic is improved by correcting non-linearity in the signal at third and/or higher-orders. According to an example embodiment of the present invention, the output of the transistor is corrected as a function of the base-emitter voltage, the non-linear output signal and a generated non-linearity. The generated non-linearity is adapted to cancel the non-linearity of the non-linear output signal when added thereto. Various implementations of the present invention are applicable to a variety of applications, each of which may have selected characteristics that are accounted for by the generated non-linearity, which is selectively adapted for each particular application. In this manner, third and higher-order corrections can be made, and the detection of characteristics such as data, temperature and other terms is improved.
摘要翻译：通过校正第三和/或更高阶的信号中的非线性，改善了具有对应于可检测特性的基极 - 发射极电压和非线性输出信号的双极晶体管电路中的信号校正。根据本发明的示例性实施例，晶体管的输出被校正为基极 - 发射极电压，非线性输出信号和产生的非线性的函数。所生成的非线性适于在添加到非线性输出信号时消除非线性输出信号的非线性。本发明的各种实现可应用于各种应用，每种应用可以具有被生成的非线性所考虑的所选择的特征，其被选择性地适用于每个特定应用。以这种方式，可以进行第三和更高级的校正，并且提高诸如数据，温度和其它项的特性的检测。

9. 发明授权

US06456145B1 Non-linear signal correction 有权
标题翻译：非线性信号校正
公开(公告)号：US06456145B1
公开(公告)日：2002-09-24
申请号：US09672806
申请日：2000-09-28
申请人： Michiel A. P. Pertijs , Anthonius Bakker , Johan H. Huijsing
发明人： Michiel A. P. Pertijs , Anthonius Bakker , Johan H. Huijsing
IPC分类号： G06G712
CPC分类号： H03M1/0621 , G01D3/02 , G01K7/01 , G05F3/30 , H03M1/12 , H03M3/324 , H03M3/458
摘要： Signal correction in a bipolar transistor circuit having a base-emitter voltage and a non-linear output signal corresponding to a detectable characteristic is improved by correcting non-linearity in the signal at third and/or higher-orders. According to an example embodiment of the present invention, the output of the transistor circuit is corrected as a function of the base-emitter voltage, the non-linear output signal and a generated non-linearity. The generated non-linearity is adapted to cancel the non-linearity of the non-linear output signal. Various implementations of the present invention are applicable to a variety of applications, each of which may have selected characteristics that are accounted for by the generated non-linearity, which is selectively adapted for each particular application. In one implementation, the non-linearity is generated using two or more division circuits. In this manner, third and higher-order corrections can be made, and the detection of characteristics such as data, temperature and other terms is improved.
摘要翻译：通过校正第三和/或更高阶的信号中的非线性，改善了具有对应于可检测特性的基极 - 发射极电压和非线性输出信号的双极晶体管电路中的信号校正。根据本发明的示例性实施例，晶体管电路的输出被校正为基极 - 发射极电压，非线性输出信号和产生的非线性的函数。所产生的非线性适于消除非线性输出信号的非线性。本发明的各种实现可应用于各种应用，每种应用可以具有被生成的非线性所考虑的所选择的特征，其被选择性地适用于每个特定应用。在一个实现中，使用两个或更多个除法电路产生非线性。以这种方式，可以进行第三和更高级的校正，并且提高诸如数据，温度和其它项的特性的检测。

10. 发明授权

US6140950A Delta-sigma modulator with improved full-scale accuracy 有权
标题翻译： Delta-sigma调制器具有提高的满量程精度
公开(公告)号：US6140950A
公开(公告)日：2000-10-31
申请号：US135224
申请日：1998-08-17
申请人： Florin A. Oprescu
发明人： Florin A. Oprescu
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/324 , H03M3/43 , H03M3/452
摘要： The invention provides methods and apparatus for improving the full-scale accuracy of an oversampling analog-to-digital converter. In particular, an improved switched-capacitor subtractor/integrator circuit is described that effectively provides a desired capacitor ratio by using N+M distinct unit capacitors that each sample an input signal a first predetermined number of times and sample one or more reference signals a second predetermined number of times, where the ratio of the first predetermined number to the second predetermined number is the desired capacitor ratio N/M.
摘要翻译：本发明提供了用于提高过采样模数转换器的满量程精度的方法和装置。特别地，描述了一种改进的开关电容减法器/积分器电路，其通过使用N + M个不同的单位电容器来有效地提供期望的电容器比率，每个单位电容器对输入信号进行第一预定次数的采样，并且对一个或多个参考信号进行采样预定次数，其中第一预定数量与第二预定数量的比率是期望的电容器比率N / M。

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