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1. 发明授权

US08421536B2 Apparatus and methods for electronic amplification 有权
标题翻译：电子放大的装置和方法
公开(公告)号：US08421536B2
公开(公告)日：2013-04-16
申请号：US13239139
申请日：2011-09-21
申请人： Mark Reisiger
发明人： Mark Reisiger
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F3/45286 , H03F3/45475 , H03F3/45708 , H03F2200/261 , H03F2200/408 , H03F2203/45138 , H03F2203/45352 , H03F2203/45356 , H03F2203/45652
摘要： Apparatus and methods for electronic amplification are provided. In one embodiment, a method amplifying a differential input voltage signal using a first NMOS transistor and a second NMOS transistor is provided. The method includes controlling a drain-source voltage of the first NMOS transistor using a first high voltage NMOS transistor and a first high voltage PMOS transistor. The first high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the first NMOS transistor. The method further includes controlling a drain-source voltage of the second NMOS transistor using a second high voltage NMOS transistor and a second high voltage PMOS transistor. The second high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the second NMOS transistor.
摘要翻译：提供了用于电子放大的装置和方法。在一个实施例中，提供了使用第一NMOS晶体管和第二NMOS晶体管放大差分输入电压信号的方法。该方法包括使用第一高电压NMOS晶体管和第一高电压PMOS晶体管来控制第一NMOS晶体管的漏 - 源电压。第一高电压NMOS和PMOS晶体管并联电连接到第一NMOS晶体管的漏极。该方法还包括使用第二高电压NMOS晶体管和第二高电压PMOS晶体管来控制第二NMOS晶体管的漏 - 源电压。第二高压NMOS和PMOS晶体管并联电连接到第二NMOS晶体管的漏极。

2. 发明授权

US07253686B2 Differential amplifiers with enhanced gain and dynamic range 有权
标题翻译：具有增益增益和动态范围的差分放大器
公开(公告)号：US07253686B2
公开(公告)日：2007-08-07
申请号：US11191871
申请日：2005-07-27
申请人： Ahmed Mohamed Abdelatty Ali
发明人： Ahmed Mohamed Abdelatty Ali
IPC分类号： H03F3/45
CPC分类号： H03F3/4565 , H03F3/45188 , H03F3/45192 , H03F3/45286 , H03F3/45291 , H03F3/45798 , H03F2200/513 , H03F2203/45288 , H03F2203/45301 , H03F2203/45311 , H03F2203/45652 , H03F2203/45722
摘要： Differential amplifier embodiments are provided for amplifying input signals with enhanced gain and dynamic range. They include first and second amplifier stages and at least one common-mode feedback circuit that is arranged to mirror and adjust a tail current to control the common-mode level of a respective one of the stages. The stages are configured with cascode elements to obtain high impedances that enhance their signal gain and the common-mode feedback circuit is configured to controllably lower the output voltage of a current source that provides the tail current to thereby enhance the amplifier's dynamic range. The amplifier embodiments are particularly suited for use in applications where they must operate with reduced supply voltages and operate in alternating operational modes.
摘要翻译：提供差分放大器实施例用于放大具有增强增益和动态范围的输入信号。它们包括第一和第二放大器级以及至少一个共模反馈电路，其布置成镜像和调整尾电流以控制相应一个级的共模电平。这些级配置有共源共栅元件以获得增强其信号增益的高阻抗，并且共模反馈电路被配置为可控地降低提供尾电流的电流源的输出电压，从而增强放大器的动态范围。放大器实施例特别适用于其必须以降低的电源电压工作并以交替工作模式操作的应用。

3. 发明申请

US20050136847A1 Communication semiconductor integrated circuit device and electrical apparatus 审中-公开
标题翻译：通信半导体集成电路器件和电气设备
公开(公告)号：US20050136847A1
公开(公告)日：2005-06-23
申请号：US11011153
申请日：2004-12-15
申请人： Hiroaki Matsui , Taizo Yamawaki , Masahiro Ito , Masakatsu Yokota
发明人： Hiroaki Matsui , Taizo Yamawaki , Masahiro Ito , Masakatsu Yokota
IPC分类号： H03G11/00 , H03F1/32 , H03F1/52 , H03F3/195 , H03F3/45 , H03F3/72 , H03G3/10 , H03G3/30 , H04B1/44
CPC分类号： H03F3/45286 , H03F1/3211 , H03F1/52 , H03F3/195 , H03F3/72 , H03F2200/09 , H03F2200/111 , H03F2203/45638 , H03F2203/45704 , H03F2203/45706 , H03G3/3042
摘要： A communication semiconductor integrated circuit (high frequency IC) that has a function of differentially-singly converts and outputs a transmitted signal suppressing deterioration of a harmonic suppression characteristic and enables miniaturization and an electronic component (high frequency module) that mounts the communication semiconductor integrated circuit are provided. In the communication semiconductor integrated circuit (high frequency IC) having a limiter that amplifies a modulated and up-converted transmitted signal and supplies a power amplifier with the signal, an unbalanced reduction means having, for example, differential MOS transistors is provided in collectors or drains of differential transistors that construct the limiter to output pins and continue to apply a current to the output pins and reduces the impedance of the transistor on an off side even when one of the transistors enters an off state in accordance with an input signal in parallel to the transistor.
摘要翻译：具有差分单变换功能的通信用半导体集成电路（高频IC），输出抑制谐波抑制特性的劣化的发送信号，能够实现小型化，以及安装通信半导体集成电路的电子部件（高频模块）被提供。在具有放大经调制和上变频的发送信号并向功率放大器供给该信号的限幅器的通信半导体集成电路（高频IC）中，具有例如差分MOS晶体管的不平衡减小装置设置在收集器或差分晶体管的漏极构成限制器以输出引脚并且继续向输出引脚施加电流，并且即使当晶体管中的一个根据并行的输入信号进入截止状态时也减小了晶体管在截止侧的阻抗到晶体管。

4. 发明授权

US5917379A Broadband linear transconductance amplifier with resistive pole-splitting compensation 失效
标题翻译：宽带线性跨导放大器，具有电阻分支补偿
公开(公告)号：US5917379A
公开(公告)日：1999-06-29
申请号：US903012
申请日：1997-07-31
申请人： Kirk B Ashby , Paul C. Davis
发明人： Kirk B Ashby , Paul C. Davis
IPC分类号： H03F3/45
CPC分类号： H03F3/4508 , H03F3/45179 , H03F3/45278 , H03F3/45286 , H03F3/45304 , H03F2203/45184 , H03F2203/45298 , H03F2203/45304 , H03F2203/45466 , H03F2203/45471 , H03F2203/45496
摘要： A compensation scheme for differential- or single-input transconductance amplifiers relies on an active feedback path with a resistive pole-splitting compensation circuit. The resistive compensation circuit causes pole-splitting of the two dominant poles, moving one pole to a slightly lower frequency and the other to a much higher frequency compared to the dominant poles of the uncompensated amplifier. A DC-blocking capacitor may also be placed in series with the resistor of the compensation circuit to allow for proper biasing of the circuit. By selecting appropriate values for the passive elements in the compensation circuit, the compensation scheme of the present invention can cause the amplifier to operate in a stable, linear manner over the same or even a larger bandwidth than an equivalent amplifier without compensation. The present invention does not suffer the problems of standard narrowbanding compensation schemes associated with high frequency cut-off.
摘要翻译：差分或单输入跨导放大器的补偿方案依赖于具有电阻分极补偿电路的有源反馈路径。电阻补偿电路引起两个主极的极分裂，将一极移动到稍低的频率，另一个极点与未补偿放大器的主极相比更高的频率。隔离电容器也可以与补偿电路的电阻串联放置，以允许电路的适当偏置。通过为补偿电路中的无源元件选择合适的值，本发明的补偿方案可以使得放大器在与补偿相等或甚至更大的带宽相同或甚至更大的带宽上以稳定的线性方式工作。本发明不存在与高频截止相关的标准窄带补偿方案的问题。

5. 发明授权

US5912582A BiCMOS transconductor stage for high-frequency filters 失效
标题翻译： BiCMOS跨导级高频滤波器
公开(公告)号：US5912582A
公开(公告)日：1999-06-15
申请号：US866889
申请日：1997-05-30
申请人： Valerio Pisati , Roberto Alini , Gaetano Cosentino , Gianfranco Vai
发明人： Valerio Pisati , Roberto Alini , Gaetano Cosentino , Gianfranco Vai
IPC分类号： H03F3/45 , H03F3/72 , H03B1/00 , H03K5/00 , H04B1/10
CPC分类号： H03F3/72 , H03F3/45286 , H03F2203/45302 , H03F2203/45304 , H03F2203/45371 , H03F2203/45396 , H03F2203/45506
摘要： A BiCMOS transconductor differential stage for high frequency filters includes an input circuit portion having signal inputs and a pair of MOS transistors having their respective gate terminals corresponding to the signal inputs. The differential stage has an output circuit portion having signal outputs and a pair of bipolar transistors connected together with a common base inserted between the inputs and the outputs in a cascode configuration. The differential stage includes a switching device associated with at least one of the bipolar transistors to change the connections between parasitic capacitors present in the differential stage. The switching device also has at least one added bipolar transistor connected in a removable manner in parallel with the corresponding bipolar cascode transistor. In a variant differential stage, there are also provided respective added MOS transistors connected in parallel with the MOS transistors of the input circuit portion to change the ratio W:L of each of the MOS transistors.
摘要翻译：用于高频滤波器的BiCMOS跨导差分级包括具有信号输入的输入电路部分和具有对应于信号输入的各自的栅极端子的一对MOS晶体管。差分级具有具有信号输出的输出电路部分和一对双极晶体管，它们以共模基极连接在共模基底上，该公共基极以共源共栅配置插入在输入端和输出端之间。差分级包括与双极晶体管中的至少一个相关联的开关器件，以改变差分级中存在的寄生电容器之间的连接。开关器件还具有至少一个加法双极晶体管，其以可移除的方式与相应的双极共源共栅晶体管并联连接。在变异差分级中，还提供了与输入电路部分的MOS晶体管并联连接的各个附加的MOS晶体管，以改变每个MOS晶体管的比率W：L。

6. 发明授权

US5587687A Multiplier based transconductance amplifiers and transconductance control circuits 失效
标题翻译：基于乘法的跨导放大器和跨导控制电路
公开(公告)号：US5587687A
公开(公告)日：1996-12-24
申请号：US383310
申请日：1995-02-02
申请人： William J. Adams
发明人： William J. Adams
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45089 , H03F3/45188 , H03F3/45286 , H03F3/45511 , H03F2203/45574 , H03F2203/45652
摘要： Multiplier based transconductance amplifiers utilizing the combination of FET differential input stages and Gilbert multiplier output stages are disclosed. The amplifiers provide a high input resistance, high output resistance, and wide g.sub.m adjustment range without need for output level-shifting stages. Also disclosed are various transconductance control circuits which require only a simple one-transistor voltage buffer in the feedback loop rather than the two more complex voltage amplifiers required by the prior art. Various embodiments are disclosed.
摘要翻译：公开了利用FET差分输入级和吉尔伯特乘法器输出级的组合的基于乘法器的跨导放大器。放大器提供高输入电阻，高输出电阻和宽gm调节范围，无需输出电平转换级。还公开了各种跨导控制电路，其仅需要反馈回路中的简单单晶体管电压缓冲器，而不是现有技术所需的两个更复杂的电压放大器。公开了各种实施例。

7. 发明授权

US4276515A Differential amplifier circuit arrangement with stabilized input impedance 失效
标题翻译：具有稳定输入阻抗的差分放大器电路布置
公开(公告)号：US4276515A
公开(公告)日：1981-06-30
申请号：US12701
申请日：1979-02-16
申请人： Yutaka Nishimoto
发明人： Yutaka Nishimoto
IPC分类号： H03F1/32 , H03F1/56 , H03F3/45
CPC分类号： H03F3/45286 , H03F1/56
摘要： A differential amplifier circuit arrangement provided with first and second field effect transistors having their sources coupled together in common, the drain of the first field effect transistor being connected to the emitter of a bipolar transistor whose collector is connected via a drain load for this field effect transistor to a power supply line and whose base is held at a constant potential with respect to the commonly coupled sources, the drain of the second field effect transistor being coupled to the power supply line without a voltage stabilizing transistor. The bipolar transistor serves to stabilize the drain-source voltage of the first field effect transistor, thus maintaining constant the input impedance of the amplifier measured at the gate of the first field effect transistor. The differential transistors may be bipolar transistors.
摘要翻译：一种差分放大器电路装置，其具有第一场效应晶体管和第二场效应晶体管，其源极共同耦合在一起，第一场效应晶体管的漏极连接到双极晶体管的发射极，双极晶体管的集电极通过漏极负载连接，用于该场效应晶体管连接到电源线并且其基极相对于共同耦合的源保持在恒定电位，第二场效应晶体管的漏极耦合到电源线而没有稳压晶体管。双极晶体管用于稳定第一场效应晶体管的漏源电压，从而保持在第一场效应晶体管的栅极处测量的放大器的输入阻抗的恒定。差分晶体管可以是双极晶体管。

8. 发明授权

US10056924B2 High output power digital-to-analog converter system 有权
公开(公告)号：US10056924B2
公开(公告)日：2018-08-21
申请号：US14628730
申请日：2015-02-23
申请人： ANALOG DEVICES, INC.
发明人： Bernd Schafferer , Bing Zhao
IPC分类号： H04B1/04 , H03M1/74 , H03F1/32 , H03F3/45 , H03M1/66
CPC分类号： H04B1/0475 , H03F1/02 , H03F1/3241 , H03F3/24 , H03F3/45286 , H03M1/662 , H03M1/74 , H03M1/747 , H04B2001/045
摘要： The present disclosure discloses a digital-to-analog converter (DAC) design which is suitable for providing a high output power high-speed DAC, e.g., in radio frequency applications. The DAC design utilizes a parallel DAC structure, e.g., having 8 parallel DACs and an aggregate current output, to provide a high and programmable current output (in some implementations, up to 512 mA or more). The parallel DAC structure alleviates the design problems which exist in trying to output a high amount of current using a single DAC. The DAC design further utilizes a hybrid structure which integrates the signal chain for a more reliable system. In some embodiments, the hybrid structure uses a CMOS process for the current sources and switches and a GaAs cascode stage for combining the outputs to optimally leverage the advantages of both technologies. The result is a highly efficient DAC (with peak output power programmable up to 29 dBm or more).

9. 发明申请

US20110095822A1 VARIABLE-GAIN LOW NOISE AMPLIFIER 有权
标题翻译：可变增益低噪声放大器
公开(公告)号：US20110095822A1
公开(公告)日：2011-04-28
申请号：US12908485
申请日：2010-10-20
申请人： Wei-Chia CHAN
发明人： Wei-Chia CHAN
IPC分类号： H03F1/22 , H03F3/45 , H03G3/30
CPC分类号： H03F3/4508 , H03F3/45286 , H03F2203/45304 , H03F2203/45372 , H03F2203/45392 , H03F2203/45394 , H03F2203/45686 , H03F2203/45702 , H03G1/0029 , H03G1/007
摘要： A highly linear variable-gain low noise amplifier is a cascode amplifier. The cascode amplifier includes a gain control circuit, a load circuit, a current steering circuit and an input circuit. The gain control circuit is used for receiving a gain adjusting voltage, thereby generating a resistance adjusting signal and a current steering control signal. The load circuit includes plural variable resistors. The resistances of the variable resistors are adjusted according to the resistance adjusting signal. The current steering circuit is connected to the load circuit through plural current paths for adjusting a current ratio between the plural current paths according to the current steering control signal. The current steering circuit has differential signal output terminals. The input circuit is connected to the current steering circuit. The input circuit has differential signal input terminals.
摘要翻译：高线性可变增益低噪声放大器是共源共栅放大器。共源共栅放大器包括增益控制电路，负载电路，电流转向电路和输入电路。增益控制电路用于接收增益调节电压，从而产生电阻调节信号和电流转向控制信号。负载电路包括多个可变电阻器。可变电阻器的电阻根据电阻调节信号进行调整。电流转向电路通过多个电流路径连接到负载电路，用于根据当前转向控制信号调整多个电流路径之间的电流比。当前的转向电路具有差分信号输出端子。输入电路连接到电流转向电路。输入电路具有差分信号输入端子。

10. 发明申请

US20100019946A1 Amplifier networks with controlled common-mode level and converter systems for use therewith 有权
标题翻译：具有受控共模电平的放大器网络和与其一起使用的转换器系统
公开(公告)号：US20100019946A1
公开(公告)日：2010-01-28
申请号：US12220558
申请日：2008-07-25
申请人： Ahmed Mohamed Abdelatty Ali
发明人： Ahmed Mohamed Abdelatty Ali
IPC分类号： H03F3/45
CPC分类号： H03F3/45286 , H03F3/45802 , H03F3/45807 , H03F2203/45101 , H03F2203/45418 , H03F2203/45424 , H03F2203/45434 , H03F2203/45512 , H03F2203/45514 , H03F2203/45642 , H03F2203/45681 , H03F2203/45722
摘要： Effective control of the common-mode level of amplifiers is obtained through control structures (both closed-loop and open-loop structures) which are directed to various amplifier functions such as the reduction of amplifier loading, accurate sensing of common-mode levels, mitigation of headroom restraints, and proper transistor biasing. This common-mode control is especially useful in multiplying analog-to-digital converters (MDACs) of signal processing systems.
摘要翻译：通过控制结构（闭环和开环结构）获得对放大器共模电平的有效控制，这些控制结构涉及各种放大器功能，例如放大器负载的减小，共模电平的精确检测，缓解的余量约束，以及适当的晶体管偏置。这种共模控制在乘法信号处理系统的模数转换器（MDAC）中特别有用。

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