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1. 发明授权

US11916520B2 Transceiver circuit 有权
公开(公告)号：US11916520B2
公开(公告)日：2024-02-27
申请号：US17805277
申请日：2022-06-03
申请人： Murata Manufacturing Co., Ltd.
发明人： Satoshi Tanaka , Kiichiro Takenaka , Satoshi Arayashiki , Satoshi Sakurai
IPC分类号： H03F1/07 , H03F1/02 , H03F3/21 , H03F3/24 , H03F3/195 , H04B1/44 , H04B1/04
CPC分类号： H03F1/0288 , H03F3/195 , H03F3/211 , H03F3/245 , H04B1/0458 , H04B1/44 , H03F2200/102 , H03F2200/219 , H03F2200/27 , H03F2200/294 , H03F2200/429 , H03F2200/504
摘要： A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.

2. 发明授权

US10879890B1 Cascade complementary source follower and controlling circuit 有权
公开(公告)号：US10879890B1
公开(公告)日：2020-12-29
申请号：US16748015
申请日：2020-01-21
申请人： LONTIUM SEMICONDUCTOR CORPORATION
发明人： Cheng Tao , Xiangyu Ji , Yu Chen , Haiyan Wei , Yanan Zhang , Jiaxi Fu
IPC分类号： H03F1/30 , H03K17/14
CPC分类号： H03K17/145 , H03F2200/219
摘要： A cascade complementary source follower and a controlling circuit are provided. The source follower circuit includes: a source follower circuit including at least two MOS transistors, and a feedback circuit configured to clamp a voltage on a MOS transistor that provides an output voltage in the source follower circuit and to change a gate-source voltage of the MOS transistor by adjusting a bias current supplied to the MOS transistor, so that an output voltage can precisely follow an input voltage.

3. 发明申请

US20160087727A1 Optical Modulator Driver Circuit and Optical Transmitter 审中-公开
标题翻译：光调制器驱动电路和光发射机
公开(公告)号：US20160087727A1
公开(公告)日：2016-03-24
申请号：US14889127
申请日：2014-05-09
申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION
发明人： Munehiko Nagatani , Hideyuki Nosaka , Toshihiro Itoh , Koichi Murata , Hiroyuki Fukuyama , Takashi Saida , Shin Kamei , Hiroshi Yamazaki , Nobuhiro Kikuchi , Hiroshi Koizumi , Masafumi Nogawa , Hiroaki Katsurai , Hiroyuki Uzawa , Tomoyoshi Kataoka , Naoki Fujiwara , Hiroto Kawakami , Kengo Horikoshi , Yves Bouvier , Mikio Yoneyama , Shigeki Aisawa , Masahiro Suzuki
IPC分类号： H04B10/54 , H03G3/00 , H03F3/04 , H03F3/60 , H03F1/32
CPC分类号： H04B10/541 , H03F1/223 , H03F1/32 , H03F3/04 , H03F3/082 , H03F3/195 , H03F3/245 , H03F3/45085 , H03F3/45089 , H03F3/45183 , H03F3/45188 , H03F3/602 , H03F2200/18 , H03F2200/219 , H03F2200/255 , H03F2200/27 , H03F2200/336 , H03F2200/411 , H03F2200/72 , H03F2200/75 , H03F2203/45258 , H03F2203/45374 , H03F2203/45392 , H03F2203/45454 , H03F2203/45466 , H03F2203/45471 , H03F2203/45486 , H03F2203/45496 , H03F2203/45504 , H03F2203/45506 , H03F2203/45702 , H03G1/0023 , H03G1/0082 , H03G1/0088 , H03G3/00 , H03G3/001 , H03G3/3084 , H04B10/5561 , H04B10/588
摘要： An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.
摘要翻译：光调制器驱动电路（1）包括放大器（50，Q10，Q11，R10-R13）和电流量调节电路（51），能够根据期望的操作调节放大器（50）的电流量模式。电流量调节电路（51）包括至少两个根据表示期望的操作模式的二进制控制信号单独地进行ON / OFF控制的电流源（IS10）。

4. 发明申请

US20190068134A1 BOOTSTRAPPED APPLICATION ARRANGEMENT AND APPLICATION TO THE UNITY GAIN FOLLOWER 审中-公开
公开(公告)号：US20190068134A1
公开(公告)日：2019-02-28
申请号：US15687301
申请日：2017-08-25
申请人： Harman International Industries, Incorporated
发明人： Dimitri DANYUK , Todd A. EICHENBAUM
IPC分类号： H03F1/38 , H03F3/343
CPC分类号： H03F1/38 , H03F3/3066 , H03F3/3071 , H03F3/3076 , H03F3/3432 , H03F2200/219 , H03F2200/375
摘要： An amplifier circuit includes an input amplifier; an output unity gain buffer; and a second unity gain buffer. The output unity gain buffer and the second unity gain buffer are each configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input amplifier. A unity gain amplifier includes an input unity gain amplifier; and an output unity gain buffer and a second unity gain buffer. The buffers are configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input unity gain amplifier.

5. 发明授权

US09641170B2 Pass device with boost voltage regulation and current gain for VCSEL driving applications 有权
公开(公告)号：US09641170B2
公开(公告)日：2017-05-02
申请号：US14814050
申请日：2015-07-30
申请人： COSEMI TECHNOLOGIES, INC.
发明人： Wu-Chun Chou , Robert Monroe Smith , Iain Ross MacTaggart , John Joseph Stronczer , Charles Phillip McClay
IPC分类号： H03K3/00 , H03K17/60 , H03F3/19 , H03F3/45 , H01S5/042 , H03F3/50 , H05B33/08
CPC分类号： H03K17/60 , H01S5/042 , H01S5/0427 , H03F3/19 , H03F3/4508 , H03F3/45475 , H03F3/50 , H03F2200/135 , H03F2200/219 , H03F2200/303 , H03F2200/42 , H03F2200/462 , H03F2200/481 , H03F2203/45101 , H03F2203/45116 , H03F2203/45288 , H05B33/08
摘要： A power efficient device for driving a load comprising a low current path and a high current path, wherein the high current path is driven by a first voltage source. In order to accommodate larger turn on voltages of possible load devices while maintaining low power operation, an additional voltage source exceeding the voltage source in the high current path is introduced in the low current path.

6. 发明授权

US4216436A High gain differential amplifier 失效
标题翻译：高增益差分放大器
公开(公告)号：US4216436A
公开(公告)日：1980-08-05
申请号：US917153
申请日：1978-06-20
申请人： Peter Lefferts
发明人： Peter Lefferts
IPC分类号： H03F3/45
CPC分类号： H03F3/45071 , H03F2200/219 , H03F2203/45018 , H03F2203/45024 , H03F2203/45111 , H03F2203/45202 , H03F2203/45211 , H03F2203/45346
摘要： The disclosed amplifier includes first and second transistors each having an emitter coupled to a bias source, a base, a first collector and a second collector. A third transistor has a collector connected to another bias source, an emitter connected to the base of the first transistor and to the first collector of the second transistor, and a base for receiving input signals. A fourth transistor has a collector connected to another bias source, an emitter connected to the base of the second transistor and to the first collector of the first transistor, and a base for receiving second input signals. Any difference in voltage between the input signals is indicated by an imbalance in current through the second collectors of the first and second transistors. The first collectors of these transistors provide positive feedback for amplifying the magnitude of this imbalance.
摘要翻译：所公开的放大器包括第一和第二晶体管，每个晶体管具有耦合到偏置源的发射极，基极，第一集电极和第二集电极。第三晶体管具有连接到另一偏压源的集电极，连接到第一晶体管的基极和第二晶体管的第一集电极的发射极以及用于接收输入信号的基极。第四晶体管具有连接到另一偏压源的集电极，连接到第二晶体管的基极和第一晶体管的第一集电极的发射极以及用于接收第二输入信号的基极。通过第一和第二晶体管的第二集电极的电流不平衡来表示输入信号之间的电压差。这些晶体管的第一个收集器提供正反馈以放大该不平衡的幅度。

7. 发明授权

US10644659B2 Voltage buffer for input voltages above a supply voltage or below ground voltage 有权
公开(公告)号：US10644659B2
公开(公告)日：2020-05-05
申请号：US16111679
申请日：2018-08-24
申请人： Allegro MicroSystems, LLC
发明人： Soo-Chang Choe , Craig S. Petrie
IPC分类号： H03F3/16 , H03F3/45 , G01R19/25
CPC分类号： H03F3/16 , G01R19/2513 , H03F3/45183 , H03F2200/151 , H03F2200/219 , H03F2200/69 , H03F2203/45006 , H03F2203/45144
摘要： A buffer amplifier comprises a source follower and a feedback amplifier. The feedback amplifier may be configured to control a drain current of the source follower to remain substantially constant independent of a load.

8. 发明授权

US09866959B2 Self-biasing output booster amplifier and use thereof 有权
公开(公告)号：US09866959B2
公开(公告)日：2018-01-09
申请号：US15415174
申请日：2017-01-25
申请人： Sonion Nederland B.V.
发明人： Michiel van Nieuwkerk , Yang Gao
IPC分类号： H04R3/00 , H03F3/185 , H04R19/04
CPC分类号： H04R3/005 , H03F1/303 , H03F1/3205 , H03F3/185 , H03F3/187 , H03F3/211 , H03F3/505 , H03F3/72 , H03F2200/03 , H03F2200/168 , H03F2200/171 , H03F2200/18 , H03F2200/219 , H03F2200/297 , H03F2200/411 , H03F2200/474 , H03F2200/54 , H03F2200/69 , H03F2203/21161 , H03F2203/5012 , H03F2203/5021 , H03F2203/5027 , H04R19/04
摘要： A self-biasing output booster amplifier having an input amplifier stage, an output amplifier stage being operatively connected to an output of the input amplifier stage, and first and second current copying circuits. The second current copying circuit is biased from an output of the self-biasing output booster amplifier. The first and second current copying circuits are configured to copy at least a portion of the current through the output amplifier stage. The sum of the output of the second current copying circuit and the output of the output amplifier stage provides the output current of the self-biasing output booster amplifier, Finally, the input amplifier stage is biased from the output of the second current copying.

9. 发明申请

US20170331366A1 SWITCHED-CAPACITOR BUFFER AND RELATED METHODS 审中-公开
公开(公告)号：US20170331366A1
公开(公告)日：2017-11-16
申请号：US15335956
申请日：2016-10-27
申请人： MediaTek Inc.
发明人： Ramy Awad
IPC分类号： H02M3/07
CPC分类号： H02M3/07 , H03F3/005 , H03F3/301 , H03F3/3069 , H03F3/505 , H03F2200/219 , H03F2200/231 , H03F2200/252 , H03F2200/27 , H03F2200/297 , H03F2200/312 , H03F2200/396 , H03F2200/414 , H03F2200/417 , H03F2200/42 , H03F2200/453 , H03F2200/456 , H03F2200/513 , H03F2200/69
摘要： A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.

10. 发明授权

US5229664A Programmable differentiator delay 失效
标题翻译：可编程差分延迟
公开(公告)号：US5229664A
公开(公告)日：1993-07-20
申请号：US725864
申请日：1991-07-03
申请人： Kevin E. Brehmer
发明人： Kevin E. Brehmer
IPC分类号： G11B5/09 , G11B20/10 , H03F3/45
CPC分类号： H03F3/45179 , G11B20/10009 , H03F3/45085 , H03F3/45278 , H03F3/45511 , H03F2200/219 , H03F2203/45004 , H03F2203/45076 , H03F2203/45082 , H03F2203/45144 , H03F2203/45201 , H03F2203/45244 , H03F2203/45362 , H03F2203/45366 , H03F2203/45641 , H03F2203/45646 , H03F2203/45648 , H03F2203/45712 , H03F2203/45732
摘要： A programmable delay for the gate signal output of the differentiator in a data analyzing circuit is provided. A data signal is produced by a low pass filter, and a differentiator (high pass filter) produces a gate signal. The cutoff frequency of the low pass filter is controlled by a first control circuit, and a second control circuit is provided to separately control the cutoff frequency of the high pass filter. The second control circuit produces a variation from the base frequency determined by the first control circuit. Thus, the cutoff frequency of the high pass filter will always be proportional to that of the low pass filter.

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