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    • 2. 发明授权
    • PLL/DLL dual loop data synchronization
    • PLL / DLL双循环数据同步
    • US07743168B2
    • 2010-06-22
    • US12077002
    • 2008-03-14
    • Benjamim TangScott SouthwellNicholas Robert Steffen
    • Benjamim TangScott SouthwellNicholas Robert Steffen
    • G06F15/16
    • H04J3/047H04J3/062H04J3/0685H04L7/033
    • A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. A dual loop data serializer includes a phase lock loop (PLL) and a delayed lock loop (DLL) configured with a phase shifter in the feedback path of the PLL. The dual loop serializer locks to the input of the DLL instead of the local reference. Thus, the DLL adjusts the frequency from the PLL so that it matches the desired data rate. Each loop may be optimized for jitter tolerance with the net effect generating a synthesized clean clock (due to narrow bandwidth filtering) and VCO noise suppression (due to wide bandwidth filtering). A dual loop retimer includes a dual loop serializer (PLL/DLL) and a clock recovery DLL. The retimer resets the jitter budget to meet transmission requirements for an infinite number of repeater stages.
    • 提供了一种双循环(PLL / DLL)数据同步系统和方法,用于同步系统。 双环数据串行器包括在PLL的反馈路径中配置有移相器的锁相环(PLL)和延迟锁环(DLL)。 双循环串行器锁定到DLL的输入,而不是本地引用。 因此,DLL调整来自PLL的频率,使其与期望的数据速率相匹配。 每个环路可以针对抖动容限进行优化,其净效应产生合成的干净时钟(由于窄带宽滤波)和VCO噪声抑制(由于宽带宽滤波)。 双环重定时器包括双回路串行器(PLL / DLL)和时钟恢复DLL。 重新定时器重置抖动预算以满足无限数量的中继器级的传输要求。
    • 5. 发明授权
    • Active transient response circuits, system and method for digital multiphase pulse width modulated regulators
    • 有源瞬态响应电路,数字多相脉宽调制调节器的系统和方法
    • US07521913B2
    • 2009-04-21
    • US11311115
    • 2005-12-19
    • Benjamim TangRobert T. CarrollScott Wilson SouthwellKenneth A. OstromRichard C. Pierson
    • Benjamim TangRobert T. CarrollScott Wilson SouthwellKenneth A. OstromRichard C. Pierson
    • G05F1/618
    • H02M3/1584
    • Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event. Also disclosed is a pulse limiting circuit. Also disclosed is a tri-state implementation. Response to transient events is further improved with an external ATR circuit coupled to the load.
    • 公开了一种多相脉宽调制电压调节器和方法,其中通过ATR电路检测超过负载线电压超过预定量的瞬态电压偏移或偏差,并且施加校正信号。 校正信号是异步脉冲的形式,并且这样的脉冲的数量是由超过的阈值的数量确定的电压偏移的大小的函数。 还公开了一种用于通过感测负载上的电压变化来早期检测瞬态事件的自适应电压定位(AVP)电路和方法,并且在ATR事件在电流当前变化的时刻之前用预定电流值调节目标电压 检测负载。 AVP负载线预先定位,以实现更精确的电流控制。 还公开了响应于ATR事件具有可调频率特性的自适应滤波器。 还公开了一种脉冲限制电路。 还公开了三态实现。 外部ATR电路耦合到负载,进一步提高对瞬态事件的响应。