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1. 发明申请

US20070020812A1 Circuit board structure integrated with semiconductor chip and method of fabricating the same 审中-公开
标题翻译：与半导体芯片集成的电路板结构及其制造方法
公开(公告)号：US20070020812A1
公开(公告)日：2007-01-25
申请号：US11184979
申请日：2005-07-20
申请人： Shih-Ping Hsu , Chu-Chin Hu
发明人： Shih-Ping Hsu , Chu-Chin Hu
IPC分类号： H01L21/00
CPC分类号： H05K3/323 , H01L23/49833 , H01L23/5389 , H01L24/24 , H01L24/29 , H01L24/82 , H01L24/83 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16225 , H01L2224/24227 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/32225 , H01L2224/73204 , H01L2224/838 , H01L2924/00013 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H05K2201/10674 , H05K2203/0173 , H01L2924/00 , H01L2924/00014 , H01L2224/29099 , H01L2224/29199
摘要： A circuit board structure integrated with semiconductor chip and a method of fabricating the same are proposed. A supporting plate formed with at least one cavity is provided and a semiconductor chip having a plurality of conductive contacts is embedded in the cavity. An anisotropic conductive film (ACF) layer and a circuit board formed with a plurality of conductive contacts on a surface thereof are provided. The circuit board is pressed to the supporting plate by the ACF layer, wherein the conductive contacts of the circuit board are electrically connected to the conductive contacts of the chip via the ACF layer, so as to form the circuit board structure integrated with semiconductor chip.
摘要翻译：提出了与半导体芯片集成的电路板结构及其制造方法。提供了形成有至少一个空腔的支撑板，并且具有多个导电触点的半导体芯片嵌入在空腔中。提供各向异性导电膜（ACF）层和在其表面上形成有多个导电触点的电路板。电路板通过ACF层压到支撑板上，其中电路板的导电触点通过ACF层电连接到芯片的导电触点，以形成与半导体芯片集成的电路板结构。

2. 发明申请

US20050224976A1 Electrical connection terminal of embedded chip and method for fabricating the same 有权
标题翻译：嵌入式芯片的电气连接端子及其制造方法
公开(公告)号：US20050224976A1
公开(公告)日：2005-10-13
申请号：US10923711
申请日：2004-08-24
申请人： Shih-Ping Hsu , Kun-Chen Tsai
发明人： Shih-Ping Hsu , Kun-Chen Tsai
IPC分类号： H01L21/60 , H01L21/768 , H01L29/84
CPC分类号： H01L24/11 , H01L23/3121 , H01L2224/05001 , H01L2224/05022 , H01L2224/05026 , H01L2224/05155 , H01L2224/05572 , H01L2224/05611 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/13099 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49135 , Y10T29/49139 , Y10T29/49144 , Y10T29/49155 , Y10T29/49158 , Y10T29/49222 , H01L2924/00 , H01L2924/00014
摘要： An electrical connection terminal of an embedded chip and a method for fabricating the same are proposed. Firstly, an insulating layer is provided on a circuit board integrated with a chip and is produced a plurality of first openings on the circuit board, wherein at least one of the first openings corresponds to a position of a conductive pad of the chip to expose the conductive pad. Then, a first metal layer is formed on the conductive pad and a conductive layer is formed on the surface of the first metal layer, insulating layer and the first openings. A patterned resist layer having a plurality of second openings is formed on the conductive layer to expose a part of the conductive layer to be subsequently deposited with a second metal layer, wherein at least one of the second openings of the resist layer is located correspondingly to the conductive pad. Subsequently, the second metal layer is formed on the exposed part of the conductive layer by an electroplating process. By such arrangement, the fabrication of the conductive structure of the conductive pad of the chip and build-up of conductive circuits on the circuit board can be simultaneously integrated to simplify processes and costs of the fabrication.
摘要翻译：提出了嵌入式芯片的电连接端子及其制造方法。首先，在与芯片集成的电路板上设置绝缘层，并且在电路板上制造多个第一开口，其中至少一个第一开口对应于芯片的导电焊盘的位置以露出导电垫。然后，在导电焊盘上形成第一金属层，在第一金属层，绝缘层和第一开口的表面上形成导电层。具有多个第二开口的图案化抗蚀剂层形成在导电层上，以暴露出随后沉积有第二金属层的导电层的一部分，其中抗蚀剂层的至少一个第二开口对应于导电垫。随后，通过电镀工艺在导电层的暴露部分上形成第二金属层。通过这种布置，芯片的导电焊盘的导电结构的制造和电路板上的导电电路的积聚可以被同时整合，以简化制造的工艺和成本。

3. 发明申请

US20030122256A1 Substrate within a Ni/Au structure electroplated on electrical contact pads and method for fabricating the same 无效
公开(公告)号：US20030122256A1
公开(公告)日：2003-07-03
申请号：US10364431
申请日：2003-02-10
申请人： Phoenix Precision Technology Corp.
发明人： Shih-Ping Hsu , Chiang-Du Chen , Yen-Hung Liu
IPC分类号： H01L023/48
CPC分类号： H01L23/49811 , H01L21/4846 , H01L2924/0002 , H05K3/243 , H05K2203/0542 , H05K2203/0577 , H05K2203/1476 , H01L2924/00
摘要： The present invention discloses a substrate within a Ni/Au structure electroplated on electrical contact pads and a method for fabricating the same. The method comprises: providing a substrate with a circuit layout pattern and forming a conducting film on the surface of the substrate; depositing a first photoresist layer within an opening on said electrical conducting film surface to expose a portion of said circuit layout pattern to be electrical contact pads; removing the exposed conducting film uncovered by the first photoresist layer; depositing a second photoresist layer, covering the conducting film exposed in the openings of the first photoresist layer; electroplating Ni/Au covering the surface of the electrical contact pads; removing the first and second photoresists, and the conducting film covered by the photoresists; depositing solder mask on the substrate within an opening to expose said electrical contact pads. It improves the electrical coupling between gold wires and the electrical contact pads of the substrate, prevents the electrical contact pads from oxidation, and insurances the electrical interconnection performance.

4. 发明授权

US07274099B2 Method of embedding semiconductor chip in support plate 有权
标题翻译：将半导体芯片嵌入支撑板的方法
公开(公告)号：US07274099B2
公开(公告)日：2007-09-25
申请号：US11510604
申请日：2006-08-28
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H01L23/12
CPC分类号： H01L21/56 , H01L23/3107 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/82 , H01L25/50 , H01L2224/24227 , H01L2224/82039 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14
摘要： A method of embedding a semiconductor chip in a support plate and an embedded structure thereof are proposed. A first dielectric layer having a reinforced filling material is provided, and a semiconductor chip is mounted on the first dielectric layer. A support plate having an opening and a second dielectric layer having a reinforced filling material are provided. The first dielectric layer mounted with the semiconductor chip, the support plate, and the second dielectric layer are pressed together, such that the semiconductor chip is received in the opening of the support plate, and the dielectric layers fill in a gap between the semiconductor chip and the opening of the support plate. The reinforced filling material of the dielectric layers can maintain flatness and consistency of the semiconductor chip embedded in the support plate, and fine circuits can be fabricated on the support plate by build-up and electroplating processes.
摘要翻译：提出了一种将半导体芯片嵌入支撑板及其嵌入结构中的方法。提供具有增强填充材料的第一电介质层，并且半导体芯片安装在第一电介质层上。提供具有开口的支撑板和具有增强填充材料的第二介电层。将安装有半导体芯片，支撑板和第二电介质层的第一电介质层压在一起，使得半导体芯片被接收在支撑板的开口中，并且电介质层填充在半导体芯片和支撑板的开口。电介质层的增强填充材料可以保持嵌入在支撑板中的半导体芯片的平坦度和一致性，并且可以通过堆积和电镀工艺在支撑板上制造精细的电路。

5. 发明授权

US07098126B2 Formation of electroplate solder on an organic circuit board for flip chip joints and board to board solder joints 失效
公开(公告)号：US07098126B2
公开(公告)日：2006-08-29
申请号：US10052989
申请日：2001-11-09
申请人： Han-Kun Hsieh , Shing-Ru Wang , I-Chung Tung
发明人： Han-Kun Hsieh , Shing-Ru Wang , I-Chung Tung
IPC分类号： H01L21/44
CPC分类号： H01L24/16 , H01L21/4853 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/81 , H01L2224/03912 , H01L2224/0401 , H01L2224/05599 , H01L2224/1147 , H01L2224/11502 , H01L2224/11849 , H01L2224/13021 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/81026 , H01L2224/81192 , H01L2224/81193 , H01L2224/812 , H01L2224/81801 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1532 , H01L2924/15787 , H01L2924/30107 , H01L2924/351 , H05K1/113 , H05K3/0094 , H05K3/3473 , H05K3/427 , H05K2201/0347 , H05K2201/0959 , H05K2203/025 , H05K2203/043 , H05K2203/054 , H01L2924/00014 , H01L2924/00
摘要： A method of fabricating electroplate solder on an organic circuit board for forming flip chip joints and board to board solder joints is disclosed. In the method, there is initially provided an organic circuit board including a surface bearing electrical circuitry that includes at least one contact pad. A solder mask layer that is placed on the board surface and patterned to expose the pad. Subsequently, a metal seed layer is deposited by physical vapor deposition, chemical vapor deposition, electroless plating with the use of catalytic copper, or electroplating with the use of catalytic copper, over the board surface. A resist layer with at least an opening located at the pad is formed over the metal seed layer. A solder material is then formed in the opening by eletroplating. Finally, the resist and the metal seed layer beneath the resist are removed.

6. 发明授权

US06910264B2 Method for making a multilayer circuit board having embedded passive components 失效
标题翻译：制造具有嵌入式无源元件的多层电路板的方法
公开(公告)号：US06910264B2
公开(公告)日：2005-06-28
申请号：US10336189
申请日：2003-01-03
申请人： I-Chung Tung
发明人： I-Chung Tung
IPC分类号： H05K1/02 , H05K1/09 , H05K1/16 , H05K3/46 , H05K3/36
CPC分类号： H05K1/162 , H05K1/0219 , H05K1/024 , H05K1/095 , H05K1/167 , H05K3/4602 , H05K3/4623 , H05K2201/0187 , H05K2201/0355 , H05K2201/09036 , H05K2201/09672 , H05K2201/09781 , H05K2203/0338 , H05K2203/0361 , H05K2203/0723 , Y10T29/49002 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
摘要： A method for fabricating a core circuit board having passive components, such as resistors, capacitors and inductors, is disclosed, which can be used to construct a multilayer circuit board having embedded passive components. In making such as a core circuit board, a resistive film which is a continuous or non-continuous is first formed on one side of a conductive foil. Two such conductive foils are laminated onto a high dielectric layer. The electrodes for various passive components or spiral coils for the inductive components and electrical circuit pattern are finally made on the same conductive foils simultaneously. Finally, a core circuit board having passive components for further making a multilayer circuit board is thus constructed.
摘要翻译：公开了一种用于制造具有诸如电阻器，电容器和电感器的无源元件的核心电路板的方法，其可用于构建具有嵌入式无源元件的多层电路板。在制造核心电路板时，首先在导电箔的一侧形成连续或不连续的电阻膜。两个这样的导电箔层压到高介电层上。用于感应部件和电路图案的各种无源部件或螺旋线圈的电极最终同时在相同的导电箔上制成。最后，构成了具有用于进一步制造多层电路板的无源元件的核心电路板。

7. 发明授权

US07419850B2 Method to manufacture a coreless packaging substrate 有权
标题翻译：制造无芯封装基板的方法
公开(公告)号：US07419850B2
公开(公告)日：2008-09-02
申请号：US11599983
申请日：2006-11-16
申请人： Bo-Wei Chen , Hsien-Shou Wang , Shih-Ping Hsu
发明人： Bo-Wei Chen , Hsien-Shou Wang , Shih-Ping Hsu
IPC分类号： H01L21/00 , H01L21/44 , H01L21/4763
CPC分类号： H05K3/4007 , H01L21/4857 , H01L21/6835 , H01L23/49822 , H01L2924/0002 , H05K1/113 , H05K3/0035 , H05K3/108 , H05K3/205 , H05K3/243 , H05K3/28 , H05K3/4682 , H05K2201/09436 , H05K2201/09563 , H05K2201/096 , H05K2203/0152 , H05K2203/0376 , H01L2924/00
摘要： A method of manufacturing a coreless packaging substrate is disclosed. The method can produce a coreless packaging substrate which comprises: at least a built-up structure having a first solder mask and a second solder mask, wherein a plurality of openings are formed in the first and second solder mask to expose the conductive pads of the built-up structure; and a plurality of solder bumps as well as solder layers formed on the conductive pads. Therefore, the invention can produce the coreless packaging substrate with high density of circuit layout, less manufacturing steps, and small size.
摘要翻译：公开了一种无芯封装基板的制造方法。该方法可以制造无芯封装衬底，其包括：至少具有第一焊料掩模和第二焊料掩模的堆积结构，其中在第一和第二焊料掩模中形成多个开口以暴露出建筑结构; 以及形成在导电焊盘上的多个焊料凸块以及焊料层。因此，本发明可以生产具有高密度电路布局，较少制造步骤和小尺寸的无芯封装衬底。

8. 发明申请

US20020189853A1 BGA substrate with direct heat dissipating structure 审中-公开
标题翻译： BGA基板具有直接散热结构
公开(公告)号：US20020189853A1
公开(公告)日：2002-12-19
申请号：US09957372
申请日：2001-09-20
申请人： Phoenix Precision Technology Corp.
发明人： Shih-Ping Hsu
IPC分类号： H05K007/20
CPC分类号： H01L23/49816 , H01L23/3677 , H01L24/48 , H01L2224/05599 , H01L2224/16 , H01L2224/32188 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/181 , H01L2924/00012
摘要： BGA substrate with direct heat dissipating structure The present invention discloses a structure of BGA substrate with direct heat-dissipating structure, said structure comprising: a heat spreader, no less than one insulating resin layer, an upper circuit layer, a lower circuit layer, and a plurality of electrically-conducting plugs. The heat spreader comprises a body part, a loading part, and a junction part. The loading part is the upper region of heat spreader. The junction part is the lower region of the heat spreader. The periphery of said junction part extends outward for forming a protruding edge. The body part is embedded into the central region of the substrate. The upper circuit layer is formed on the surface of said resin layer. The lower circuit layer is formed on lower surface of said resin layer and comprises a plurality of solder pads. The upper and lower circuit layers are conducted by electrically conductive plugs. The heat generated from chip is dissipated by heat spreader instead of heat-conducting plugs in traditional art. The cross sectional area of heat spreader is larger than the heat-conducting plug, which enhances the performance of heat dissipation.
摘要翻译：具有直接散热结构的BGA基板本发明公开了一种具有直接散热结构的BGA基板的结构，所述结构包括：散热器，不少于一个绝缘树脂层，上电路层，下电路层和多个导电插头。散热器包括主体部分，装载部分和接合部分。装载部分是散热器的上部区域。接头部分是散热器的下部区域。所述接合部分的周边向外延伸以形成突出边缘。主体部分嵌入基板的中心区域。上层电路层形成在树脂层的表面上。下电路层形成在所述树脂层的下表面上并且包括多个焊盘。上下电路层由导电插头导电。由散热器代替传统技术中的导热塞，从芯片产生的热量消散。散热器的横截面积大于导热塞，从而提高散热性能。

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