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1. 发明授权

US11832371B2 Over-voltage protection device 有权
公开(公告)号：US11832371B2
公开(公告)日：2023-11-28
申请号：US17674048
申请日：2022-02-17
申请人： INPAQ TECHNOLOGY CO., LTD.
发明人： I-Jang Teng , Chun Peng Lin , Hsiu Lun Yeh
IPC分类号： H05F3/04
CPC分类号： H05F3/04
摘要： The present disclosure provides an over-voltage protection device. The over-voltage protection device includes a substrate, a stack structure disposed over the substrate. The stack structure includes a first insulation structure, a second insulation structure, and a conductive layer. The conductive layer is disposed on the first insulation structure, and the second insulation structure is disposed on the conductive layer. The second insulation structure has an insulation air gap, which has an upper width greater than a lower width.

2. 发明申请

US20220367105A1 INTEGRATED POWER INDUCTOR WITH BOTTOM ELECTRODE WITHOUT CARRIER AND MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20220367105A1
公开(公告)日：2022-11-17
申请号：US17316746
申请日：2021-05-11
申请人： INPAQ TECHNOLOGY CO., LTD.
发明人： Cheng-Han YU , Yi-Cheng CHEN
IPC分类号： H01F27/28 , H01F27/29 , H01F41/06 , H01F41/10 , H01F41/02 , H01F27/255
摘要： A integrated power inductor integrated with bottom electrode without carrier, the power inductor is composed of a coil, a tin layer, and a magnetic powder envelope etc, wherein the wire of the coil is directly drawn to the bottom of the magnetic powder envelope without via a carrier as an electrode, thereby effectively reducing the risk of the inductor being opened due to too small or incomplete welding points between the coil and the material sheet, and can greatly improve the characteristics, reliability and manufacturing yield of the inductor,

3. 发明授权

US08933343B2 Electronic structure and electronic package component for increasing the bonding strength between inside and outside electrodes 有权
标题翻译：电子结构和电子封装组件，用于增加内外电极之间的接合强度
公开(公告)号：US08933343B2
公开(公告)日：2015-01-13
申请号：US13783643
申请日：2013-03-04
申请人： Inpaq Technology Co., Ltd.
发明人： Ming-Fung Hsieh , Yu-Chia Chang , Chun-Pin Huang , Yung-Chang Peng
IPC分类号： H05K1/16 , H05K1/03 , H05K1/09 , H05K1/11 , H05K7/00 , H01L29/40 , H05K1/18
CPC分类号： H01L23/3171 , H01G4/224 , H01G4/236 , H01L24/05 , H01L24/29 , H01L24/32 , H01L2224/02371 , H01L2224/04026 , H01L2224/04105 , H01L2224/0502 , H01L2224/05548 , H01L2224/0556 , H01L2224/05562 , H01L2224/05568 , H01L2224/291 , H01L2224/32013 , H01L2224/32058 , H01L2224/32227 , H01L2224/3315 , H01L2224/48091 , H01L2224/83815 , H01L2924/10156 , H01L2924/35121 , H05K3/3442 , H01L2924/00014 , H01L2924/00012 , H01L2924/014
摘要： An electronic structure includes a substrate body, an electronic package structure and a conductive unit. The electronic package structure is disposed on the substrate body. The electronic package structure includes a first inner electrode portion, a second inner electrode portion, a first outer electrode portion electrically connected to the first inner electrode portion, and a second outer electrode portion electrically connected to the second inner electrode portion. The conductive unit includes a first conductive body and a second conductive body respectively electrically contacting the first and the second outer electrode portions. The electronic package structure has a first notch and a second notch, the first outer electrode portion is extended into the first notch to contact the top surface of the first inner electrode portion, and the second outer electrode portion is extended into the second notch to contact the top surface of the second inner electrode portion.
摘要翻译：电子结构包括基板主体，电子封装结构和导电单元。电子封装结构设置在基板主体上。电子封装结构包括第一内部电极部分，第二内部电极部分，与第一内部电极部分电连接的第一外部电极部分和与第二内部电极部分电连接的第二外部电极部分。导电单元包括分别与第一和第二外部电极部分电接触的第一导电体和第二导电体。电子封装结构具有第一切口和第二切口，第一外部电极部延伸到第一切口以与第一内部电极部的顶面接触，第二外部电极部延伸到第二切口以接触第二内电极部分的顶表面。

4. 发明申请

US20140015714A1 PORTABLE ELECTRONIC DEVICE AND HINGE MECHANISM 有权
标题翻译：便携式电子设备和铰链机构
公开(公告)号：US20140015714A1
公开(公告)日：2014-01-16
申请号：US13547112
申请日：2012-07-12
申请人： YAN-MING HONG , PO-CHUN HUANG , CHENG-HAN SUNG , CHIH-WEI CHEN
发明人： YAN-MING HONG , PO-CHUN HUANG , CHENG-HAN SUNG , CHIH-WEI CHEN
IPC分类号： H01Q1/24
CPC分类号： H01Q1/2266 , H01Q7/00
摘要： A portable electronic device includes a casing unit, a first support unit, a second support unit, a first antenna unit, a second antenna unit, a first conducting unit and a second conducting unit. The casing unit includes a first outer casing and a second outer casing pivotally connected with the first outer casing. The first outer casing includes a hinge structure pivotally connected with the second outer casing. The first support unit includes a first support body disposed in the hinge structure, and the second support unit includes a second support body disposed in the hinge structure. The first antenna unit includes a first antenna structure disposed on the first support body and separated from the second outer casing. The second antenna unit includes a second antenna structure disposed on the second support body and separated from the second outer casing.
摘要翻译：便携式电子设备包括壳体单元，第一支撑单元，第二支撑单元，第一天线单元，第二天线单元，第一导电单元和第二导电单元。壳体单元包括第一外壳和与第一外壳枢转连接的第二外壳。第一外壳包括与第二外壳枢转连接的铰链结构。第一支撑单元包括设置在铰链结构中的第一支撑体，第二支撑单元包括设置在铰链结构中的第二支撑体。第一天线单元包括设置在第一支撑体上并与第二外壳分离的第一天线结构。第二天线单元包括设置在第二支撑体上并与第二外壳分离的第二天线结构。

5. 发明申请

US20130009740A1 COMMON MODE FILTER AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：共模滤波器及其制造方法
公开(公告)号：US20130009740A1
公开(公告)日：2013-01-10
申请号：US13429864
申请日：2012-03-26
申请人： YU CHIA CHANG , CHI LONG LIN , HUAI LUH CHANG , CHENG YI WANG
发明人： YU CHIA CHANG , CHI LONG LIN , HUAI LUH CHANG , CHENG YI WANG
IPC分类号： H01F5/00 , H01F41/00
CPC分类号： H01F41/04 , H01F17/0013 , H01F27/255 , H01F41/046 , H01F41/14 , H01F41/22 , H01F2017/0066 , H01F2017/0073 , H03H7/427 , H03H2001/0085 , Y10T29/4902 , Y10T29/49069 , Y10T29/49073 , Y10T29/49078
摘要： A common mode filter having heterogeneous laminates includes a first magnetic layer, a nonmagnetic insulating substrate, a second magnetic layer, a first coil layer, and a second coil layer. The second magnetic layer is formed on the nonmagnetic insulating substrate, between the nonmagnetic insulating substrate and the first magnetic layer. The first coil layer is disposed between the first magnetic layer and the second magnetic layer, and includes a first coil. The second coil layer is disposed between the first magnetic layer and the second magnetic layer, and includes a second coil. The first and second coil layers are separated from each other, and the first and second coils are magnetically coupled to each other.
摘要翻译：具有异质层叠体的共模滤波器包括第一磁性层，非磁性绝缘基板，第二磁性层，第一线圈层和第二线圈层。第二磁性层形成在非磁性绝缘基板上，非磁性绝缘基板与第一磁性层之间。第一线圈层设置在第一磁性层和第二磁性层之间，并且包括第一线圈。第二线圈层设置在第一磁性层和第二磁性层之间，并且包括第二线圈。第一和第二线圈层彼此分离，并且第一和第二线圈彼此磁耦合。

6. 发明授权

US08325003B2 Common mode filter and method of manufacturing the same 有权
标题翻译：共模滤波器及其制造方法
公开(公告)号：US08325003B2
公开(公告)日：2012-12-04
申请号：US13210495
申请日：2011-08-16
申请人： Liang Chieh Wu
发明人： Liang Chieh Wu
IPC分类号： H01F5/00 , H01F27/28 , H03H7/00
CPC分类号： H01F17/0013 , H01F27/292 , H01F2017/0093 , Y10T29/4913
摘要： A common mode filter includes at least two inductance unit sets. Each inductance unit set includes a coil leading layer, an insulating substrate, at least two electrically conductive columns, and a coil main body layer. The coil leading layer is disposed on a first surface of the substrate, and includes at least two leading wires, at least four leading terminals, and at least two contacts. Each leading wire respectively connects one leading terminal and one contact. The coil main body layer is disposed on a second surface of the substrate, and includes a coil lead and two end portions thereof. Each electrically conductive column extends through the substrate, connecting one contact and one end portion. The two substrates and two coil main body layers of the at least two inductance unit sets are bonded by an electrically insulating layer. The two coil main body layers are electrically isolated from each other by the electrically insulating layer.
摘要翻译：共模滤波器包括至少两个电感单元组。每个电感单元组包括线圈引导层，绝缘基板，至少两个导电柱和线圈主体层。线圈引导层设置在基板的第一表面上，并且包括至少两个导线，至少四个引导端子和至少两个触头。每个引线分别连接一个引线端子和一个触点。线圈主体层设置在基板的第二表面上，并且包括线圈引线及其两个端部。每个导电柱延伸穿过基板，连接一个触点和一个端部。至少两个电感单元组的两个基板和两个线圈主体层通过电绝缘层接合。两个线圈主体层通过电绝缘层彼此电绝缘。

7. 发明申请

US20120300369A1 CONDUCTIVE STRUCTURE HAVING AN EMBEDDED ELECTRODE, AND SOLID CAPACITOR HAVING AN EMBEDDED ELECTRODE AND METHOD OF MAKING THE SAME 有权
标题翻译：具有嵌入电极的导电结构和具有嵌入电极的固体电容器及其制造方法
公开(公告)号：US20120300369A1
公开(公告)日：2012-11-29
申请号：US13115964
申请日：2011-05-25
申请人： WEI-CHIH LEE , Ming-Tsung Chen
发明人： WEI-CHIH LEE , Ming-Tsung Chen
IPC分类号： H01G4/06 , H01G7/00 , H01G9/15
CPC分类号： H01G9/012 , H01G9/052 , H01G9/15 , Y10T29/435
摘要： A solid capacitor having an embedded electrode includes a substrate unit, a first conductive unit, a second conductive unit, a first insulative unit, a third conductive unit, a second insulative unit, and an end electrode unit. The substrate unit includes a substrate body and a conductive body embedded into the substrate body. The substrate body has a lateral opening and a plurality of top openings, and the conductive body has a lateral conductive area exposed from the lateral opening and a plurality of top conductive areas respectively exposed from the top openings. The first conductive unit includes a plurality of first conductive layers respectively covering the top conductive areas. The second conductive unit includes a second conductive layer covering the first conductive layers. The porosity rate of the second conductive layer is larger than that of each first conductive layer.
摘要翻译：具有嵌入电极的固体电容器包括基板单元，第一导电单元，第二导电单元，第一绝缘单元，第三导电单元，第二绝缘单元和端电极单元。基板单元包括基板主体和嵌入基板主体中的导电体。基板主体具有侧向开口和多个顶部开口，并且导电体具有从侧向开口暴露的横向导电区域和分别从顶部开口露出的多个顶部导电区域。第一导电单元包括分别覆盖顶部导电区域的多个第一导电层。第二导电单元包括覆盖第一导电层的第二导电层。第二导电层的孔隙率大于每个第一导电层的孔隙率。

8. 发明申请

US20120100711A1 SINGLE CHIP SEMICONDUCTOR COATING STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：单芯片半导体涂层结构及其制造方法
公开(公告)号：US20120100711A1
公开(公告)日：2012-04-26
申请号：US13343372
申请日：2012-01-04
申请人： LIANG-CHIEH WU , CHENG-YI WANG
发明人： LIANG-CHIEH WU , CHENG-YI WANG
IPC分类号： H01L21/28
CPC分类号： H01L21/568 , H01L24/27 , H01L24/29 , H01L24/30 , H01L24/33 , H01L2924/00011 , H01L2924/00013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2224/29298 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929
摘要： A manufacturing method of a single chip semiconductor coating structure includes following steps. Step 1 is providing a single chip semiconductor which has a plurality of surfaces, and two opposite surfaces selected from the plurality of surfaces are manufacturing surfaces and have a conductive area with a pad thereon, respectively. Step 2 is providing a tool to cover one of the conductive areas with the pad. Step 3 is providing a coating step to form an insulating layer on the single chip semiconductor. Step 4 is providing a removing step to remove the insulating layer for exposing the covered conductive area and the pad. Step 5 is forming two electrodes and each of the two electrodes covers the conductive area with the pad.
摘要翻译：单芯片半导体涂层结构的制造方法包括以下步骤。步骤1是提供具有多个表面的单芯片半导体，并且从多个表面中选择的两个相对表面分别是制造表面，并且在其上具有衬垫的导电区域。步骤2提供了用垫覆盖导电区域之一的工具。步骤3提供了在单芯片半导体上形成绝缘层的涂覆步骤。步骤4提供去除用于暴露被覆盖的导电区域和垫的绝缘层的去除步骤。步骤5形成两个电极，并且两个电极中的每个电极用垫覆盖导电区域。

9. 发明申请

US20110227805A1 BROADBAND ANTENNA APPLIED TO MULTIPLE FREQUENCY BAND 有权
标题翻译：宽带天线应用于多频段
公开(公告)号：US20110227805A1
公开(公告)日：2011-09-22
申请号：US12727059
申请日：2010-03-18
申请人： CHUN-CHIEH WANG , Chih-Hsin Chiu , Chih-Ming Su , Chung-Ta Yu
发明人： CHUN-CHIEH WANG , Chih-Hsin Chiu , Chih-Ming Su , Chung-Ta Yu
IPC分类号： H01Q1/36 , H01Q1/48
CPC分类号： H01Q9/0421 , H01Q5/364 , H01Q5/385
摘要： A broadband antenna includes a substrate, a ground plane, a radiating path, a shorting path, a first connection path, a second connection path and a coupling path. The ground plane has a shorting point, a first grounding point and a second grounding point. The radiating path has a feeding point and a first connecting point. Two ends of the shorting path are respectively electrically connected with the shorting point and the feeding point, and the shorting path has a second connecting point. Two ends of the first connection path are respectively connected with the first connecting point and the second connecting point. Two ends of the second connection path are respectively connected with the first grounding point and the feeding point. One end of the coupling path is connected to the second grounding point and another end of the coupling path is separated from the shorting path.
摘要翻译：宽带天线包括基板，接地平面，辐射路径，短路路径，第一连接路径，第二连接路径和耦合路径。接地平面具有短路点，第一接地点和第二接地点。辐射路径具有馈电点和第一连接点。短路路径的两端分别与短路点和馈电点电连接，短路路径具有第二连接点。第一连接路径的两端分别与第一连接点和第二连接点连接。第二连接路径的两端分别与第一接地点和馈电点相连。耦合路径的一端连接到第二接地点，耦合路径的另一端与短路路径分离。

10. 发明申请

US20110204521A1 CHIP-SCALE SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：芯片半导体器件封装及其制造方法
公开(公告)号：US20110204521A1
公开(公告)日：2011-08-25
申请号：US13030842
申请日：2011-02-18
申请人： LIANG CHIEH WU , CHENG YI WANG
发明人： LIANG CHIEH WU , CHENG YI WANG
IPC分类号： H01L23/48 , H01L21/50
CPC分类号： H01L23/3107 , H01L23/3114 , H01L23/315 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： A chip-scale semiconductor device package includes a die, an insulating substrate having a through hole, a first metal layer, a second metal layer, and an insulating layer. The first metal layer is on a first surface of the insulating substrate and a first side of the through hole. The insulating layer is overlaid on a second surface of the insulating substrate and surrounds a second side of the through hole. The second metal is on the insulating layer and the second side of the through hole. The die is in the through hole and includes a first electrode and a second electrode. The first electrode is electrically connected to the first metal layer, and the second electrode is electrically connected to the second metal layer.
摘要翻译：芯片级半导体器件封装包括管芯，具有通孔的绝缘基板，第一金属层，第二金属层和绝缘层。第一金属层位于绝缘基板的第一表面和通孔的第一侧上。绝缘层覆盖在绝缘基板的第二表面上并且围绕通孔的第二侧。第二金属位于绝缘层和通孔的第二面上。模具在通孔中并且包括第一电极和第二电极。第一电极与第一金属层电连接，第二电极与第二金属层电连接。

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