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1. 发明申请

US20030153127A1 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20030153127A1
公开(公告)日：2003-08-14
申请号：US10342238
申请日：2003-01-15
申请人： Hitachi, Ltd. Hitachi ULSI Systems Co., Ltd.
发明人： Takashi Wada , Kazunari Suzuki , Chuichi Miyazaki , Toshihiro Shiotsuki , Tomoko Higashino
IPC分类号： H01L021/44
CPC分类号： H01L24/83 , H01L23/3128 , H01L23/3164 , H01L23/5387 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/75 , H01L24/97 , H01L25/0657 , H01L2221/68336 , H01L2224/29111 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/73265 , H01L2224/83192 , H01L2224/83194 , H01L2224/8385 , H01L2224/92 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/10253 , H01L2924/14 , H01L2924/1517 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/3512 , H01L2224/13111 , H01L2924/00015 , H01L2224/05599 , H01L2924/00012
摘要： Techniques are provided for preventing occurrence of damage to the top surface of a semiconductor chip at the time of die bonding the semiconductor chip by use of a contact collet. A protection tape is pasted to the top surface of the semiconductor chip before die bonding of the semiconductor chip is executed by pressing the back surface (underside) of the semiconductor chip sucked and securely held by the contact collect against respective chip-mounting regions of a multi-wiring board. The contact collect is, for example, substantially cylindrical in outside shape, and a bottom part (suction head) thereof is made of a soft synthetic rubber, and so forth. The protection tape pasted to pasted to the top surface of the semiconductor chip can prevent the top surface of the semiconductor chip from coming in direct contact with the contact collet even at the time of vacuum suction by pressing the suction head of the contact collect against the top surface of the semiconductor chip.
摘要翻译：提供技术来防止在使用接触夹头芯片接合半导体芯片时对半导体芯片的顶表面造成的损坏。将半导体芯片的裸片接合之前，通过将被触点收集并牢固地保持的半导体芯片的背面（下侧）按压到相应的芯片安装区域，将保护带粘贴到半导体芯片的顶表面多线路板接触收集体例如是大致圆筒形的外形，其底部（吸头）由软质合成橡胶制成，等等。粘贴到半导体芯片顶表面上的保护胶带可以防止半导体芯片的顶表面甚至在真空抽吸时直接与接触夹头接触，通过将接触件的吸头压靠半导体芯片的顶面。

2. 发明申请

US20020024062A1 Semiconductor integrated circuit 失效
标题翻译：半导体集成电路
公开(公告)号：US20020024062A1
公开(公告)日：2002-02-28
申请号：US09886026
申请日：2001-06-22
申请人： Hitachi, Ltd. Hitachi ULSI Systems Co., Ltd.
发明人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
IPC分类号： H01L031/0328
CPC分类号： G11C29/848 , G11C29/028 , G11C29/44 , G11C29/50012 , G11C29/787 , G11C29/789 , G11C29/802 , G11C2029/1208 , G11C2029/4402
摘要： A semiconductor integrated circuit having therein a plurality of memories, realizing an improved yield by efficiently repairing a defective bit in a memory. This semiconductor integrated circuit has: a plurality of circuit blocks (RAM macro cells) each having an identification code coincidence detecting circuit for determining whether an input identification code coincides with a self identification code or not and a reception data latch and performing an operation according to latched data; a setting circuit capable of setting the identification code and information corresponding to the identification code and serially outputting the set information; and a control circuit capable of sequentially reading the setting information from the setting circuit, converting the setting information to parallel data, and transferring the parallel data to the plurality of circuit blocks. Each of the plurality of circuit blocks captures and holds the setting information transferred when the identification code coincidence detecting circuit determines that the input identification code and the self identification code coincide with each other.
摘要翻译：一种其中具有多个存储器的半导体集成电路，通过有效地修复存储器中的有缺陷的位来实现提高的产量。该半导体集成电路具有：多个电路块（RAM宏单元），每个电路块具有识别码重合检测电路，用于确定输入的识别码是否与自身识别码一致;以及接收数据锁存器，并执行根据锁定数据; 设置电路，其能够设置与识别码相对应的识别码和信息，并且串行地输出设定信息; 以及控制电路，其能够从设置电路顺序读取设置信息，将设置信息转换为并行数据，并将并行数据传送到多个电路块。当识别码重合检测电路确定输入的识别码和自识别码彼此一致时，多个电路块中的每一个捕获并保持传送的设置信息。

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