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1. 发明授权

US5648737A Method of setting the polarity of a digital signal, and integrated circuits implementing the method 失效
标题翻译：设置数字信号的极性的方法以及实现该方法的集成电路
公开(公告)号：US5648737A
公开(公告)日：1997-07-15
申请号：US578396
申请日：1995-12-26
申请人： Vianney Andrieu
发明人： Vianney Andrieu
IPC分类号： G06F13/40 , H03K3/037 , H03K3/356 , H03K5/13
CPC分类号： G06F13/4077 , H03K3/037 , H03K3/356026
摘要： A method of setting the polarity of a digital signal coming from a first integrated circuit, said digital signal being representative of data generated within the integrated circuit and requiring application to an input of a second integrated circuit that requires a predetermined polarity. The method comprises storing the required polarity externally to said first integrated circuit at its digital signal output, an acquisition sequence for acquiring the stored polarity while the data is inactive, and an application sequence for applying the acquired polarity to the information when active in order to generate on an output of said first integrated circuit the digital signal for application to the input of said second integrated circuit. The method is applicable in digital systems that include integrated circuits that may come from different sources.
摘要翻译：一种设置来自第一集成电路的数字信号的极性的方法，所述数字信号代表在集成电路内产生的数据，并且需要应用于需要预定极性的第二集成电路的输入。该方法包括在数字信号输出时向所述第一集成电路外部存储所需的极性，在数据不活动时用于获取所存储的极性的获取序列，以及当所获取的极性在激活时将所获取的极性应用于信息，以便在所述第一集成电路的输出上生成用于应用于所述第二集成电路的输入的数字信号。该方法适用于包含可能来自不同来源的集成电路的数字系统。

2. 发明授权

US5619536A Digital superheterodyne receiver and baseband filter method used therein 失效
标题翻译：数字超外差接收机和基带滤波方法
公开(公告)号：US5619536A
公开(公告)日：1997-04-08
申请号：US212730
申请日：1994-03-14
申请人： Frederic Gourgue
发明人： Frederic Gourgue
IPC分类号： H04B1/06 , H03D3/00 , H03H17/00 , H03H17/02 , H04B1/30 , H04B14/06 , H04L25/03 , H04L27/06
CPC分类号： H04B1/30 , H03D3/007 , H03D2200/005 , H03D2200/006
摘要： A digital receiver includes an antenna for picking up signals, a converter for converting an incoming signal to a predetermined intermediate frequency, and baseband processor. The receiver further includes an analog/digital converter using oversampling relative to the bandwidth of the signal and receiving the intermediate frequency signal at its input, and decimation filters receiving the output signal from the analog/digital converter and having their outputs connected to the baseband processor.
摘要翻译：数字接收机包括用于拾取信号的天线，用于将输入信号转换为预定中间频率的转换器和基带处理器。该接收器还包括一个模拟/数字转换器，它使用相对于信号带宽的过采样，并在其输入端接收中频信号，并且抽取滤波器接收来自模拟/数字转换器的输出信号并将其输出连接到基带处理器。

3. 发明授权

US5465394A Device for fixing the duration of waiting periods between attempts to establish a connection between a terminal and a mobile radio system 失效
标题翻译：用于在建立终端和移动无线电系统之间的连接的尝试之间固定等待时间段的装置
公开(公告)号：US5465394A
公开(公告)日：1995-11-07
申请号：US166958
申请日：1993-12-15
申请人： Francis Pinault , Christophe Jouin
发明人： Francis Pinault , Christophe Jouin
IPC分类号： H04B7/26 , H04W52/02 , H04B1/034
CPC分类号： H04W52/0261 , Y02B60/50
摘要： A device for seeking a connection between a terminal and a mobile radio system includes a synchronization unit for establishing in response to a control signal if the connection can be achieved and a time-delay unit for producing, after an initial period, the control signal after a first waiting period. The time-delay unit produces the control signal again after a second waiting period if it is established that the connection cannot be achieved after the first waiting period. The time-delay unit fixes the duration of the second waiting period so that it is greater than that of the first waiting period. If the device is implemented in a terminal having a battery whose capacity is represented by a capacity indicator, the time-delay unit fixes at least one of the waiting periods according to the capacity indicator.
摘要翻译：用于寻求终端和移动无线电系统之间的连接的设备包括：同步单元，用于响应于控制信号建立连接是否可以实现;以及延时单元，用于在初始时段之后产生控制信号之后的控制信号第一个等待期如果确定在第一等待周期之后不能实现连接，则延时单元在第二等待周期之后再次产生控制信号。时间延迟单元固定第二等待周期的持续时间，使其大于第一等待周期的持续时间。如果设备实现在具有由容量指示符表示的电池的终端中，则延时单元根据容量指示器来固定至少一个等待时段。

4. 发明授权

US5329550A Signal processing circuit for the European digital cellular radio system 失效
标题翻译：用于欧洲数字蜂窝无线电系统的信号处理电路
公开(公告)号：US5329550A
公开(公告)日：1994-07-12
申请号：US791401
申请日：1991-11-14
申请人： Emmanuel Rousseau , Luc Dartois
发明人： Emmanuel Rousseau , Luc Dartois
IPC分类号： G10L19/00 , H04B1/40 , H04B7/26 , H04M1/00 , H04W88/02 , H04B1/38 , H04L5/16
CPC分类号： H04W88/02 , G10L19/012 , H04B1/40
摘要： A signal processing circuit for the European digital cellular radio system continuously exchanging speech samples with a converter circuit (AD), exchanging baseband digital signals with a radio circuit (R) and exchanging data and signalling information with a control circuit (C) which also transmit control signals to it. The circuit comprises a control operator (CO), a processor (P) which controls an audio operator (AO) and a radio operator (RO), the audio operator (AO) receiving and producing the speech samples and transmitting them to the processor and receiving them from the processor in the form of groups of samples, the radio operator (RO) receiving and producing the baseband digital signals and transmitting them to the processor and receiving them from the processor in the form of batches, the control operator (CO) routing and formatting the data, the signalling information and the processor control signals, the processor (P) being adapted to apply digital processing to the signal, in particular in a terminal, on the basis of information produced by the operators and to produce the information addressed to the operators and being thus relieved of the processing operations carred out by the operators.
摘要翻译：一种用于欧洲数字蜂窝无线电系统的信号处理电路，与转换器电路（AD）连续交换语音样本，与无线电电路（R）交换基带数字信号，并与控制电路（C）交换数据和信令信息，该控制电路控制信号给它。该电路包括控制操作器（CO），控制音频操作器（AO）的处理器（P）和无线电操作器（RO）），音频操作器（AO）接收和产生语音样本并将其发送到处理器无线电操作员（RO）接收并产生基带数字信号并将其发送到处理器并以批量的形式从处理器接收它们，控制操作员（CO）路由和格式化数据，信令信息和处理器控制信号，处理器（P）适于基于由操作者产生的信息并且产生信息来对信号（特别是终端）应用数字处理致力于操作员，并因此减轻了操作人员的处理操作。

5. 发明授权

US5809416A Device for seeking connection of a terminal to a network of a mobile radio system comprising a plurality of networks 失效
标题翻译：用于寻求终端连接到包括多个网络的移动无线电系统的网络的设备
公开(公告)号：US5809416A
公开(公告)日：1998-09-15
申请号：US767297
申请日：1996-12-16
申请人： Francis Pinault , Christophe Jouin
发明人： Francis Pinault , Christophe Jouin
IPC分类号： H04W24/00 , H04W48/18 , H04W52/02 , H04W76/02 , H04Q7/00
CPC分类号： H04W48/18 , H04W48/20 , H04W52/0245 , H04W76/02
摘要： A connection seeking device in a terminal of a mobile radio system seeks connection of the terminal to one network of a system which includes a plurality of networks. The system extends over a plurality of geographical entities each having at least one network. The terminal is affiliated to a home network belonging to a geographical entity of origin. The device seeks the connection to the home network when the terminal is connected to a network which does not belong to the geographical entity of origin.
摘要翻译：移动无线电系统的终端中的连接寻找装置寻求终端与包括多个网络的系统的一个网络的连接。该系统在每个具有至少一个网络的多个地理实体上延伸。该终端隶属于属于原始地理实体的归属网络。当终端连接到不属于原始地理实体的网络时，设备寻求到家庭网络的连接。

6. 发明授权

US5613224A Portable mobile radio transceiver 失效
标题翻译：便携式移动无线电收发器
公开(公告)号：US5613224A
公开(公告)日：1997-03-18
申请号：US587702
申请日：1996-01-19
申请人： Gerard Auvray
发明人： Gerard Auvray
IPC分类号： H04B1/38 , H01Q1/08 , H01Q1/12 , H01Q1/24 , H04B7/15 , H04B7/185
CPC分类号： H04B1/3833 , H01Q1/084 , H01Q1/242 , H04B7/18571
摘要： A portable mobile radio transceiver for direct communication with a radio relay on a satellite comprises a casing with a microphone and an earpiece and an antenna mounted on the casing. The main direction of radiation of the antenna is substantially vertical when the casing is in a position of use in which it is held in the hand near the head of the user.
摘要翻译：用于与卫星上的无线电中继器直接通信的便携式移动无线电收发器包括具有麦克风的壳体，以及安装在壳体上的耳机和天线。当壳体处于使用位置时，天线的辐射的主要方向基本上是垂直的，其中它被保持在靠近使用者头部的手中。

7. 发明授权

US5380997A Smart card reader 失效
标题翻译：智能卡读卡器
公开(公告)号：US5380997A
公开(公告)日：1995-01-10
申请号：US80084
申请日：1993-06-21
申请人： Marc Hania , Rene-Claude Ozouf
发明人： Marc Hania , Rene-Claude Ozouf
IPC分类号： G06K17/00 , G06K7/00 , G06K13/063 , H01R13/62
CPC分类号： G06K7/0082 , G06K7/0021
摘要： Resilient wipers (4a, 4b) cooperate with inclined planes (13a, 13b) to maintain the card (7) constantly parallel to the base part (1) of the card reader during the introduction of the card into the reading compartment (12). The free ends of the wipers (4a, 4b) are biased into a plane further from that of the base part (1) than that which the free ends of the reading wipers (3a, 3b) tend to assume. This device is simple and compact and makes it possible to eliminate static electricity created by the card rubbing against the card reader.
摘要翻译：弹性擦拭器（4a，4b）与倾斜平面（13a，13b）配合，以在将卡引入阅读室（12）期间将卡（7）恒定地平行于读卡器的基部（1）保持平行。擦拭器（4a，4b）的自由端被偏压到比底座部件（1）的自由端更远离读取刮水器（3a，3b）的自由端倾向于的位置。该设备简单紧凑，可以消除卡片卡片读卡器摩擦所产生的静电。

8. 发明授权

US5307472A Data transfer interface module 失效
标题翻译：数据传输接口模块
公开(公告)号：US5307472A
公开(公告)日：1994-04-26
申请号：US724629
申请日：1991-07-02
申请人： Alain Chateau , Emmanuel Rousseau
发明人： Alain Chateau , Emmanuel Rousseau
IPC分类号： G06F11/00 , G06F13/00 , G11C7/00 , H04L13/08 , G06F12/02
CPC分类号： H04L13/08
摘要： A data transfer interface module comprises a storage zone constituted by a plurality of locations referenced by addresses provided by an address generator and serving to acquire a set of data items constituting a block of a size that may be variable, which data items are stored successively in the plurality locations; a control signal COM via control circuit and an acquisition and recording circuit to enable address generation and also loading in the storage zone, the same control circuit in association with a read and transmission circuit then enabling the data to be transmitted, with the data items being extracted one by one from the locations, such that the first item to be transmitted is the last item to have been recorded; and a monitor circuit controlled by the address generator and serving to verify that the number Do of data items transmitted is equal to the number Di of data items acquired and to provide a status word ST which can be read to provide information about proper transmission.
摘要翻译：一种数据传输接口模块，包括由地址发生器提供的由地址引用的多个位置构成的存储区域，用于获取构成大小可变的块的一组数据项，这些数据项被连续地存储在多个位置; 通过控制电路的控制信号COM以及采集和记录电路，以使地址生成并在存储区域中加载，与读和发送电路相关联的相同控制电路，然后使数据可以被发送，数据项为从所述位置一个接一个地提取，使得要发送的第一个项目是要被记录的最后一个项目; 以及由地址发生器控制并用于验证所发送的数据项的数量Do等于所获取的数据项的数量Di并且提供可被读取以提供关于正确传输的信息的状态字ST的监视器电路。

9. 发明授权

US5309444A Integrated circuit including a test cell for efficiently testing the accuracy of communication signals between a standard cell and an application cell 失效
标题翻译：集成电路包括用于有效测试标准单元和应用单元之间的通信信号精度的测试单元
公开(公告)号：US5309444A
公开(公告)日：1994-05-03
申请号：US739544
申请日：1991-08-02
申请人： Luc Dartois , Jacques Dulongpont , Peter Reusens
发明人： Luc Dartois , Jacques Dulongpont , Peter Reusens
IPC分类号： G06F11/22 , G01R31/3185 , G06F9/06 , G06F11/267 , G11C29/04 , G06F11/00
CPC分类号： G06F11/2236 , G01R31/318541
摘要： The present invention concerns an integrated circuit (1) comprising a standard cell (4), an application cell (2) and a test cell (3) designed in particular to store or to modify from outside the integrated circuit the value of communication signals passing between the standard cell and the application cell. The standard cell executing instructions provided on an instruction bus (3B4) by a program memory located in the application cell in response to an instruction address carried by an instruction address bus (3A4), the conductors of these buses constituting communication links. The integrated circuit further includes a branching circuit for replacing at least one erroneous instruction from the program memory with a replacement instruction previously stored in the integrated circuit in response to a predetermined state of the communication links.
摘要翻译：本发明涉及一种集成电路（1），包括标准单元（4），应用单元（2）和测试单元（3），其特别设计用于从集成电路的外部存储或修改通信信号通过的值在标准单元和应用单元之间。响应于指令地址总线（3A4）所携带的指令地址，位于应用单元中的程序存储器在指令总线（3B4）上提供的标准单元执行指令，这些总线的导体构成通信链路。集成电路还包括分支电路，用于响应于通信链路的预定状态，用预先存储在集成电路中的替换指令从程序存储器中替换至少一个错误指令。

10. 发明授权

US5267273A Clock signal generator using fractional frequency division and control thereof 失效
$Clock signal generator using fractional frequency division and control thereof$
标题翻译：时钟信号发生器使用分数分频和控制
公开(公告)号：US5267273A
公开(公告)日：1993-11-30
申请号：US750171
申请日：1991-08-26
申请人： Luc Dartois , Peter Reusens , Etienne Vanzieleghen
发明人： Luc Dartois , Peter Reusens , Etienne Vanzieleghen
IPC分类号： H03K23/64 , H03K23/66 , H04L7/00
CPC分类号： H03K23/662
摘要： A clock signal generator using fractional frequency division is provided comprising a division circuit that produces a clock signal starting from a timing rhythm signal. The frequencies of the two signals are in a division ratio which is the sum of a whole part and a fractional part. A pulse subtractor is provided for receiving the rhythm signal and transmitting it to the division circuit while deleting at least one pulse from this signal upon a command. An accumulator commands a pulse subtractor on each occasion when the product of the number of pulses of the clock signal counted, starting from a time of origin and of the fractional part, changes by unity.
摘要翻译：提供了使用分数分频的时钟信号发生器，其包括从定时节奏信号开始产生时钟信号的分频电路。两个信号的频率是分数比，它是整个零件和小数部分的总和。提供脉冲减法器用于接收节奏信号并将其发送到分频电路，同时在命令中从该信号中删除至少一个脉冲。当从原点时间和小数部分开始计数的时钟信号的脉冲数的乘积乘以1时，累加器会在每种情况下指令脉冲减法器。

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