专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06885542B2 Capacitor structure 失效
标题翻译：电容结构
公开(公告)号：US06885542B2
公开(公告)日：2005-04-26
申请号：US10932503
申请日：2004-09-02
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L21/02 , H01L21/8242 , H01G4/228
CPC分类号： H01L27/10852 , H01L28/82
摘要： A capacitor is formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.
摘要翻译：电容器形成为具有大致凹入的形状并且具有可选的折叠或回旋表面。凹形形状在小体积内优化表面积，从而使电容器能够保持大量电荷，从而有助于微电子领域中的增加的小型化努力。电容器以与电致密DRAM阵列一致的微电子方式制造。制造方法包括具有在半导体衬底表面上方延伸的存储节点的堆叠构造。

2. 发明授权

US06459116B1 Capacitor structure 有权
公开(公告)号：US06459116B1
公开(公告)日：2002-10-01
申请号：US09283606
申请日：1999-04-01
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L27108
CPC分类号： H01L27/10852 , H01L28/82
摘要： The present invention is directed to fabrication of a capacitor formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.

3. 发明授权

US06787839B2 Capacitor structure 有权
公开(公告)号：US06787839B2
公开(公告)日：2004-09-07
申请号：US10145435
申请日：2002-05-14
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L27108
CPC分类号： H01L27/10852 , H01L28/82
摘要： The present invention is directed to fabrication of a capacitor formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.

4. 发明授权

US6043119A Method of making a capacitor 失效
标题翻译：制作电容器的方法
公开(公告)号：US6043119A
公开(公告)日：2000-03-28
申请号：US906213
申请日：1997-08-04
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L27/10852 , H01L28/82
摘要： The present invention is directed to fabrication of a capacitor formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.
摘要翻译：本发明涉及一种电容器的制造，该电容器形成为具有大致凹入形状且具有可选择的折叠或回旋表面。凹形形状在小体积内优化表面积，从而使电容器能够保持大量电荷，从而有助于微电子领域中的增加的小型化努力。电容器以与电致密DRAM阵列一致的微电子方式制造。制造方法包括具有在半导体衬底表面上方延伸的存储节点的堆叠构造。

5. 发明申请

US20050030697A1 CAPACITOR STRUCTURE 失效
标题翻译：电容结构
公开(公告)号：US20050030697A1
公开(公告)日：2005-02-10
申请号：US10932503
申请日：2004-09-02
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L21/02 , H01L21/8242 , H01G4/30
CPC分类号： H01L27/10852 , H01L28/82
摘要： A capacitor is formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.
摘要翻译：电容器形成为具有大致凹入的形状并且具有可选的折叠或回旋表面。凹形形状在小体积内优化表面积，从而使电容器能够保持大量电荷，从而有助于微电子领域中的增加的小型化努力。电容器以与电致密DRAM阵列一致的微电子方式制造。制造方法包括具有在半导体衬底表面上方延伸的存储节点的堆叠构造。

6. 发明授权

US06740923B2 Capacitor structure 有权
标题翻译：电容结构
公开(公告)号：US06740923B2
公开(公告)日：2004-05-25
申请号：US10145250
申请日：2002-05-14
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L31119
CPC分类号： H01L27/10852 , H01L28/82
摘要： The present invention is directed to fabrication of a capacitor formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.
摘要翻译：本发明涉及一种电容器的制造，该电容器形成为具有大致凹入形状且具有可选择的折叠或回旋表面。凹形形状在小体积内优化表面积，从而使电容器能够保持大量电荷，从而有助于微电子领域中的增加的小型化努力。电容器以与电致密DRAM阵列一致的微电子方式制造。制造方法包括具有在半导体衬底表面上方延伸的存储节点的堆叠构造。

7. 发明授权

US06682984B1 Method of making a concave capacitor 有权
标题翻译：制作凹电容器的方法
公开(公告)号：US06682984B1
公开(公告)日：2004-01-27
申请号：US09535483
申请日：2000-03-24
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L2120
CPC分类号： H01L27/10852 , H01L28/82
摘要： The present invention is directed to fabrication of a capacitor formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.
摘要翻译：本发明涉及一种电容器的制造，该电容器形成为具有大致凹入形状且具有可选择的折叠或回旋表面。凹形形状在小体积内优化表面积，从而使电容器能够保持大量电荷，从而有助于微电子领域中的增加的小型化努力。电容器以与电致密DRAM阵列一致的微电子方式制造。制造方法包括具有在半导体衬底表面上方延伸的存储节点的堆叠构造。

8. 发明授权

US5786250A Method of making a capacitor 失效
标题翻译：制作电容器的方法
公开(公告)号：US5786250A
公开(公告)日：1998-07-28
申请号：US818597
申请日：1997-03-14
申请人： Zhiqiang Wu , Li Li , Kunal Parekh
发明人： Zhiqiang Wu , Li Li , Kunal Parekh
IPC分类号： H01L21/02 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/1085 , H01L27/10817 , H01L28/82 , H01L28/84 , H01L28/90
摘要： A method of the present invention forms a vertically oriented structure connected with a source/drain region through an open space. In one embodiment of the method wherein a capacitor storage node is formed, the open space is located between two word line gate stacks in a MOS DRAM memory circuit. A thin landing pad is formed of conducting material in the open space extending to the source/drain region and over the tops of the gate stacks. An insulating layer is formed over the gate stacks and the landing pad. A recess is etched down through the insulating layer to expose an annular portion of the landing pad. A volume of the insulating material is left upon the landing pad in the open space. A conductive layer is deposited in the recess making contact with the exposed annular portion of the landing pad. A dry etching process is used to remove a segment of the conductive layer formed over the volume of insulating material upon the landing pad, after which the volume of insulating material upon the landing pad is removed. Remaining is a storage node made upon of a continuous layer of conductive material that lines the recess and the open space. A dielectric layer and a cell plate are in one embodiment formed over the continuous layer of conducting material so as to extend down into the open space, thus completing a container capacitor.
摘要翻译：本发明的方法形成了通过开放空间与源极/漏极区域连接的垂直取向结构。在其中形成电容器存储节点的方法的一个实施例中，开放空间位于MOS DRAM存储器电路中的两个字线栅极叠层之间。薄的着陆板由导电材料形成，该导电材料在延伸到源极/漏极区域以及栅极堆叠顶部的开放空间中。绝缘层形成在栅极叠层和着陆焊盘上。通过绝缘层向下蚀刻凹陷以暴露着陆垫的环形部分。绝缘材料的体积留在开放空间中的着陆垫上。导电层沉积在与着陆焊盘暴露的环形部分接触的凹部中。使用干蚀刻工艺去除在着陆焊盘上形成在绝缘材料体积上的导电层的段，之后移除着陆焊盘上的绝缘材料的体积。剩余的是由连续的导电材料层制成的存储节点，其导引凹槽和开放空间。在一个实施例中，在导电材料的连续层上形成电介质层和电池板，以便向下延伸到开放空间中，从而完成容器电容器。

9. 发明授权

US06756627B1 Container capacitor 失效
标题翻译：集装箱电容器
公开(公告)号：US06756627B1
公开(公告)日：2004-06-29
申请号：US09033290
申请日：1998-03-02
申请人： Zhiquiang Wu , Li Li , Kunal Parekh
发明人： Zhiquiang Wu , Li Li , Kunal Parekh
IPC分类号： H01L27108
CPC分类号： H01L27/1085 , H01L27/10817 , H01L28/82 , H01L28/84 , H01L28/90
摘要： A method of the present invention forms a vertically oriented structure connected with a source/drain region through open space. In one embodiment of the method wherein a capacitor storage node is formed, the open space is located between two word line gate stacks in a MOS DRAM memory circuit. A thin landing pad is formed of conducting material in the open space extending to the source/drain region and over the tops of the gate stacks. An insulating layer is formed over the gate stacks and the landing pad. A recess is etched down through the insulating layer to expose an annular portion of the landing pad. A volume of the insulating material is left upon the landing pad in the open space. A conductive layer is deposited in the recess making contact with the exposed annular portion of the landing pad. A dry etching process is used to remove a segment of the conductive layer formed over the volume of insulating material upon the landing pad, after which the volume of insulating material upon the landing pad is removed. Remaining is a storage node made upon of a continuous layer of conductive material that lines the recess and the open space. A dielectric layer and a cell plate are in one embodiment formed over the continuous layer of conducting material so as to extend down into the open space, thus completing a container capacitor.
摘要翻译：本发明的方法形成了通过开放空间与源/漏区连接的垂直定向结构。在其中形成电容器存储节点的方法的一个实施例中，开放空间位于MOS DRAM存储器电路中的两个字线栅极叠层之间。薄的着陆板由导电材料形成，该导电材料在延伸到源极/漏极区域以及栅极堆叠顶部的开放空间中。绝缘层形成在栅极叠层和着陆焊盘上。通过绝缘层向下蚀刻凹陷以暴露着陆垫的环形部分。绝缘材料的体积留在开放空间中的着陆垫上。导电层沉积在与着陆焊盘暴露的环形部分接触的凹部中。使用干蚀刻工艺去除在着陆焊盘上形成在绝缘材料体积上的导电层的段，之后移除着陆焊盘上的绝缘材料的体积。剩余的是由连续的导电材料层制成的存储节点，其导引凹槽和开放空间。在一个实施例中，在导电材料的连续层上形成电介质层和电池板，以便向下延伸到开放空间中，从而完成容器电容器。

10. 发明申请

US20090315154A1 SEMICONDUCTOR WITH THROUGH-SUBSTRATE INTERCONNECT 有权
标题翻译：具有通孔基板互连的半导体
公开(公告)号：US20090315154A1
公开(公告)日：2009-12-24
申请号：US12142251
申请日：2008-06-19
申请人： Kyle Kirby , Kunal Parekh
发明人： Kyle Kirby , Kunal Parekh
IPC分类号： H01L23/48 , H01L21/768 , H01L21/8234
CPC分类号： H01L21/743 , H01L21/26513 , H01L21/76802 , H01L21/76831 , H01L21/76877 , H01L21/76895 , H01L21/76898 , H01L21/823475 , H01L23/481 , H01L23/49816 , H01L27/0694 , H01L27/10888 , H01L27/10894 , H01L29/66568 , H01L29/78 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548
摘要： Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor substrate. A top region of the metal interconnect is located vertically below a horizontal plane containing a metal routing layer. Method of fabricating the semiconductor device can include etching a via into a semiconductor substrate, filling the via with a metal material, forming a metal routing layer subsequent to filling the via, and removing a portion of a bottom of the semiconductor substrate to expose a bottom region of the metal filled via.
摘要翻译：描述了具有垂直延伸穿过器件的一部分到半导体衬底背面的金属互连的半导体器件。金属互连的顶部区域垂直位于包含金属布线层的水平平面的下方。制造半导体器件的方法可以包括将通孔蚀刻到半导体衬底中，用金属材料填充通孔，在填充通孔之后形成金属布线层，以及去除半导体衬底的底部的一部分以露出底部金属填充通孔的区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式