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1. 发明申请

US20110073999A1 MIXED ALLOY LEAD FRAME FOR PACKAGING POWER SEMICONDUCTOR DEVICES AND ITS FABRICATION METHOD 审中-公开
标题翻译：用于包装功率半导体器件的混合合金引线框架及其制造方法
公开(公告)号：US20110073999A1
公开(公告)日：2011-03-31
申请号：US12652881
申请日：2010-01-06
申请人： Zhi Qiang Niu , Jun Lu , Tao Feng
发明人： Zhi Qiang Niu , Jun Lu , Tao Feng
IPC分类号： H01L23/34 , H01L23/495 , H01L21/50
CPC分类号： H01L21/4871 , H01L21/4821 , H01L23/49562 , H01L23/49568 , H01L24/39 , H01L24/48 , H01L24/49 , H01L24/85 , H01L24/97 , H01L2224/0603 , H01L2224/451 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/83801 , H01L2224/84801 , H01L2224/85 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/00 , H01L2224/05599 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： This invention discloses a mixed alloy lead frame for power semiconductor devices, which includes a plurality of heat sinks and a pin array; the heat sinks are made of the first material, with positioning holes on their upper parts and welding zones at the center of their lower parts, while the pin array is made of the second material, which is different from the first material, with a plurality of sets of terminals leading out from its upper end and lower end respectively. The heat sinks are positioned on the lead frame assembly welding plate, the pin is positioned in the area between the upper heat sinks and lower heat sinks on the lead frame assembly welding plate. The mixed alloy lead frame for power semiconductor devices in this invention improves the heat dissipation of lead frame, reduces the fabrication cost of lead frame, and enhances the flexibility of fabrication.
摘要翻译：本发明公开了一种用于功率半导体器件的混合合金引线框架，其包括多个散热器和引脚阵列; 散热器由第一材料制成，其上部具有定位孔，在其下部中心处具有焊接区，而销阵列由与第一材料不同的第二材料制成，具有多个的端子分别从其上端和下端引出。散热器定位在引线框组件焊接板上，引脚定位在引线框组件焊接板上的上散热器和下散热器之间的区域中。本发明的功率半导体装置用混合合金引线框架，改善了引线框架的散热，降低了引线框架的制造成本，提高了制造的灵活性。

2. 发明申请

US20150171000A1 SEMICONDUCTOR DEVICE FOR RESTRAINING CREEP-AGE PHENOMENON AND FABRICATING METHOD THEREOF 有权
标题翻译：用于限制蠕变时间的半导体器件及其制造方法
公开(公告)号：US20150171000A1
公开(公告)日：2015-06-18
申请号：US14105473
申请日：2013-12-13
申请人： Zhi Qiang Niu , Hamza Yilmaz , Jun Lu , Fei Wang
发明人： Zhi Qiang Niu , Hamza Yilmaz , Jun Lu , Fei Wang
IPC分类号： H01L23/495
CPC分类号： H01L23/49503 , H01L21/561 , H01L23/3107 , H01L23/3121 , H01L23/49534 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2224/04034 , H01L2224/04042 , H01L2224/0603 , H01L2224/06051 , H01L2224/06181 , H01L2224/291 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/371 , H01L2224/40247 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2224/73263 , H01L2224/73265 , H01L2224/84801 , H01L2224/8485 , H01L2224/97 , H01L2924/00014 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/1815 , H01L2224/85 , H01L2224/83 , H01L2924/00012 , H01L2224/84 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates generally to a semiconductor device and, more specifically, to optimizing the creep-age distance of the power semiconductor device and a preparation method thereof. The power semiconductor device includes a chip mounting unit with a die paddle and a plurality of leads arraged side by side located close to one side edge of the die paddle in a non-equidistant manner, a semiconductor chip attached on the die paddle, and a plastic packaging body covering the die paddle, the semiconductor chip, where the plastic packing body includes a plastic extension portion covering at least a part of a lead shoulder of a lead to obtain better electrical safety distance between the terminals of the semiconductor device, thus voltage creep-age distance of the device is increased.
摘要翻译：本发明一般涉及一种半导体器件，更具体地，涉及优化功率半导体器件的蠕变寿命距离及其制备方法。功率半导体器件包括具有管芯焊盘的芯片安装单元和以非等距离方式位于接近管芯焊盘的一个侧边缘并排布置的多个引线，附接在管芯焊盘上的半导体芯片，以及塑料包装体覆盖模片，半导体芯片，其中塑料包装体包括覆盖引线的引线肩部的至少一部分的塑料延伸部分，以在半导体器件的端子之间获得更好的电气安全距离，因此电压设备的爬坡距离增加。

3. 发明授权

US08952509B1 Stacked multi-chip bottom source semiconductor device and preparation method thereof 有权
标题翻译：堆叠多芯片底源半导体器件及其制备方法
公开(公告)号：US08952509B1
公开(公告)日：2015-02-10
申请号：US14031283
申请日：2013-09-19
申请人： Hamza Yilmaz , Yueh-Se Ho , Yan Xun Xue , Jun Lu , Xiaotian Zhang , Zhi Qiang Niu , Ming-Chen Lu , Liang Zhao , YuPing Gong , GuoFeng Lian
发明人： Hamza Yilmaz , Yueh-Se Ho , Yan Xun Xue , Jun Lu , Xiaotian Zhang , Zhi Qiang Niu , Ming-Chen Lu , Liang Zhao , YuPing Gong , GuoFeng Lian
IPC分类号： H01L25/07 , H01L23/495 , H01L25/00
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/37 , H01L24/40 , H01L24/41 , H01L2224/37011 , H01L2224/371 , H01L2224/4007 , H01L2224/40095 , H01L2224/40245 , H01L2224/83801 , H01L2224/84801 , H01L2924/13091 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： The present invention discloses a stacked dual MOSFET package structure and a preparation method thereof. The stacked dual MOSFET package structure comprises a lead frame unit having a die paddle, a first lead and a second lead; a first chip flipped and attached on a top surface of a main paddle of the die paddle; a second chip attached on a bottom surface of the main paddle; and a metal clip mounted on the back of the flipped first chip and electrically connecting an electrode at the back of the first chip to the first lead. A top surface of a metal bump arranged on each electrode at the front of the second chip, a bottom surface of the die pin of the die paddle, a bottom surface of a lead pin of the second lead, and a bottom surface of the first lead are located on the same plane.
摘要翻译：本发明公开了一种叠层双MOSFET封装结构及其制备方法。堆叠双MOSFET封装结构包括具有管芯焊盘，第一引线和第二引线的引线框架单元; 第一芯片翻转并附接在模板的主桨的顶表面上; 附接在主桨的底表面上的第二芯片; 以及安装在翻转的第一芯片的背面上并将第一芯片背面的电极电连接到第一引线的金属夹。布置在第二芯片的前面的每个电极上的金属凸块的顶表面，模板的模具销的底表面，第二引线的引脚的底表面和第一引脚的底表面导线位于同一平面上。

4. 发明授权

US09041172B1 Semiconductor device for restraining creep-age phenomenon and fabricating method thereof 有权
标题翻译：用于抑制蠕变时效现象的半导体装置及其制造方法
公开(公告)号：US09041172B1
公开(公告)日：2015-05-26
申请号：US14105473
申请日：2013-12-13
申请人： Zhi Qiang Niu , Hamza Yilmaz , Jun Lu , Fei Wang
发明人： Zhi Qiang Niu , Hamza Yilmaz , Jun Lu , Fei Wang
IPC分类号： H01L23/495
CPC分类号： H01L23/49503 , H01L21/561 , H01L23/3107 , H01L23/3121 , H01L23/49534 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2224/04034 , H01L2224/04042 , H01L2224/0603 , H01L2224/06051 , H01L2224/06181 , H01L2224/291 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/371 , H01L2224/40247 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2224/73263 , H01L2224/73265 , H01L2224/84801 , H01L2224/8485 , H01L2224/97 , H01L2924/00014 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/1815 , H01L2224/85 , H01L2224/83 , H01L2924/00012 , H01L2224/84 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates generally to a semiconductor device and, more specifically, to optimizing the creep-age distance of the power semiconductor device and a preparation method thereof. The power semiconductor device includes a chip mounting unit with a die paddle and a plurality of leads arranged side by side located close to one side edge of the die paddle in a non-equidistant manner, a semiconductor chip attached on the die paddle, and a plastic packaging body covering the die paddle, the semiconductor chip, where the plastic packing body includes a plastic extension portion covering at least a part of a lead shoulder of a lead to obtain better electrical safety distance between the terminals of the semiconductor device, thus voltage creep-age distance of the device is increased.
摘要翻译：本发明一般涉及一种半导体器件，更具体地，涉及优化功率半导体器件的蠕变寿命距离及其制备方法。功率半导体器件包括具有管芯焊盘的芯片安装单元和以等间距方式靠近管芯焊盘的一个侧边缘并排设置的多个引线，附接在管芯焊盘上的半导体芯片，以及塑料包装体覆盖模片，半导体芯片，其中塑料包装体包括覆盖引线的引线肩部的至少一部分的塑料延伸部分，以在半导体器件的端子之间获得更好的电气安全距离，因此电压设备的爬坡距离增加。

5. 发明授权

US08058961B2 Lead frame-based discrete power inductor 有权
标题翻译：引线框架分立功率电感
公开(公告)号：US08058961B2
公开(公告)日：2011-11-15
申请号：US13021347
申请日：2011-02-04
申请人： François Hébert , Tao Feng , Xiaotian Zhang , Jun Lu
发明人： François Hébert , Tao Feng , Xiaotian Zhang , Jun Lu
IPC分类号： H01F5/00
CPC分类号： H01F17/062
摘要： A lead frame-based discrete power inductor is disclosed. The power inductor includes top and bottom lead frames, the leads of which form a coil around a single closed-loop magnetic core. The coil includes interconnections between inner and outer contact sections of the top and bottom lead frames, the magnetic core being sandwiched between the top and bottom lead frames. Ones of the leads of the top and bottom lead frames have a generally non-linear, stepped configuration such that the leads of the top lead frame couple adjacent leads of the bottom lead frame about the magnetic core to form the coil.
摘要翻译：公开了一种基于引线框架的分立功率电感器。功率电感器包括顶部和底部引线框架，其引线围绕单个闭环磁芯形成线圈。线圈包括顶部和底部引线框架的内部和外部接触部分之间的互连，磁芯夹在顶部和底部引线框架之间。顶部引线框架和底部引线框架的引线的一部分具有大致非线性的阶梯状构造，使得顶部引线框架的引线将底部引线框架的相邻引线围绕磁芯耦合以形成线圈。

6. 发明申请

US20110107589A1 PLANAR GROOVED POWER INDUCTOR STRUCTURE AND METHOD 有权
标题翻译：平面电力电力电感器结构与方法
公开(公告)号：US20110107589A1
公开(公告)日：2011-05-12
申请号：US13007551
申请日：2011-01-14
申请人： Francois Hebert , Tao Feng , Jun Lu
发明人： Francois Hebert , Tao Feng , Jun Lu
IPC分类号： H01F7/06
CPC分类号： H01F17/0033 , H01F1/344 , H01F41/046 , H01F2017/002 , Y10T29/4902
摘要： An inductor may include a planar ferrite core. A first group of one or more grooves is formed in a first side of the ferrite core. A second group of two or more grooves is formed in a second side of the ferrite core. The grooves in the first and second groups are oriented such that each groove in the first group overlaps with two corresponding grooves in the second group. A first plurality of vias communicates through the ferrite core between the first and second sides of the ferrite core. Each via is located where a groove in the first group overlaps with a groove in the second group. A conductive material is disposed in the first and second groups of grooves and in the vias to form an inductor coil.
摘要翻译：电感器可以包括平面铁氧体磁芯。第一组一个或多个凹槽形成在铁氧体磁芯的第一侧。在铁氧体磁芯的第二侧形成有第二组两个或多个凹槽。第一组和第二组中的凹槽被定向成使得第一组中的每个凹槽与第二组中的两个相应的凹槽重叠。第一多个通孔在铁氧体磁芯的第一和第二侧之间通过铁氧体磁芯连通。每个通孔位于第一组中的凹槽与第二组中的凹槽重叠的位置。导电材料设置在第一和第二组沟槽和通孔中以形成电感线圈。

7. 发明申请

US20090322461A1 PLANAR GROOVED POWER INDUCTOR STRUCTURE AND METHOD 有权
标题翻译：平面电力电力电感器结构与方法
公开(公告)号：US20090322461A1
公开(公告)日：2009-12-31
申请号：US12165423
申请日：2008-06-30
申请人： Francois Hebert , Tao Feng , Jun Lu
发明人： Francois Hebert , Tao Feng , Jun Lu
IPC分类号： H01F27/02
CPC分类号： H01F17/0033 , H01F1/344 , H01F41/046 , H01F2017/002 , Y10T29/4902
摘要： An inductor may include a planar ferrite core. A first group of one or more grooves is formed in a first side of the ferrite core. A second group of two or more grooves is formed in a second side of the ferrite core. The grooves in the first and second groups are oriented such that each groove in the first group overlaps with two corresponding grooves in the second group. A first plurality of vias communicates through the ferrite core between the first and second sides of the ferrite core. Each via is located where a groove in the first group overlaps with a groove in the second group. A conductive material is disposed in the first and second groups of grooves and in the vias to form an inductor coil.
摘要翻译：电感器可以包括平面铁氧体磁芯。第一组一个或多个凹槽形成在铁氧体磁芯的第一侧。在铁氧体磁芯的第二侧形成有第二组两个或多个凹槽。第一组和第二组中的凹槽被定向成使得第一组中的每个凹槽与第二组中的两个相应的凹槽重叠。第一多个通孔在铁氧体磁芯的第一和第二侧之间通过铁氧体磁芯连通。每个通孔位于第一组中的凹槽与第二组中的凹槽重叠的位置。导电材料设置在第一和第二组沟槽和通孔中以形成电感线圈。

8. 发明申请

US20110121934A1 Lead Frame-based Discrete Power Inductor 有权
标题翻译：引线框架离散功率电感器
公开(公告)号：US20110121934A1
公开(公告)日：2011-05-26
申请号：US13021347
申请日：2011-02-04
申请人： Francois Hébert , Tao Feng , Xiaotian Zhang , Jun Lu
发明人： Francois Hébert , Tao Feng , Xiaotian Zhang , Jun Lu
IPC分类号： H01F5/04
CPC分类号： H01F17/062
摘要： A lead frame-based discrete power inductor is disclosed. The power inductor includes top and bottom lead frames, the leads of which form a coil around a single closed-loop magnetic core. The coil includes interconnections between inner and outer contact sections of the top and bottom lead frames, the magnetic core being sandwiched between the top and bottom lead frames. Ones of the leads of the top and bottom lead frames have a generally non-linear, stepped configuration such that the leads of the top lead frame couple adjacent leads of the bottom lead frame about the magnetic core to form the coil.
摘要翻译：公开了一种基于引线框架的分立功率电感器。功率电感器包括顶部和底部引线框架，其引线围绕单个闭环磁芯形成线圈。线圈包括顶部和底部引线框架的内部和外部接触部分之间的互连，磁芯夹在顶部和底部引线框架之间。顶部引线框架和底部引线框架的引线的一部分具有大致非线性的阶梯状构造，使得顶部引线框架的引线将底部引线框架的相邻引线围绕磁芯耦合以形成线圈。

9. 发明授权

US07948346B2 Planar grooved power inductor structure and method 有权
公开(公告)号：US07948346B2
公开(公告)日：2011-05-24
申请号：US12165423
申请日：2008-06-30
申请人： Francois Hébert , Tao Feng , Jun Lu
发明人： Francois Hébert , Tao Feng , Jun Lu
IPC分类号： H01F5/00
CPC分类号： H01F17/0033 , H01F1/344 , H01F41/046 , H01F2017/002 , Y10T29/4902
摘要： An inductor may include a planar ferrite core. A first group of one or more grooves is formed in a first side of the ferrite core. A second group of two or more grooves is formed in a second side of the ferrite core. The grooves in the first and second groups are oriented such that each groove in the first group overlaps with two corresponding grooves in the second group. A first plurality of vias communicates through the ferrite core between the first and second sides of the ferrite core. Each via is located where a groove in the first group overlaps with a groove in the second group. A conductive material is disposed in the first and second groups of grooves and in the vias to form an inductor coil.

10. 发明申请

US20090134964A1 Lead frame-based discrete power inductor 有权
标题翻译：引线框架分立功率电感
公开(公告)号：US20090134964A1
公开(公告)日：2009-05-28
申请号：US12011489
申请日：2008-01-25
申请人： Francois Hebert , Tao Feng , Xiaotian Zhang , Jun Lu
发明人： Francois Hebert , Tao Feng , Xiaotian Zhang , Jun Lu
IPC分类号： H01F5/00
CPC分类号： H01F17/062
摘要： A lead frame-based discrete power inductor is disclosed. The power inductor includes top and bottom lead frames, the leads of which form a coil around a single closed-loop magnetic core. The coil includes interconnections between inner and outer contact sections of the top and bottom lead frames, the magnetic core being sandwiched between the top and bottom lead frames. Ones of the leads of the top and bottom lead frames have a generally non-linear, stepped configuration such that the leads of the top lead frame couple adjacent leads of the bottom lead frame about the magnetic core to form the coil.
摘要翻译：公开了一种基于引线框架的分立功率电感器。功率电感器包括顶部和底部引线框架，其引线围绕单个闭环磁芯形成线圈。线圈包括顶部和底部引线框架的内部和外部接触部分之间的互连，磁芯夹在顶部和底部引线框架之间。顶部引线框架和底部引线框架的引线的一部分具有大致非线性的阶梯状构造，使得顶部引线框架的引线将底部引线框架的相邻引线围绕磁芯耦合以形成线圈。

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