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1. 发明公开

US20230335625A1 POWER SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20230335625A1
公开(公告)日：2023-10-19
申请号：US18009677
申请日：2021-03-31
申请人： DYNEX SEMICONDUCTOR LIMITED , ZHUZHOU CRRC TIMES ELECTRIC CO. LTD
发明人： Chunlin Zhu , Guoyou Liu
IPC分类号： H01L29/739 , H01L29/78 , H01L29/06 , H01L27/06 , H01L29/66
CPC分类号： H01L29/7397 , H01L29/7813 , H01L29/0696 , H01L27/0623 , H01L29/66348 , H01L29/66734 , H01L29/7827
摘要： There is provided a power semiconductor device (1), comprising: a semiconductor substrate (2) comprising: a base layer (5) selectively provided at a first side of the semiconductor substrate, and wherein the base layer has a first conductivity type; a collector layer (3) provided at a second side of the semiconductor substrate, wherein the second side is opposite to the first side, and wherein the collector layer has the first conductivity type; and a drift layer (4) having a second conductivity type opposite to the first conductivity type, wherein the drift layer (4) is arranged between the collector layer (3) and the base layer (5); an active cell (15) provided in the semiconductor substrate (2), wherein the active cell (15) comprises an emitter region (7) which has the second conductivity type and an active base region (5-i) which is a part of the base layer (5); and an insulation trench (17) provided in the semiconductor substrate (2) and neighbouring the active cell (15), wherein: the insulation trench (17) extends from a surface (16) of the semiconductor substrate (2) at the first side into the drift layer (4) along a first direction; the insulation trench (17) comprises a gate electrode (9) and a dielectric material (11, 10) disposed therein; and the gate electrode (9) is configured to control an on/off status of a current channel within the active cell (15); wherein the active cell (15) has a first length L1 along a second direction X perpendicular to the first direction Y, and the insulation trench (17) has a second length L2 along the second direction X, and the first and second lengths L1 and L2 satisfy the relationship of 0.5≤L2/L1≤2.

2. 发明授权

US11848375B2 IGBT chip having folded composite gate structure 有权
公开(公告)号：US11848375B2
公开(公告)日：2023-12-19
申请号：US16969591
申请日：2018-09-18
申请人： ZHUZHOU CRRC TIMES ELECTRIC CO., LTD
发明人： Guoyou Liu , Chunlin Zhu , Liheng Zhu
IPC分类号： H01L29/739 , H01L29/423 , H01L29/06 , H01L29/66 , H01L29/417
CPC分类号： H01L29/7396 , H01L29/0696 , H01L29/4236 , H01L29/42356 , H01L29/42376 , H01L29/66348 , H01L29/7397 , H01L29/41766
摘要： An IGBT chip having a Γ-shape mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a gate region and two active regions located at two sides of the gate region. The gate region includes a trench gate and a planar gate that is located on a surface of the gate region, and the planar gate is connected with the trench gate and formed a Γ-shape mixed structure. In this way, the IGBT chip can have a significantly improved chip density, while retaining features of low power consumption and high current density of the trench gate and a feature of a wide safe operating area of the planar gate.

3. 发明授权

US11508723B2 Power semiconductor device with a temperature sensor 有权
公开(公告)号：US11508723B2
公开(公告)日：2022-11-22
申请号：US17251264
申请日：2018-06-13
申请人： Dynex Semiconductor Limited , Zhuzhou CRRC Times Electric Co. Ltd.
发明人： Chunlin Zhu , Vinay Suresh , Ian Deviny , Yangang Wang
IPC分类号： H01L29/66 , H01L29/78 , H01L27/06 , H01L27/02 , H01L29/739 , H01L29/74 , H01L29/732 , H01L21/762 , H01L23/34
摘要： We describe herein a high voltage semiconductor device comprising a power semiconductor device portion (100) and a temperature sensing device portion (185). The temperature sensing device portion comprises: an anode region (140), a cathode region (150), a body region (160) in which the anode region and the cathode region are formed. The temperature sensing device portion also comprises a semiconductor isolation region (165) in which the body region is formed, the semiconductor isolation region having an opposite conductivity type to the body region, the semiconductor isolation region being formed between the power semiconductor device portion and the temperature sensing device portion.

4. 发明授权

US11329130B2 IGBT chip having mixed gate structure 有权
公开(公告)号：US11329130B2
公开(公告)日：2022-05-10
申请号：US16969604
申请日：2018-09-18
申请人： ZHUZHOU CRRC TIMES ELECTRIC CO., LTD
发明人： Guoyou Liu , Chunlin Zhu , Liheng Zhu
IPC分类号： H01L29/06 , H01L29/423 , H01L29/49 , H01L29/739
摘要： An IGBT chip having a mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a source region (3) and a gate region. The gate region includes a planar gate region (1) and a trench gate region (2), which are respectively disposed at both sides of the source region (3). A planar gate and a trench gate are compositely disposed on the same cell (16), thereby greatly improving chip density while retaining both trench gate's features of low on-state energy loss and high current density and planar gate's feature of wide safe operating area.

5. 发明申请

US20210013330A1 IGBT CHIP HAVING FOLDED COMPOSITE GATE STRUCTURE 有权
公开(公告)号：US20210013330A1
公开(公告)日：2021-01-14
申请号：US16969591
申请日：2018-09-18
申请人： ZHUZHOU CRRC TIMES ELECTRIC CO., LTD
发明人： Guoyou Liu , Chunlin Zhu , Liheng Zhu
IPC分类号： H01L29/739 , H01L29/423 , H01L29/06 , H01L29/66
摘要： An IGBT chip having a Γ-shape mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a gate region and two active regions located at two sides of the gate region. The gate region includes a trench gate and a planar gate that is located on a surface of the gate region, and the planar gate is connected with the trench gate and formed a Γ-shape mixed structure. In this way, the IGBT chip can have a significantly improved chip density, while retaining features of low power consumption and high current density of the trench gate and a feature of a wide safe operating area of the planar gate.

6. 发明申请

US20210028278A1 IGBT CHIP HAVING COMPOSITE GATE STRUCTURE 有权
公开(公告)号：US20210028278A1
公开(公告)日：2021-01-28
申请号：US16969604
申请日：2018-09-18
申请人： ZHUZHOU CRRC TIMES ELECTRIC CO., LTD
发明人： Guoyou Liu , Chunlin Zhu , Liheng Zhu
IPC分类号： H01L29/06 , H01L29/49 , H01L29/739 , H01L29/423
摘要： An IGBT chip having a mixed gate structure includes a plurality of mixed gate units. Each of the mixed gate units includes a source region (3) and a gate region. The gate region includes a planar gate region (1) and a trench gate region (2), which are respectively disposed at both sides of the source region (3). A planar gate and a trench gate are compositely disposed on the same cell (16), thereby greatly improving chip density while retaining both trench gate's features of low on-state energy loss and high current density and planar gate's feature of wide safe operating area.

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