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1. 发明申请

US20060083923A1 Polybenzazole fiber and use thereof 失效
标题翻译：聚吲唑纤维及其用途
公开(公告)号：US20060083923A1
公开(公告)日：2006-04-20
申请号：US10517832
申请日：2003-06-26
申请人： Yukihiro Abe , Go Matsuoka , Kohei Kiriyama , Hiroki Murase , Muneatsu Nakamura , Yukihiro Nomura , Hironori Eguchi , Yukinari Okuyama , Tadao Kuroki , Takaharu Ichiryu , Hiroshi Tachimori
发明人： Yukihiro Abe , Go Matsuoka , Kohei Kiriyama , Hiroki Murase , Muneatsu Nakamura , Yukihiro Nomura , Hironori Eguchi , Yukinari Okuyama , Tadao Kuroki , Takaharu Ichiryu , Hiroshi Tachimori
IPC分类号： B32B27/34
CPC分类号： E04C5/07 , B63H9/0657 , B63H2009/0678 , D01F6/74 , D07B1/025 , D07B2205/2096 , E04C5/073 , Y10T428/2913 , Y10T428/2967 , Y10T428/2969 , D07B2801/10
摘要： The present invention relates to polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics containing in themselves an organic pigment having heat resistance as high as a thermal decomposition temperature of 200° C. or higher, and soluble in a mineral acid and having group(s) of —N=and/or NH— in the molecule, such as any of perinones and/or perylenes, any of phthalocyanines, any of quinacridones, and any of dioxazines, wherein they have a strength retention of 50% or higher when exposed to light from a xenon lamp for 100 hours and having a tensile strength retention of 85% or higher after exposed to an atmosphere of a temperature of 80° C. and a relative humidity of 80% for 700 hours. The polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics can be used for cords for reinforcing rubber, sheets and rods for reinforcing cement/concrete, composite materials, sail clothes, ropes, knife proof vests and bullet proof vests.
摘要翻译：本发明涉及聚吲哚纤维或长丝，短纤维，短纤纱，以及其本身含有耐热性高达200℃或更高的热分解温度的有机颜料并可溶于矿物的机织或针织织物酸和在分子中具有-N =和/或NH-的基团，例如百里香酮和/或苝中的任何一种，酞菁，任何喹吖啶酮和任何二恶嗪，其中它们具有当暴露于来自氙灯的光100小时并且在暴露于80℃的温度和80％的相对湿度的气氛中700小时之后的拉伸强度保持率为85％或更高时，为50％或更高。聚吲哚纤维或长丝，短纤维，短纤纱和机织或针织织物可用于增强橡胶，用于增强水泥/混凝土，复合材料，帆衣，绳索，防刀背心和防弹背心的橡胶，片材和棒材的帘线。

2. 发明授权

US07357982B2 Polybenzazole fiber and use thereof 失效
标题翻译：聚吲唑纤维及其用途
公开(公告)号：US07357982B2
公开(公告)日：2008-04-15
申请号：US10517832
申请日：2003-06-26
申请人： Yukihiro Abe , Go Matsuoka , Kohei Kiriyama , Hiroki Murase , Muneatsu Nakamura , Yukihiro Nomura , Hironori Eguchi , Yukinari Okuyama , Tadao Kuroki , Takaharu Ichiryu , Hiroshi Tachimori
发明人： Yukihiro Abe , Go Matsuoka , Kohei Kiriyama , Hiroki Murase , Muneatsu Nakamura , Yukihiro Nomura , Hironori Eguchi , Yukinari Okuyama , Tadao Kuroki , Takaharu Ichiryu , Hiroshi Tachimori
IPC分类号： D02G3/00
CPC分类号： E04C5/07 , B63H9/0657 , B63H2009/0678 , D01F6/74 , D07B1/025 , D07B2205/2096 , E04C5/073 , Y10T428/2913 , Y10T428/2967 , Y10T428/2969 , D07B2801/10
摘要： The present invention relates to polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics containing in themselves an organic pigment having heat resistance as high as a thermal decomposition temperature of 200° C. or higher, and soluble in a mineral acid and having group(s) of —N═ and/or NH— in the molecule, such as any of perinones and/or perylenes, any of phthalocyanines, any of quinacridones, and any of dioxazines, wherein they have a strength retention of 50% or higher when exposed to light from a xenon lamp for 100 hours and having a tensile strength retention of 85% or higher after exposed to an atmosphere of a temperature of 80° C. and a relative humidity of 80% for 700 hours.The polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics can be used for cords for reinforcing rubber, sheets and rods for reinforcing cement/concrete, composite materials, sail clothes, ropes, knife proof vests and bullet proof vests.
摘要翻译：本发明涉及聚吲哚纤维或长丝，短纤维，短纤纱，以及其本身含有耐热性高达200℃或更高的热分解温度的有机颜料并可溶于矿物的机织或针织织物酸和在分子中具有-N和/或NH-的基团，例如百里香酮和/或苝中的任何一种，酞菁，任何喹吖啶酮和任何二恶嗪，其中它们的强度保留为当暴露于来自氙灯的光100小时并且在暴露于80℃的温度和80％的相对湿度的气氛中700小时之后的拉伸强度保持率为85％或更高时，为50％或更高。聚吲哚纤维或长丝，短纤维，短纤纱和机织或针织织物可用于增强橡胶，用于增强水泥/混凝土，复合材料，帆衣，绳索，防刀背心和防弹背心的橡胶，片材和棒材的帘线。

3. 发明授权

US06954511B2 Phase-locked loop circuit and delay-locked loop circuit 失效
标题翻译：锁相环电路和延迟锁定环路电路
公开(公告)号：US06954511B2
公开(公告)日：2005-10-11
申请号：US09955071
申请日：2001-09-19
申请人： Hiroshi Tachimori
发明人： Hiroshi Tachimori
IPC分类号： H03L7/107 , H03L7/08 , H03L7/089 , H03L7/093 , H03L7/18 , H04L000/033
CPC分类号： H03L7/18 , H03L7/0891 , H03L7/0893 , H03L2207/06
摘要： A PLL circuit and a DLL circuit able to stabilize a control voltage within a short time after a phase pull-in operation in each cycle of a reference clock. In a phase comparator, the size of a leading phase or a delayed phase of a feedback signal is detected with respect to a reference clock signa, and pulse signals having pulse widths corresponding to the size are output. A current corresponding to the signals is output from a charge pump circuit to a lag-lead filter, and a control voltage obtained by removing noise of the above output is output from a low-pass filter to a voltage-controlled oscillator. Furthermore, through capacitors, pulse signals are superposed on the control voltage, and a sharp waveform is obtained by correcting blunting of the waveform by the low-pass filter. Due to this, the control voltage is stabilized within a short time after a phase pull-in operation in each cycle of the reference clock signal.
摘要翻译： PLL电路和DLL电路能够在参考时钟的每个周期中的相位拉入操作之后的短时间内稳定控制电压。在相位比较器中，相对于参考时钟信号检测反馈信号的超前相位或延迟相位的大小，并且输出具有与尺寸对应的脉冲宽度的脉冲信号。从电荷泵电路向滞后引线滤波器输出与信号对应的电流，通过去除上述输出的噪声而得到的控制电压从低通滤波器输出到压控振荡器。此外，通过电容器，脉冲信号叠加在控制电压上，并且通过校正低通滤波器的波形钝化来获得尖锐的波形。由此，在参考时钟信号的每个周期中的相位拉入操作之后，控制电压在短时间内稳定。

4. 发明授权

US06388519B1 Multi-input differential amplifier circuit 失效
标题翻译：多输入差分放大电路
公开(公告)号：US06388519B1
公开(公告)日：2002-05-14
申请号：US09442404
申请日：1999-11-18
申请人： Hiroshi Tachimori
发明人： Hiroshi Tachimori
IPC分类号： H03F345
CPC分类号： H03F3/45183 , H03F2203/45361 , H03F2203/45382 , H03F2203/45392 , H03F2203/45616 , H03F2203/45664 , H03F2203/45674 , H03F2203/45702 , H03F2203/45716 , H03F2203/45722
摘要： A multi-input differential amplifier circuit capable of maintaining the linear characteristic of the input voltage and the output voltage and capable of enhancing the dynamic range and the linear characteristic. A multi-input differential amplifier circuit configured by forming differential pairs by transistors MI0i, MI1i, (i=1, 2, . . . , n, n is an integer) with gates which are connected to positive and negative input terminals, the drains of the positive side transistors of the differential pairs being connected to the negative output terminals, the drains of the negative side transistor of the differential pairs being connected to the positive output terminals, and the sources of the transistors of the differential pairs being connected via resistors to current sources for supplying operating currents to the differential pair, whereby the dynamic range can be broadened in comparison with a differential amplifier circuit in which source resistors are not connected and whereby enhancement of the linear characteristic and improvement of the operating speed can be realized.
摘要翻译：一种能够保持输入电压和输出电压的线性特性并能够增强动态范围和线性特性的多输入差分放大电路。多输入差分放大器电路通过晶体管MI0i，MI1i，（i = 1,2，...，n，n为整数）形成差分对，配置有连接到正负输入端的栅极，漏极差分对的正侧晶体管连接到负输出端，差分对的负侧晶体管的漏极连接到正输出端，差分对的晶体管的源极经由电阻器用于向差分对提供工作电流的电流源，由此与不连接源电阻器的差分放大器电路相比，可以扩大动态范围，从而可以实现线性特性的提高和操作速度的提高。

5. 发明授权

US07652650B2 Current output drive circuit and display device 有权
标题翻译：电流输出驱动电路和显示装置
公开(公告)号：US07652650B2
公开(公告)日：2010-01-26
申请号：US10525203
申请日：2003-09-03
申请人： Yuichi Takagi , Genichiro Oga , Hiroshi Tachimori
发明人： Yuichi Takagi , Genichiro Oga , Hiroshi Tachimori
IPC分类号： G09G3/36
CPC分类号： G09G3/3283 , G09G2310/027 , G09G2330/028
摘要： A circuit having a plurality of driver IC's 101-1 to 101-n provided corresponding to divided areas of a display panel 102, each driver having an output circuit for outputting a supplied reference current IREF as a drive current to corresponding divided areas DRVA1 to DRVAn of the display panel 102 and reference current source circuits 200-1 to 200-n for sampling and holding the reference current input from the reference current input terminal, then supplying the same to the output circuit, the reference current input terminal being connected to the reference current input terminal of another driver by a common current interconnect CML1, and the reference current being distributed to the reference current source circuits of drivers by time division. According to the present invention, luminance steps among drivers driving the display (driven object) by division can be made sufficiently small, and a large size, high dynamic range display organic EL display, which cannot be realized by the conventional method of supply of the reference current, can be realized.
摘要翻译：具有与显示面板102的划分区域对应设置的多个驱动IC 101-1〜101-n的电路，每个驱动器具有输出电路，用于将提供的基准电流IREF作为驱动电流输出到对应的分割区域DRVA1〜DRVAn 显示面板102和参考电流源电路200-1〜200-n，用于取样并保持从基准电流输入端子输入的参考电流，然后将其提供给输出电路，参考电流输入端子连接到通过公共电流互连CML1将另一个驱动器的参考电流输入端子分配，并且参考电流通过时分分配给驱动器的参考电流源电路。根据本发明，通过划分驱动显示器（驱动对象）的驱动器之间的亮度步骤可以变得足够小，并且大尺寸，高动态范围显示有机EL显示器不能通过传统的方式提供参考电流，可实现。

6. 发明授权

US07288603B2 Polybenzazole compound having sulfonic acid group and/or phosphonic acid group, resin composition containing the same, resin molding, solid polymer electrolyte membrane, solid polymer electrolyte membrane/electrode assembly and method of preparing assembly 失效
标题翻译：具有磺酸基和/或膦酸基的聚吲唑化合物，含有它们的树脂组合物，树脂成型，固体高分子电解质膜，固体高分子电解质膜/电极组件及组装方法
公开(公告)号：US07288603B2
公开(公告)日：2007-10-30
申请号：US10416551
申请日：2001-11-12
申请人： Yoshimitsu Sakaguchi , Kota Kitamura , Hiroaki Taguchi , Junko Nakao , Shiro Hamamoto , Hiroshi Tachimori , Satoshi Takase
发明人： Yoshimitsu Sakaguchi , Kota Kitamura , Hiroaki Taguchi , Junko Nakao , Shiro Hamamoto , Hiroshi Tachimori , Satoshi Takase
IPC分类号： C08L71/00 , C08G69/42 , C08G79/02 , H01M4/00 , H01B1/06 , C25C7/00
CPC分类号： H01M8/103 , C08G61/12 , C08G73/22 , H01B1/122 , H01M4/8605 , H01M4/92
摘要： An object of the present invention is to obtain a novel polymeric material capable of forming a solid polymer electrolyte excellent not only in processability, solvent resistance and durability/stability but also in ion conductivity by introducing sulfonic acid group or phosphonic acid group into a polybenzazole compound having excellent properties in view of heat resistance, solvent resistance, mechanical characteristics and the like.Means attaining the object of the present invention is a polybenzazole compound including an aromatic dicarboxylic acid bond unit having sulfonic acid group and/or phosphonic acid group and satisfying either a condition that inherent viscosity measured in concentrated sulfuric acid is in the range of 0.25 to 10 dl/g or a condition that inherent viscosity measured in a methanesulfonic acid solution is in the range of 0.1 to 50 dl/g.The object of the present invention can be attained also by a resin composition containing the aforementioned polybenzazole compound, a resin molding, a solid polymer electrolyte membrane, a solid polymer electrolyte membrane/electrode assembly and a method of preparing the solid polymer electrolyte membrane/electrode assembly.
摘要翻译：本发明的目的是获得能够形成固体聚合物电解质的新型聚合物材料，其不仅在加工性，耐溶剂性和耐久性/稳定性方面优异，而且通过将磺酸基或膦酸基引入聚唑化合物中而具有优异的离子传导性鉴于耐热性，耐溶剂性，机械特性等而具有优异的性能。具体实施方式是包含具有磺酸基和/或膦酸基的芳香族二羧酸键单元的聚吲唑化合物，其满足在浓硫酸中测定的特性粘度为0.25〜10的条件 dl / g或在甲磺酸溶液中测得的比浓对数粘度为0.1〜50dl / g的条件。本发明的目的还可以通过含有上述聚吲哚化合物的树脂组合物，树脂成型体，固体聚合物电解质膜，固体高分子电解质膜/电极组合物和制备固体高分子电解质膜/电极的方法来实现部件。

7. 发明授权

US06700363B2 Reference voltage generator 失效
标题翻译：参考电压发生器
公开(公告)号：US06700363B2
公开(公告)日：2004-03-02
申请号：US10241721
申请日：2002-09-12
申请人： Hiroshi Tachimori
发明人： Hiroshi Tachimori
IPC分类号： G05F316
CPC分类号： G05F3/242
摘要： The present invention provides a reference voltage generator capable of operating stably at a low power source voltage, suppressing the increase of a current consumption and providing a stable reference voltage at a high power source voltage, and reducing a layout area. A pMOS transistor, a resistance element, an nMOS transistor, a resistance element and an nMOS transistor are connected in series between a supply line of a power source voltage and a common potential line. The transistors are low threshold voltage transistors, all the transistors are rendered conductive during operation, in the low range of the power source voltage, transistor currents are determined by ON resistances of the transistors, while in the high range of the power source voltage, the transistor currents are determined by the resistance values of the resistance elements, hence it is possible to provide a stable reference voltage at the low power source voltage while suppressing the rapid increase of the current consumption at the high power source voltage.
摘要翻译：本发明提供一种能够在低电源电压下稳定运行的基准电压发生器，抑制电流消耗的增加并且在高电源电压下提供稳定的参考电压，并且减小布局面积。 pMOS晶体管，电阻元件，nMOS晶体管，电阻元件和nMOS晶体管串联连接在电源电压的电源线和公共电位线之间。晶体管是低阈值电压晶体管，所有晶体管在工作期间导通，在电源电压的低范围内，晶体管电流由晶体管的导通电阻决定，而在电源电压的高范围内，晶体管电流由电阻元件的电阻值确定，因此可以在低电源电压下提供稳定的参考电压，同时抑制高电源电压下的电流消耗的快速增加。

8. 发明申请

US20110008431A1 THERAPEUTIC TABLET FOR POSTHERPETIC NEURALGIA AND METHOD OF TREATING POSTHERPETIC NEURALGIA 审中-公开
标题翻译：治疗神经性神经病的治疗药片及治疗晚期神经病的方法
公开(公告)号：US20110008431A1
公开(公告)日：2011-01-13
申请号：US12527124
申请日：2008-03-14
申请人： Takuji Fukuno , Hiroshi Tachimori , Fuminori Mukunoki , Tadayo Miyasaka , Hiromasa Araki , Shuichi Tanaka , Shingo Doi , Shoichi Kawazoe
发明人： Takuji Fukuno , Hiroshi Tachimori , Fuminori Mukunoki , Tadayo Miyasaka , Hiromasa Araki , Shuichi Tanaka , Shingo Doi , Shoichi Kawazoe
IPC分类号： A61K9/24 , A61K31/485 , A61P25/04
CPC分类号： C07D489/02 , A61K9/209 , A61K31/485
摘要： The present invention provides a tablet for treating postherpetic neuralgia and a method of treating postherpetic neuralgia with the use of the tablet. The therapeutic tablet for postherpetic neuralgia according to the present invention is characterized in comprising buprenorphine hydrochloride, having a double layer structure consisting of a quick-release layer and a sustained-release layer, wherein the tablet is adhesive to the oral mucosa.
摘要翻译：本发明提供了一种用于治疗带状疱疹后神经痛的片剂和使用片剂治疗带状疱疹后神经痛的方法。根据本发明的带状疱疹后神经痛的治疗片剂的特征在于包含盐酸丁丙诺非，其具有由快速释放层和缓释层组成的双层结构，其中所述片剂与口腔粘膜粘合。

9. 发明申请

US20060017664A1 Current output type driver circuit and display device 有权
标题翻译：电流输出型驱动电路及显示装置
公开(公告)号：US20060017664A1
公开(公告)日：2006-01-26
申请号：US10525203
申请日：2003-09-03
申请人： Yuichi Takagi , Genichiro Oga , Hiroshi Tachimori
发明人： Yuichi Takagi , Genichiro Oga , Hiroshi Tachimori
IPC分类号： G09G3/30
CPC分类号： G09G3/3283 , G09G2310/027 , G09G2330/028
摘要： A circuit having a plurality of driver IC's 101-1 to 101-n provided corresponding to divided areas of a display panel 102, each driver having an output circuit for outputting a supplied reference current IREF as a drive current to corresponding divided areas DRVA1 to DRVAn of the display panel 102 and reference current source circuits 200-1 to 200-n for sampling and holding the reference current input from the reference current input terminal, then supplying the same to the output circuit, the reference current input terminal being connected to the reference current input terminal of another driver by a common current interconnect CML1, and the reference current being distributed to the reference current source circuits of drivers by time division. According to the present invention, luminance steps among drivers driving the display (driven object) by division can be made sufficiently small, and a large size, high dynamic range display organic EL display which cannot be realized by the conventional method of supply of the reference current can be realized.
摘要翻译：具有对应于显示面板102的分割区域设置的多个驱动器IC 101-1至101-n的电路，每个驱动器具有输出电路，用于将提供的参考电流IREF作为驱动电流输出到相应的分割区域DRVA 1至显示面板102的DRVAn和参考电流源电路200-1〜200-n，用于采样并保持从参考电流输入端子输入的参考电流，然后将其提供给输出电路，参考电流输入端子连接到通过公共电流互连CML 1将另一个驱动器的参考电流输入端子分配，并且参考电流通过时分分配给驱动器的参考电流源电路。根据本发明，通过划分驱动显示器（驱动对象）的驱动器之间的亮度步骤可以做得足够小，并且可以通过传统的参考方法提供不能实现的大尺寸，高动态范围的有机EL显示器电流可以实现。

10. 发明授权

US06603340B2 Delay circuit, voltage-controlled delay circuit, voltage-controlled oscillation circuit, delay adjustment circuit, DLL circuit, and PLL circuit 有权
公开(公告)号：US06603340B2
公开(公告)日：2003-08-05
申请号：US09917934
申请日：2001-07-31
申请人： Hiroshi Tachimori
发明人： Hiroshi Tachimori
IPC分类号： H03K513
CPC分类号： H03K3/013 , H03K3/0315 , H03K5/133 , H03K2005/00039 , H03K2005/00065 , H03K2005/00071 , H03K2005/00195 , H03K2005/00202 , H03L7/0812 , H03L7/0893 , H03L7/0995
摘要： An inverter type delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit capable of realizing simplification of circuit configuration, reduction of an effect of power source noise, and reduction of jitter, wherein a delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit comprised of a plurality of delay stages controlled in drive current in accordance with a bias voltage or a control voltage and determined in delay time by the drive current, adding a change of a power source voltage to the above bias voltage or control voltage by a predetermined ratio and supplying a result of the addition to the above delay stages to suppress the power source voltage dependencies of the delay times of the delay stages, or connecting by a predetermined ratio a plurality of delay stages having different power source voltage dependencies, for example, power source voltage dependencies of opposite delay times, to suppress the power source voltage dependencies of delay times of the delay stages are realized.

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