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1. 发明申请

US20090127746A1 HEAT TREATMENT JIG AND HEAT TREATMENT METHOD FOR SILICON WAFER 有权
标题翻译：热处理加热和硅热处理方法
公开(公告)号：US20090127746A1
公开(公告)日：2009-05-21
申请号：US12339118
申请日：2008-12-19
申请人： Yoshinobu NAKADA , Hiroyuki Shiraki , Takeshi Hasegawa
发明人： Yoshinobu NAKADA , Hiroyuki Shiraki , Takeshi Hasegawa
IPC分类号： B29C71/02
CPC分类号： F27D5/0037 , F27B17/0025 , H01L21/324 , H01L21/67109 , Y10T279/23
摘要： In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
摘要翻译：在这种用于硅晶片的热处理夹具和方法中，将硅晶片安装在设置在三个支撑臂上的支撑突起上进行热处理，其具有从支撑框架向中心突出的中间间隔。此时，硅晶片下面的所有支撑突起都位于与中心的径向距离限定晶片半径的85至99.5％的区域内的相同的圆上，并且支撑臂形成120°的角度彼此围绕中心。利用这种夹具和方法，可以将从销位置产生的位错的自由深度控制得比装置形成区域更深，并且获得表面没有滑移位错的最宽的无滑动区域。

2. 发明授权

US08026182B2 Heat treatment jig and heat treatment method for silicon wafer 有权
标题翻译：硅片热处理夹具及热处理方法
公开(公告)号：US08026182B2
公开(公告)日：2011-09-27
申请号：US12339118
申请日：2008-12-19
申请人： Yoshinobu Nakada , Hiroyuki Shiraki , Takeshi Hasegawa
发明人： Yoshinobu Nakada , Hiroyuki Shiraki , Takeshi Hasegawa
IPC分类号： H01L21/302
CPC分类号： F27D5/0037 , F27B17/0025 , H01L21/324 , H01L21/67109 , Y10T279/23
摘要： In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
摘要翻译：在这种用于硅晶片的热处理夹具和方法中，将硅晶片安装在设置在三个支撑臂上的支撑突起上进行热处理，其具有从支撑框架向中心突出的中间间隔。此时，硅晶片下面的所有支撑突起都位于与中心的径向距离限定晶片半径的85至99.5％的区域内的相同的圆上，并且支撑臂形成120°的角度彼此围绕中心。利用这种夹具和方法，可以将从销位置产生的位错的自由深度控制得比装置形成区域更深，并且获得表面没有滑移位错的最宽的无滑动区域。

3. 发明授权

US07481888B2 Heat treatment jig and heat treatment method for silicon wafer 有权
标题翻译：硅片热处理夹具及热处理方法
公开(公告)号：US07481888B2
公开(公告)日：2009-01-27
申请号：US10551695
申请日：2004-03-30
申请人： Yoshinobu Nakada , Hiroyuki Shiraki , Takeshi Hasegawa
发明人： Yoshinobu Nakada , Hiroyuki Shiraki , Takeshi Hasegawa
IPC分类号： C23C16/00
CPC分类号： F27D5/0037 , F27B17/0025 , H01L21/324 , H01L21/67109 , Y10T279/23
摘要： In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
摘要翻译：在这种用于硅晶片的热处理夹具和方法中，将硅晶片安装在设置在三个支撑臂上的支撑突起上进行热处理，其具有从支撑框架向中心突出的中间间隔。此时，硅晶片下面的所有支撑突起都位于与中心的径向距离限定晶片半径的85至99.5％的区域内的相同的圆上，并且支撑臂形成120°的角度彼此围绕中心。利用这种夹具和方法，可以将从销位置产生的位错的自由深度控制得比装置形成区域更深，并且获得表面没有滑移位错的最宽的无滑动区域。

4. 发明申请

US20060208434A1 Silicon wafer heat treatment jig, and silicon wafer heat treatment method 有权
标题翻译：硅晶片热处理夹具，硅晶片热处理方法
公开(公告)号：US20060208434A1
公开(公告)日：2006-09-21
申请号：US10551695
申请日：2004-03-30
申请人： Yoshinobu Nakada , Hiroyuki Shiraki , Takeshi Hasegawa
发明人： Yoshinobu Nakada , Hiroyuki Shiraki , Takeshi Hasegawa
IPC分类号： B23B31/28 , B29C71/00
CPC分类号： F27D5/0037 , F27B17/0025 , H01L21/324 , H01L21/67109 , Y10T279/23
摘要： In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
摘要翻译：在这种用于硅晶片的热处理夹具和方法中，将硅晶片安装在设置在三个支撑臂上的支撑突起上进行热处理，其具有从支撑框架向中心突出的中间间隔。此时，硅晶片下面的所有支撑突起都位于与中心的径向距离限定晶片半径的85至99.5％的区域内的相同的圆上，并且支撑臂形成120°的角度彼此围绕中心。利用这种夹具和方法，可以将从销位置产生的位错的自由深度控制得比装置形成区域更深，并且获得表面没有滑移位错的最宽的无滑动区域。

5. 发明申请

US20050130452A1 Production method for silicon wafers and silicon wafer 有权
标题翻译：硅晶片和硅晶片的生产方法
公开(公告)号：US20050130452A1
公开(公告)日：2005-06-16
申请号：US11053440
申请日：2005-02-09
申请人： Yoshinobu Nakada , Hiroyuki Shiraki
发明人： Yoshinobu Nakada , Hiroyuki Shiraki
IPC分类号： H01L21/322 , H01L21/324 , H01L21/66
CPC分类号： H01L21/3225
摘要： A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.
摘要翻译：硅晶片在大气中热退火以通过热退火形成新的空位，并且热退火中的气氛含有分解温度低于N 2分解温度的氮化物气体，使得热退火在较低温度或短时间内进行，以抑制滑动的产生并提供令人满意的表面粗糙度。

6. 发明授权

US07521381B2 Method for producing silicon wafer and silicon wafer 有权
标题翻译：硅晶片和硅晶片的制造方法
公开(公告)号：US07521381B2
公开(公告)日：2009-04-21
申请号：US10432861
申请日：2001-11-28
申请人： Yoshinobu Nakada , Hiroyuki Shiraki
发明人： Yoshinobu Nakada , Hiroyuki Shiraki
IPC分类号： H01L21/26 , H01L21/42 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/3225
摘要： A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.
摘要翻译：将硅晶片在大气中热退火以通过热退火形成新的空位，并且热退火中的气氛含有分解温度低于N2的可分解温度的氮化物气体，使得热退火在较低的温度或短时间以抑制滑移的产生并提供令人满意的表面粗糙度。

7. 发明授权

US07670965B2 Production method for silicon wafers and silicon wafer 有权
标题翻译：硅晶片和硅晶片的生产方法
公开(公告)号：US07670965B2
公开(公告)日：2010-03-02
申请号：US11053440
申请日：2005-02-09
申请人： Yoshinobu Nakada , Hiroyuki Shiraki
发明人： Yoshinobu Nakada , Hiroyuki Shiraki
IPC分类号： H01L21/26 , H01L21/42 , H01L21/324 , H01L21/477 , H01L21/31
CPC分类号： H01L21/3225
摘要： A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.
摘要翻译：将硅晶片在大气中热退火以通过热退火形成新的空位，并且热退火中的气氛含有分解温度低于N2的可分解温度的氮化物气体，使得热退火在较低的温度或短时间以抑制滑移的产生并提供令人满意的表面粗糙度。

8. 发明授权

US06534774B2 Method and apparatus for evaluating the quality of a semiconductor substrate 有权
标题翻译：用于评估半导体衬底的质量的方法和装置
公开(公告)号：US06534774B2
公开(公告)日：2003-03-18
申请号：US09815208
申请日：2001-03-22
申请人： Takeshi Hasegawa , Terumi Ito , Hiroyuki Shiraki
发明人： Takeshi Hasegawa , Terumi Ito , Hiroyuki Shiraki
IPC分类号： G01N2164
CPC分类号： G01N21/6489 , G01N21/6408
摘要： A first chopper between a laser device and a semiconductor substrate chops an excitation light at a specific frequency, and a second chopper between the first chopper and the semiconductor substrate chops the excitation light at a variable frequency higher than the first chopper. A photoluminescence light emitted by the semiconductor substrate when the semiconductor substrate is intermittently irradiated with the excitation light is introduced into a monochromator. A controller obtains the decay time constant T of the photoluminescence light from variation of the average intensity of the photoluminescence light when gradually increasing the chopping frequency of the excitation light by controlling the second chopper, and computes the life time &tgr; of the semiconductor substrate from an expression “&tgr;=T/C”, where C is a constant. An object of the invention is to accurately evaluate impurities, defects and the like in a semiconductor substrate by obtaining quantitatively the life time of the semiconductor substrate having a long life time.
摘要翻译：激光装置与半导体基板之间的第一斩波器以特定频率切断激励光，第一斩波器与半导体基板之间的第二斩波器以比第一斩波器高的可变频率对激发光进行斩波。当半导体衬底间歇地用激发光照射时，由半导体衬底发射的光致发光被引入到单色器中。控制器通过控制第二斩波器逐渐增加激发光的斩波频率，从光致发光光的平均强度的变化中获得光致发光光的衰减时间常数T，并计算半导体衬底的寿命τ 表达式“tau = T / C”，其中C是常数。本发明的目的是通过定量地获得具有长寿命的半导体衬底的寿命来准确地评估半导体衬底中的杂质，缺陷等。

9. 发明授权

US06693286B2 Method for evaluating the quality of a semiconductor substrate 有权
标题翻译：用于评估半导体衬底的质量的方法
公开(公告)号：US06693286B2
公开(公告)日：2004-02-17
申请号：US10299148
申请日：2002-11-19
申请人： Takeshi Hasegawa , Terumi Ito , Hiroyuki Shiraki
发明人： Takeshi Hasegawa , Terumi Ito , Hiroyuki Shiraki
IPC分类号： G01N2164
CPC分类号： G01N21/6489 , G01N21/6408
摘要： A first chopper between a laser device and a semiconductor substrate chops an excitation light at a specific frequency, and a second chopper between the first chopper and the semiconductor substrate chops the excitation light at a variable frequency higher than the first chopper. A photoluminescence light emitted by the semiconductor substrate when the semiconductor substrate is intermittently irradiated with the excitation light is introduced into a monochromator. A controller obtains the decay time constant T of the photoluminescence light from variation of the average intensity of the photoluminescence light when gradually increasing the chopping frequency of the excitation light by controlling the second chopper, and computes the life time &tgr; of the semiconductor substrate from an expression “&tgr;=T/C”, where C is a constant. An object of the invention is to accurately evaluate impurities, defects and the like in a semiconductor substrate by obtaining quantitatively the life time of the semiconductor substrate having a long life time.
摘要翻译：激光装置与半导体基板之间的第一斩波器以特定频率切断激励光，第一斩波器与半导体基板之间的第二斩波器以比第一斩波器高的可变频率对激发光进行斩波。当半导体衬底间歇地用激发光照射时，由半导体衬底发射的光致发光被引入到单色器中。控制器通过控制第二斩波器逐渐增加激发光的斩波频率，从光致发光光的平均强度的变化中获得光致发光光的衰减时间常数T，并计算半导体衬底的寿命τ 表达式“tau = T / C”，其中C是常数。本发明的目的是通过定量地获得具有长寿命的半导体衬底的寿命来准确地评估半导体衬底中的杂质，缺陷等。

10. 发明授权

US4898922A Urethane resins 失效
标题翻译：聚氨酯树脂
公开(公告)号：US4898922A
公开(公告)日：1990-02-06
申请号：US253863
申请日：1988-10-05
申请人： Hiroyuki Shiraki
发明人： Hiroyuki Shiraki
IPC分类号： C08G18/12 , G11B5/702
CPC分类号： G11B5/7021 , C08G18/12
摘要： Urethane resin having hydrophilic polar groups (mercapto groups) shows excellent dispersibility of magnetic powder when used as a binder for magnetic recording media. Magnetic recording media prepared by using the binder are excellent in surface-smoothness and durability. The mercapto groups contained in the magnetic layer react with isocyanate groups in the polyisocyanate to form thiourethane bonds to leave no hydrophilic polar groups, i.e., mercapto groups, and thus is excellent in moisture- and heat-resistance as well.The resin and the binding agent are advantageously used in the production of magnetic recording media, for example, magnetic tape, magnetic disc, etc.

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