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    • 1. 发明授权
    • Logic circuit redesign program, logic circuit redesign apparatus, and logic circuit redesign method
    • 逻辑电路重新设计程序,逻辑电路重新设计装置和逻辑电路重新设计方法
    • US07735028B2
    • 2010-06-08
    • US11902050
    • 2007-09-18
    • Yoshinori SoejimaYoshikatsu KouharaHiroaki ShiraishiKouichi TandaTakakazu TokunagaKoji Takatomi
    • Yoshinori SoejimaYoshikatsu KouharaHiroaki ShiraishiKouichi TandaTakakazu TokunagaKoji Takatomi
    • G06F17/50
    • G06F17/5054
    • A computer is allowed to execute an information acquisition process that acquires a file expressing information on pins used in respective ports provided in each block of a logic circuit to be redesigned and information indicating connection relationships between the ports (#2); execute a multiplexer disposition process that, based on the file, classifies pins of output ports of a block into a number of pin groups that is less than the number of pins, and disposes a multiplexer having a function to multiplex a signal output from each pin classified in the same pin group (#11, #13); and execute a demultiplexer disposition process that, based on that file, disposes a demultiplexer having a function to demultiplex signals that have been output from output ports of a block and multiplexed by the multiplexer, and a function to output each demultiplexed signal to input ports of respective input destination blocks (#12, #13).
    • 允许计算机执行信息获取处理,获取表示在要重新设计的逻辑电路的每个块中提供的相应端口中使用的引脚的信息的文件和指示端口之间的连接关系的信息(#2)。 执行多路复用器配置处理,其基于该文件,将块的输出端口的引脚分成小于引脚数的多个引脚组,并且配置具有复用从每个引脚输出的信号的功能的多路复用器 分为同一个针脚组(#11,#13); 并且执行解复用器配置处理,其基于该文件,配置具有从多路复用器的多路复用器的多路复用器多路复用的多路复用器的输出端口输出的多路复用功能的解复用器,以及将各解复用信号输出到 各个输入目的地块(#12,#13)。
    • 2. 发明申请
    • Computer
    • 电脑
    • US20070217444A1
    • 2007-09-20
    • US11711806
    • 2007-02-28
    • Yoshikatsu KouharaYoshinori SoejimaHiroaki ShiraishiKouichi TandaTakakazu Tokunaga
    • Yoshikatsu KouharaYoshinori SoejimaHiroaki ShiraishiKouichi TandaTakakazu Tokunaga
    • H04L12/66
    • G06F17/5045
    • A computer capable of easily obtaining RTL of a TOP circuit after a block circuit is separated out of the TOP circuit. A port information input unit inputs the port information of the TOP circuit described in RTL, and the port information of block circuits composing the TOP circuit, from a user. A separation information input unit inputs separation information specifying a block circuit to be separated out of the TOP circuit, from the user. A separation port information creation unit creates separation port information after the block circuit is separated, by changing the port information of the TOP circuit and the block circuits based on the port information of the block circuit to be separated according to the separation information. An RTL rewriting unit rewrites RTL of the TOP circuit from which the block circuit has been separated, based on the separation port information created by the separation port information creation unit.
    • 能够在块电路之后容易地获得TOP电路的RTL的计算机从TOP电路分离出来。 端口信息输入单元从用户输入RTL中描述的TOP电路的端口信息和构成TOP电路的块电路的端口信息。 分离信息输入单元从用户输入指定要从TOP电路分离的块电路的分离信息。 分离端口信息创建单元通过根据分离信息根据要分离的块电路的端口信息改变TOP电路和块电路的端口信息,在块电路分离之后创建分离端口信息。 RTL重写单元基于由分离端口信息创建单元创建的分离端口信息重写已经从块电路分离的TOP电路的RTL。