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1. 发明授权

US09166502B2 Method for manufacturing an electromechanical transducer 有权
标题翻译：机电换能器的制造方法
公开(公告)号：US09166502B2
公开(公告)日：2015-10-20
申请号：US13587751
申请日：2012-08-16
申请人： Yoshihiro Hasegawa , Yasuyoshi Takai
发明人： Yoshihiro Hasegawa , Yasuyoshi Takai
IPC分类号： H04R31/00 , H02N1/00 , H01G5/16
CPC分类号： B06B1/0292 , H01G5/16 , H02N1/006 , Y10T29/43
摘要： The present invention provides a technology for decreasing a dispersion of the performance among electromechanical transducers each having through wiring. A method for manufacturing an electromechanical transducer includes: obtaining a structure in which an insulative portion having a through hole therein is bonded onto an electroconductive substrate; filling the through hole with an electroconductive material to form a through wiring which is electrically connected with the electroconductive substrate; and using the electroconductive substrate as a first electrode, forming a plurality of vibrating membrane portions including a second electrode, which opposes to the first electrode through a plurality of gaps, on an opposite side of the first electrode to the side having the insulative portion, to thereby forming a plurality of cells.
摘要翻译：本发明提供了一种用于减小每个具有通过布线的机电换能器之间的性能分散的技术。制造机电换能器的方法包括：获得其中具有通孔的绝缘部分结合到导电基底上的结构; 用导电材料填充通孔以形成与导电基板电连接的贯通布线; 并且使用所述导电性基板作为第一电极，在所述第一电极的与所述绝缘部的一侧相反的一侧形成多个振动膜部，所述多个振动膜部包括与所述第一电极相对的多个间隙的第二电极，从而形成多个单元。

2. 发明申请

US20130049527A1 ELECTROMECHANICAL TRANSDUCER AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：机电传感器及其制造方法
公开(公告)号：US20130049527A1
公开(公告)日：2013-02-28
申请号：US13587751
申请日：2012-08-16
申请人： Yoshihiro Hasegawa , Yasuyoshi Takai
发明人： Yoshihiro Hasegawa , Yasuyoshi Takai
IPC分类号： H02N1/00 , H01G7/00
CPC分类号： B06B1/0292 , H01G5/16 , H02N1/006 , Y10T29/43
摘要： The present invention provides a technology for decreasing a dispersion of the performance among electromechanical transducers each having through wiring. A method for manufacturing an electromechanical transducer includes: obtaining a structure in which an insulative portion having a through hole therein is bonded onto an electroconductive substrate; filling the through hole with an electroconductive material to form a through wiring which is electrically connected with the electroconductive substrate; and using the electroconductive substrate as a first electrode, forming a plurality of vibrating membrane portions including a second electrode, which opposes to the first electrode through a plurality of gaps, on an opposite side of the first electrode to the side having the insulative portion, to thereby forming a plurality of cells.
摘要翻译：本发明提供了一种用于减小每个具有通过布线的机电换能器之间的性能分散的技术。制造机电换能器的方法包括：获得其中具有通孔的绝缘部分结合到导电基底上的结构; 用导电材料填充通孔以形成与导电基板电连接的贯通布线; 并且使用所述导电性基板作为第一电极，在所述第一电极的与所述绝缘部的一侧相反的一侧形成多个振动膜部，所述多个振动膜部包括与所述第一电极相对的多个间隙的第二电极，从而形成多个单元。

3. 发明申请

US20110092016A1 METHOD OF TREATING SEMICONDUCTOR ELEMENT 有权
标题翻译：处理半导体元件的方法
公开(公告)号：US20110092016A1
公开(公告)日：2011-04-21
申请号：US12865032
申请日：2009-03-02
申请人： Masato Ofuji , Katsumi Abe , Hisae Shimizu , Ryo Hayashi , Masafumi Sano , Hideya Kumomi , Yasuyoshi Takai , Takehiko Kawasaki , Norio Kaneko
发明人： Masato Ofuji , Katsumi Abe , Hisae Shimizu , Ryo Hayashi , Masafumi Sano , Hideya Kumomi , Yasuyoshi Takai , Takehiko Kawasaki , Norio Kaneko
IPC分类号： H01L21/26 , H01L21/34
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78633
摘要： In a method of treating a semiconductor element which at least includes a semiconductor, a threshold voltage of the semiconductor element is changed by irradiating the semiconductor with light with a wavelength longer than an absorption edge wavelength of the semiconductor. The areal density of in-gap states in the semiconductor is 1013 cm−2eV−1 or less. The band gap may be 2 eV or greater. The semiconductor may include at least one selected from the group consisting of In, Ga, Zn and Sn. The semiconductor may be one selected from the group consisting of amorphous In—Ga—Zn—O (IGZO), amorphous In—Zn—O (IZO) and amorphous Zn—Sn—O (ZTO). The light irradiation may induce the threshold voltage shift in the semiconductor element, the shift being of the opposite sign to the threshold voltage shift caused by manufacturing process history, time-dependent change, electrical stress or thermal stress.
摘要翻译：在处理至少包括半导体的半导体元件的方法中，通过用比半导体的吸收边缘波长更长的光照射半导体来改变半导体元件的阈值电压。半导体中间隙状态的面密度为1013cm-2eV-1或更小。带隙可以是2eV或更大。半导体可以包括选自In，Ga，Zn和Sn中的至少一种。半导体可以是选自由无定形In-Ga-Zn-O（IGZO），非晶In-Zn-O（IZO）和无定形Zn-Sn-O（ZTO）组成的组中的一种。光照射可以引起半导体元件中的阈值电压偏移，该偏移与由制造工艺历史，时间依赖变化，电应力或热应力引起的阈值电压偏移相反。

4. 发明授权

US07501305B2 Method for forming deposited film and photovoltaic element 有权
标题翻译：沉积膜和光伏元件的形成方法
公开(公告)号：US07501305B2
公开(公告)日：2009-03-10
申请号：US11874352
申请日：2007-10-18
申请人： Yasuyoshi Takai , Hiroshi Shimoda , Shotaro Okabe , Koichi Matsuda , Hidetoshi Tsuzuki
发明人： Yasuyoshi Takai , Hiroshi Shimoda , Shotaro Okabe , Koichi Matsuda , Hidetoshi Tsuzuki
IPC分类号： H01L21/20
CPC分类号： H01L21/67253 , C23C16/24 , C23C16/545 , H01L31/03685 , H01L31/03762 , H01L31/076 , H01L31/1824 , H01L31/202 , Y02E10/545 , Y02E10/548 , Y02P70/521
摘要： A method for forming a deposited film containing microcrystalline silicon on a moving substrate by plasma-enhanced CVD includes forming a deposited film containing microcrystalline silicon on a moving substrate by plasma-enhanced CVD under conditions such that when a deposited film having a thickness of 300 nm or more is formed on a substrate while the substrate is in a stationary state, an area of the microcrystalline silicon region in which an intensity of Raman scattering attributed to a crystalline substance in the deposited film is equal to or higher than three times an intensity of Raman scattering attributed to an amorphous is 50% or more of the total area based on the area of the microcrystalline silicon region and the area of a region composed of the amorphous.
摘要翻译：通过等离子体增强CVD在移动基板上形成含有微晶硅的沉积膜的方法包括通过等离子体增强CVD在移动的衬底上形成含有微晶硅的沉积膜，使得当厚度为300nm的沉积膜以上，在基板处于静止状态的同时，在基板上形成有由析出膜中的结晶物质引起的拉曼散射强度的微晶硅区域的面积等于或高于归因于非晶体的拉曼散射基于微晶硅区域的面积和由无定形构成的区域的面积为总面积的50％以上。

5. 发明授权

US07211708B2 Exhaust processing method, plasma processing method and plasma processing apparatus 失效
标题翻译：排气处理方法，等离子体处理方法和等离子体处理装置
公开(公告)号：US07211708B2
公开(公告)日：2007-05-01
申请号：US09822191
申请日：2001-04-02
申请人： Takeshi Shishido , Shotaro Okabe , Masahiro Kanai , Yuzo Koda , Yasuyoshi Takai , Tadashi Hori , Koichiro Moriyama , Hidetoshi Tsuzuki , Hiroyuki Ozaki
发明人： Takeshi Shishido , Shotaro Okabe , Masahiro Kanai , Yuzo Koda , Yasuyoshi Takai , Tadashi Hori , Koichiro Moriyama , Hidetoshi Tsuzuki , Hiroyuki Ozaki
IPC分类号： A62D3/00 , B08B15/00 , B08B5/00 , H05H1/03 , H05H1/16 , H05H1/48
CPC分类号： H01J37/32844 , C23C14/564 , C23C16/4412 , Y02C20/30 , Y02P70/605
摘要： A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.
摘要翻译：化学反应诱发装置设置在连接用于对衬底或膜进行等离子体处理的处理空间到排气装置的排气管线中，并且至少从处理空间排出的未反应气体或副产物发生化学反应不允许处理空间中的等离子体到达化学反应诱导装置，从而提高化学反应诱导装置处理未反应气体或副产物的处理能力。

6. 发明授权

US06930025B2 Transparent conductive film formation process, photovoltaic device production process, transparent conductive film, and photovoltaic device 有权
标题翻译：透明导电膜形成工艺，光伏器件生产工艺，透明导电膜和光伏器件
公开(公告)号：US06930025B2
公开(公告)日：2005-08-16
申请号：US10059168
申请日：2002-01-31
申请人： Akiya Nakayama , Hiroshi Echizen , Yasuyoshi Takai , Naoto Okada , Shigeo Kiso
发明人： Akiya Nakayama , Hiroshi Echizen , Yasuyoshi Takai , Naoto Okada , Shigeo Kiso
IPC分类号： C23C14/02 , H01L31/0224 , H01L31/052 , H01L31/18 , H01L21/20 , H01L21/36
CPC分类号： H01L31/1884 , C23C14/024 , H01L31/022466 , H01L31/022483 , H01L31/056 , Y02E10/52
摘要： In a process for forming on a substrate a transparent conductive film having crystallizability, the process comprises a first step of forming a film at a first film formation rate and a second step of forming a film at a second film formation rate, and the relationship between film formation rates in the respective steps satisfies: 2≦(second film formation rate)/(first film formation rate)≦100; which provides a process for producing a transparent conductive film by a deposition process advantageous for cost reduction, which can form in a short time a transparent conductive film having an uneven surface profile with a high light-confining effect, and can bring about an improvement in photovoltaic performance and enjoy a high mass productivity when applied to the formation of multi-layer structure of photovoltaic devices.
摘要翻译：在基板上形成具有结晶性的透明导电膜的方法中，该方法包括以第一成膜速度形成薄膜的第一步骤和以第二薄膜形成速率形成薄膜的第二步骤各步骤中的成膜速度满足：<？in-line-formula description =“In-line formula”end =“lead”？> 2 <=（第二成膜速率）/（第一成膜速率）<= 100 ; <？in-line-formula description =“In-line Formulas”end =“tail”？>，其提供了一种通过有利于成本降低的沉积工艺制造透明导电膜的方法，其可以在短时间内形成透明导电膜具有不均匀的表面轮廓，具有高的光限制效应，并且当应用于形成光伏器件的多层结构时，可以实现光伏性能的提高并且获得高的批量生产率。

7. 发明授权

US06860974B2 Long-Term sputtering method 失效
标题翻译：长期溅射法
公开(公告)号：US06860974B2
公开(公告)日：2005-03-01
申请号：US10183339
申请日：2002-06-28
申请人： Hiroshi Echizen , Yasuyoshi Takai , Akiya Nakayama
发明人： Hiroshi Echizen , Yasuyoshi Takai , Akiya Nakayama
IPC分类号： C23C14/34 , C23C14/00 , C23C14/56 , H01L31/0224 , H01L31/04 , C23C14/32
CPC分类号： H01L31/022466 , C23C14/0042 , C23C14/0073 , C23C14/568 , H01L31/022483
摘要： There are provided techniques of forming a back reflecting layer with constant characteristics throughout long-term film formation and forming a metal oxide film so as to be able to maintain a current of a bottom cell and thereby keep a short-circuit current Jsc of a solar cell constant over a long period of time. A sputtering method is a method of forming a stack of a metal film and a metal oxide film, comprising the step 1 of forming a metal layer on a substrate, the step 2 of bringing a surface of the metal layer into contact with active oxygen, and the step 3 of forming a metal oxide film thereon after the step 2, wherein in the step 2 an amount of active oxygen at a first substrate position is different from that at a second substrate position.
摘要翻译：提供了在长期成膜和形成金属氧化物膜时形成具有恒定特性的背反射层以便能够保持底电池的电流并由此保持太阳能的短路电流Jsc的技术细胞常数长时间。溅射法是形成金属膜和金属氧化物膜的堆叠的方法，其包括在基板上形成金属层的工序1，使金属层的表面与活性氧接触的工序2，以及步骤2之后在其上形成金属氧化物膜的步骤3，其中在步骤2中，第一基板位置处的活性氧量与第二基板位置处的活性氧量不同。

8. 发明授权

US06783640B2 Sputtering method and sputtering apparatus 失效
标题翻译：溅射方法和溅射装置
公开(公告)号：US06783640B2
公开(公告)日：2004-08-31
申请号：US10050787
申请日：2002-01-18
申请人： Toshihiro Yamashita , Hiroshi Echizen , Yasuyoshi Takai , Hidetoshi Tsuzuki
发明人： Toshihiro Yamashita , Hiroshi Echizen , Yasuyoshi Takai , Hidetoshi Tsuzuki
IPC分类号： C23C1434
CPC分类号： C23C14/0042 , C23C14/544
摘要： In a sputtering method for forming a film on a substrate in a film forming space while monitoring emission intensity of plasma, the method comprises the steps of detecting a thickness of the film formed on the substrate; comparing a detected value with a preset value of the film thickness; and deciding a target value of the emission intensity in accordance with a compared result. With the method, a transparent conductive film is formed which has high uniformity in film thickness, sheet resistance and transmittance and hence has superior characteristics.
摘要翻译：在监测等离子体的发光强度的同时，在成膜空间的基板上形成膜的溅射方法中，该方法包括以下步骤：检测在基板上形成的膜的厚度; 将检测值与膜厚的预设值进行比较; 并根据比较结果决定发光强度的目标值。通过该方法，形成了透明导电膜，其膜厚度，薄层电阻和透射率均匀性高，因此具有优异的特性。

9. 发明授权

US5597623A Process for using microwave plasma CVD 失效
标题翻译：使用微波等离子体CVD的方法
公开(公告)号：US5597623A
公开(公告)日：1997-01-28
申请号：US307099
申请日：1994-09-16
申请人： Yasuyoshi Takai , Tetsuya Takei , Hirokazu Otoshi , Ryuji Okamura
发明人： Yasuyoshi Takai , Tetsuya Takei , Hirokazu Otoshi , Ryuji Okamura
IPC分类号： C23C16/50 , C23C16/511 , G03G5/08 , H01J37/32 , H01L21/205 , H05H1/30
CPC分类号： C23C16/511 , H01J37/32238 , H01J37/32467
摘要： An improved microwave plasma CVD process for forming a functional deposited film using a microwave transmissive window composed of a sintered alpha-alumina ceramics body containing alpha-alumina as a matrix comprised of fine particles with a mean particle size d satisfying the equation 0.5 .mu.m.ltoreq.d.ltoreq.50 .mu.m and with a ratio of .rho..sub.2 /.rho..sub.1 between the theoretical density .rho..sub.1 and the bulk density .rho..sub.2 satisfying the equation 0.800.ltoreq..rho..sub.2 /.rho..sub.1 .ltoreq.0.995.
摘要翻译：一种改进的微波等离子体CVD法，用于使用由包含α-氧化铝的烧结α-氧化铝陶瓷体构成的微波透射窗形成功能性沉积膜，该α-氧化铝作为基质，其平均粒径d满足0.5μm / = d

10. 发明授权

US08624240B2 Top gate thin film transistor and display apparatus including the same 有权
标题翻译：顶栅薄膜晶体管和包括其的显示装置
公开(公告)号：US08624240B2
公开(公告)日：2014-01-07
申请号：US13188215
申请日：2011-07-21
申请人： Ayumu Sato , Hideya Kumomi , Hisato Yabuta , Ryo Hayashi , Yasuyoshi Takai
发明人： Ayumu Sato , Hideya Kumomi , Hisato Yabuta , Ryo Hayashi , Yasuyoshi Takai
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78618 , H01L29/78648
摘要： Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.
摘要翻译：提供了一种顶栅薄膜晶体管，其包括在基板上：源电极层; 漏电极层; 氧化物半导体层; 栅极绝缘层; 包含含有选自In，Ga，Zn和Sn中的至少一种元素的非晶氧化物半导体的栅极电极层; 以及含有氢的保护层，其中：所述栅绝缘层形成在所述氧化物半导体层的沟道区上; 栅电极层形成在栅极绝缘层上; 并且在栅电极层上形成保护层。

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