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1. 发明申请

US20080175080A1 Semiconductor memory device and test method thereof 有权
标题翻译：半导体存储器件及其测试方法
公开(公告)号：US20080175080A1
公开(公告)日：2008-07-24
申请号：US12004715
申请日：2007-12-21
申请人： Yong-Jun Kim , Woo-Seop Jeong , Kyu-Chan Lee
发明人： Yong-Jun Kim , Woo-Seop Jeong , Kyu-Chan Lee
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/56 , G01R31/318511 , G11C29/006 , G11C29/1201 , G11C29/48 , G11C2029/5602 , H01L2224/06156
摘要： Provided are a semiconductor memory device and a test method thereof. The semiconductor memory device includes: a die in which a plurality of internal circuits are integrated; a plurality of first and second channel pads having a first pad size and a first pad pitch, disposed in an alternating manner in a straight line at a center part of the die, and divided into a plurality of parallel rows, wherein the plurality of first and second channel pads are configured to selectively contact test probes in an alternating manner to receive an external wafer test signal and to output a signal generated by the plurality of internal circuits to the exterior. Therefore, it is possible to perform a test using plural channel pads during a wafer test of the semiconductor memory device using a plurality of probes of a probe card without incorrect contacts or non-contact with adjacent pads.
摘要翻译：提供半导体存储器件及其测试方法。半导体存储器件包括：集成有多个内部电路的管芯; 具有第一焊盘尺寸和第一焊盘间距的多个第一和第二通道焊盘，以交替的方式设置在模具的中心部分处的直线上，并且被分成多个平行的行，其中多个第一焊盘并且第二通道焊盘被配置为以交替方式选择性地接触测试探针以接收外部晶片测试信号并将由多个内部电路产生的信号输出到外部。因此，可以在半导体存储器件的晶片测试期间使用多个探针卡的探针来进行使用多个通道焊盘的测试，而不会与相邻的焊盘不接触或不接触。

2. 发明授权

US07782688B2 Semiconductor memory device and test method thereof 有权
标题翻译：半导体存储器件及其测试方法
公开(公告)号：US07782688B2
公开(公告)日：2010-08-24
申请号：US12004715
申请日：2007-12-21
申请人： Yong-Jun Kim , Woo-Seop Jeong , Kyu-Chan Lee
发明人： Yong-Jun Kim , Woo-Seop Jeong , Kyu-Chan Lee
IPC分类号： G11C7/00
CPC分类号： G11C29/56 , G01R31/318511 , G11C29/006 , G11C29/1201 , G11C29/48 , G11C2029/5602 , H01L2224/06156
摘要： Provided are a semiconductor memory device and a test method thereof. The semiconductor memory device includes: a die in which a plurality of internal circuits are integrated; a plurality of first and second channel pads having a first pad size and a first pad pitch, disposed in an alternating manner in a straight line at a center part of the die, and divided into a plurality of parallel rows, wherein the plurality of first and second channel pads are configured to selectively contact test probes in an alternating manner to receive an external wafer test signal and to output a signal generated by the plurality of internal circuits to the exterior. Therefore, it is possible to perform a test using plural channel pads during a wafer test of the semiconductor memory device using a plurality of probes of a probe card without incorrect contacts or non-contact with adjacent pads.
摘要翻译：提供半导体存储器件及其测试方法。半导体存储器件包括：集成有多个内部电路的管芯; 具有第一焊盘尺寸和第一焊盘间距的多个第一和第二通道焊盘，以交替的方式设置在模具的中心部分处的直线上，并且被分成多个平行的行，其中多个第一焊盘并且第二通道焊盘被配置为以交替方式选择性地接触测试探针以接收外部晶片测试信号并将由多个内部电路产生的信号输出到外部。因此，可以在半导体存储器件的晶片测试期间使用多个探针卡的探针来进行使用多个通道焊盘的测试，而不会与相邻的焊盘不接触或不接触。

3. 发明申请

US20080191624A1 PLASMA DISPLAY DEVICE 审中-公开
标题翻译：等离子体显示设备
公开(公告)号：US20080191624A1
公开(公告)日：2008-08-14
申请号：US12027201
申请日：2008-02-06
申请人： Chong-Gi Hong , Tae-Kyoung Kang , Seong-Hun Choo , Yong-Jun Kim , Yong-Su Park , Joo-Ri Kwak , Ki-Jong Eom , Min-Sic Kim
发明人： Chong-Gi Hong , Tae-Kyoung Kang , Seong-Hun Choo , Yong-Jun Kim , Yong-Su Park , Joo-Ri Kwak , Ki-Jong Eom , Min-Sic Kim
IPC分类号： H01J17/49
CPC分类号： H01J11/44 , H01J11/12 , H01J2211/444
摘要： A plasma display device including: a plasma display panel adapted to create images and including a front substrate, a rear substrate, a plurality of discharge cells defined between the front substrate and the rear substrate, and phosphors coated in the discharge cells; and a filter attached to a front surface of the front substrate and adapted to serve as an image display surface, wherein the filter and the phosphors are respectively colored with first and second colors that are different from each other.
摘要翻译：一种等离子体显示装置，包括：等离子体显示面板，其适于产生图像并包括前基板，后基板，限定在前基板和后基板之间的多个放电单元，以及涂覆在放电单元中的荧光体; 以及附接到所述前基板的前表面并适于用作图像显示表面的滤光器，其中所述滤光器和所述荧光体分别用彼此不同的第一和第二颜色着色。

4. 发明申请

US20050062418A1 Plasma display panel 失效
标题翻译：等离子显示面板
公开(公告)号：US20050062418A1
公开(公告)日：2005-03-24
申请号：US10933430
申请日：2004-09-03
申请人： Tae-Kyoung Kang , Yong-Jun Kim
发明人： Tae-Kyoung Kang , Yong-Jun Kim
IPC分类号： H01J9/00 , H01J11/12 , H01J11/22 , H01J11/24 , H01J11/26 , H01J11/34 , H01J11/36 , H01J11/50
CPC分类号： H01J11/26 , H01J11/12 , H01J2211/265
摘要： A plasma display panel includes designed to improve optical efficiently and to reduce misdischarging between discharge cells. The address electrodes have varying widths so that they are narrow in discharge cells and are relatively wide outside of discharge cells. Discharge gas filling the discharge cells have an elevated Xe content, preferably 10 to 30%. Other variations further include having striped and matrix patterned barrier ribs, forming the discharge sustain electrodes in tabs extending in pairs into the middle of the discharge cells, and varying the width of address electrodes at various locations outside of the discharge cells.
摘要翻译：等离子体显示面板包括设计成有效地改善光学和减少放电单元之间的放电不良。寻址电极具有变化的宽度，使得它们在放电单元中窄，并且在放电单元的外部相对较宽。填充放电单元的放电气体的Xe含量升高，优选为10〜30％。其他变型还包括具有条状和矩阵图案化阻挡肋，在成对延伸到放电单元的中间的接片中形成放电维持电极，并且在放电单元外的各个位置改变寻址电极的宽度。

5. 发明授权

US06762659B2 Radio filter of combline structure with capacitor compensation circuit 有权
标题翻译：具有电容补偿电路的梳结构无线滤波器
公开(公告)号：US06762659B2
公开(公告)日：2004-07-13
申请号：US09825930
申请日：2001-04-05
申请人： Mi-Hyun Son , Yong-Jun Kim
发明人： Mi-Hyun Son , Yong-Jun Kim
IPC分类号： H01P120
CPC分类号： H01P1/20336
摘要： A radio-filter of combline structure with a capacitor compensation circuit, having a transmission line filter with at least one pair of transmission lines arranged between input and output terminals for filtering the input signals through the input terminal to select signals of a given frequency band delivered to the output terminal, each of the transmission lines having a via-hole at each of its ends, a capacitor compensator of lumped element connected through one of the via-holes to one of the transmission lines for providing capacitance between the transmission line and ground, and a ground layer connected to the other via-hole not connected with the transmission line to ground the transmission line.
摘要翻译：一种具有电容器补偿电路的梳状结构的无线电滤波器，具有传输线滤波器，其具有布置在输入和输出端之间的至少一对传输线，用于通过输入端子对输入信号进行滤波，以选择给定频带的信号到输出端子，每个传输线在其每个端部具有通孔，集总元件的电容器补偿器通过一个通孔连接到传输线之一，用于在传输线和地之间提供电容以及连接到未与传输线连接的另一个通孔的接地层，以将传输线接地。

6. 发明申请

US20130224929A1 METHOD OF FORMING A CONTACT AND METHOD OF MANUFACTURING A PHASE CHANGE MEMORY DEVICE USING THE SAME 有权
标题翻译：形成接触的方法和使用该方法制造相变存储器件的方法
公开(公告)号：US20130224929A1
公开(公告)日：2013-08-29
申请号：US13613277
申请日：2012-09-13
申请人： SEUNG-PIL KO , Eun-Jung Kim , Yong-Jun Kim
发明人： SEUNG-PIL KO , Eun-Jung Kim , Yong-Jun Kim
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2409 , H01L27/2463 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/16 , H01L45/1675
摘要： Provided are a method of forming a contact and a method of manufacturing a phase change memory device using the same. The method of forming a contact includes forming on a substrate an insulating layer pattern having first sidewalls extending in a first direction and second sidewalls extending in a second direction perpendicular to the first direction and which together delimit contact holes, forming semiconductor patterns in lower parts of the contact holes, forming isolation spacers on the semiconductor pattern and side surfaces of the first sidewalls to expose portions of the semiconductor patterns, and etching the exposed portions of the semiconductor patterns using the isolation spacers as a mask to divide the semiconductor patterns into a plurality of finer semiconductor patterns.
摘要翻译：提供一种形成接触的方法和使用其形成相变存储器件的方法。形成接触的方法包括在基板上形成具有沿第一方向延伸的第一侧壁的绝缘层图案和沿垂直于第一方向的第二方向延伸的第二侧壁，并且一起界定接触孔，在下部形成半导体图案接触孔，在半导体图案和第一侧壁的侧表面上形成隔离间隔物以暴露半导体图案的部分，并且使用隔离间隔件作为掩模蚀刻半导体图案的暴露部分，以将半导体图案划分为多个更精细的半导体图案。

7. 发明授权

US07948181B2 Plasma display panel and plasma display device including the plasma display panel 失效
标题翻译：等离子体显示面板和等离子体显示装置，包括等离子体显示面板
公开(公告)号：US07948181B2
公开(公告)日：2011-05-24
申请号：US12036094
申请日：2008-02-22
申请人： Chong-Gi Hong , Young-Soo Seo , Yong-Jun Kim , Ki-Jong Eom
发明人： Chong-Gi Hong , Young-Soo Seo , Yong-Jun Kim , Ki-Jong Eom
IPC分类号： H01J1/62
CPC分类号： H01J11/44 , H01J11/12 , H01J11/34 , H01J11/36 , H01J11/38 , H01J2211/444 , H01J2211/446
摘要： A plasma display panel includes a front substrate having a first color, a rear substrate facing the front substrate, barrier ribs disposed between the front and rear substrates and defining discharge cells, the barrier ribs having a second color, phosphor layers disposed in the discharge cells, display electrodes arranged on the front substrate and extending in a first direction, the discharge electrodes corresponding to the discharge cells, a dielectric layer disposed on the front substrate and covering the display electrodes, the dielectric layer having a third color, address electrodes arranged on the rear substrate and extending in a second direction crossing the first direction, the address electrodes corresponding to the discharge cells, and a filter disposed on the front substrate and having a fourth color. The first through fourth colors realize a subtractive color mixture through a complementary coloring with each other.
摘要翻译：等离子体显示面板包括具有第一颜色的前基板，面向前基板的后基板，设置在前基板和后基板之间的阻挡肋，并且限定放电单元，所述阻挡肋具有第二颜色，设置在放电单元中的荧光体层，布置在前基板上并沿第一方向延伸的显示电极，与放电单元相对应的放电电极，布置在前基板上并覆盖显示电极的电介质层，具有第三颜色的电介质层，布置在其上的寻址电极后基板并且沿与第一方向交叉的第二方向延伸，与放电单元相对应的寻址电极，以及布置在前基板上并具有第四颜色的滤波器。第一至第四种颜色通过互补着色实现减色混合。

8. 发明授权

US07466078B2 Plasma display panel 失效
标题翻译：等离子显示面板
公开(公告)号：US07466078B2
公开(公告)日：2008-12-16
申请号：US11208784
申请日：2005-08-23
申请人： Yong-Jun Kim , Tae-Kyoung Kang , Ki-Jung Kim
发明人： Yong-Jun Kim , Tae-Kyoung Kang , Ki-Jung Kim
IPC分类号： H01J17/49
CPC分类号： H01J11/36 , H01J11/12 , H01J11/42 , H01J2211/363 , H01J2211/368 , H01J2211/48 , H01J2211/54
摘要： A plasma display panel design having a display area and a peripheral area surrounding the display area. Within the display area are discharge cells, and within the peripheral area are dummy cells that serve as a location where fluorescent paste is injected onto in an early stage of making the display, enabling the injection amount and injection speed from a nozzle to stabilize before the fluorescent material is deposited into the discharge cells. A surface area that the fluorescent material is deposited on in the peripheral area is increased to provide for a more rapid stabilization of the injection pressure and injection amount of the paste in the making of the display. A sufficient gap is present between a sealant and the dummy structure so that air and foreign matter can be expelled.
摘要翻译：一种具有显示区域和围绕显示区域的外围区域的等离子体显示面板设计。在显示区域内是放电单元，并且在周边区域内是用作在制作显示器的早期阶段将荧光膏注入到其中的位置的虚拟单元，使得喷嘴的喷射量和喷射速度能够在喷嘴之前稳定荧光材料沉积到放电单元中。增加荧光材料在周边区域中沉积的表面积，以在制作显示器时提供更快速地稳定浆料的注射压力和注射量。在密封剂和虚拟结构之间存在足够的间隙，从而可以排出空气和异物。

9. 发明授权

US07123058B2 Signal detecting circuit and method therefor 有权
标题翻译：信号检测电路及其方法
公开(公告)号：US07123058B2
公开(公告)日：2006-10-17
申请号：US10844502
申请日：2004-05-13
申请人： Yong-Jun Kim , Myung-Bo Kwak
发明人： Yong-Jun Kim , Myung-Bo Kwak
IPC分类号： H03K5/22
CPC分类号： G01R31/31713 , G01R31/31703 , G01R31/31932
摘要： A stable, low power consumption signal detecting circuit may include: a delay circuit, which receives a base clock signal and generates multiple versions thereof having time delay relationships thereto, respectively; dual amplifiers, which detect valid ones of input signals by comparing the input signals with reference voltage signals in response to the multiple versions of the base clock signal, respectively; a combining unit, which generates a combination signal in response to output signals of the dual amplifiers; and a sampling circuit, which samples the combination signal according to the base clock signal and generates an output signal.
摘要翻译：稳定的低功耗信号检测电路可以包括：延迟电路，其分别接收基本时钟信号并产生具有时间延迟关系的多个版本; 双放大器，其分别响应于基本时钟信号的多个版本，通过将输入信号与参考电压信号进行比较来检测输入信号中的有效输入信号; 组合单元，其响应于双放大器的输出信号产生组合信号; 以及采样电路，其根据基本时钟信号对组合信号进行采样，并产生输出信号。

10. 发明授权

US07098594B2 Plasma display panel having delta pixel arrangement 失效
标题翻译：等离子显示面板，具有Δ像素排列
公开(公告)号：US07098594B2
公开(公告)日：2006-08-29
申请号：US10724644
申请日：2003-12-01
申请人： Cha-Keun Yoon , Min-Sun Yoo , Jung-Keun Ahn , Yong-Jun Kim , Tae-Ho Lee , Sung-Hune Yoo
发明人： Cha-Keun Yoon , Min-Sun Yoo , Jung-Keun Ahn , Yong-Jun Kim , Tae-Ho Lee , Sung-Hune Yoo
IPC分类号： H01J17/49
CPC分类号： H01J11/36 , H01J11/12 , H01J2211/265 , H01J2211/365
摘要： A plasma display panel. A first substrate and a second substrate are provided at a predetermined distance from the first substrate and form a vacuum assembly with the first substrate. Barrier ribs form pixels between the first substrate and the second substrate such that subpixels forming one grouping of pixels are arranged in a triangular configuration. A plurality of address electrodes is formed on a surface of the first substrate facing the second substrate and along a first direction of the first substrate. A plurality of discharge sustain electrodes is formed on a surface of the second substrate facing the first substrate and along a first direction of the second substrate. A phosphor layer and a discharge gas are provided between the first substrate and the second substrate. If a length of a line passing through a center of the subpixels and interconnecting two opposing corners of the subpixels is (c), and if a length of a line extending between two adjacent corners is (b), the subpixels are formed such that a (b) to (c) ratio is between 1:1.5 and 1:5.
摘要翻译：等离子体显示面板。第一基板和第二基板设置在距第一基板预定距离处，并与第一基板形成真空组件。阻挡肋在第一基板和第二基板之间形成像素，使得形成一组像素的子像素被布置成三角形配置。多个寻址电极形成在面向第二基板的第一基板的表面上并且沿着第一基板的第一方向。多个放电维持电极形成在面向第一基板的第二基板的表面上并且沿着第二基板的第一方向。在第一基板和第二基板之间设置荧光体层和放电气体。如果通过子像素的中心并使子像素的两个相对的角相互连接的线的长度为（c），并且如果在两个相邻角之间延伸的线的长度为（b），则子像素形成为使得（b）〜（c）的比例为1:1.5〜1:5。

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