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1. 发明申请

US20080266275A1 SHIFT REGISTER AND LIQUID CRYSTAL DISPLAY 有权
标题翻译： SHIFT寄存器和液晶显示器
公开(公告)号：US20080266275A1
公开(公告)日：2008-10-30
申请号：US12108546
申请日：2008-04-24
申请人： Yi-Cheng Tsai , Chien-Ting Chan , Hsi-Rong Han , Wen-Chun Wang , Kuo-Chang Su
发明人： Yi-Cheng Tsai , Chien-Ting Chan , Hsi-Rong Han , Wen-Chun Wang , Kuo-Chang Su
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G2310/0281 , G09G2310/0286 , G09G2330/021 , G11C19/28
摘要： A shift register is for generating scan signals. Each stage of the shift register comprises a first level lifting unit and at least a second level lifting unit, a first level lowering unit and at least a second level lowering unit, first and second driving units. The first level lowering and lifting units are for controlling the levels of signals at the first output terminal to output a first scan signal. The second level lowering unit and second level lifting unit are for controlling the levels of signals at the second output terminal to output at least a second scan signal. The first and second driving units are for turning on and off the first and the second level lifting units and the first and the second level lowering unit to control the first and second scan signals.
摘要翻译：移位寄存器用于产生扫描信号。移位寄存器的每个级包括第一级提升单元和至少第二级提升单元，第一级降级单元和至少第二级降级单元，第一和第二驱动单元。第一级降低和提升单元用于控制第一输出端子处的信号电平以输出第一扫描信号。第二电平降低单元和第二电平提升单元用于控制第二输出端子处的信号电平以输出至少第二扫描信号。第一和第二驱动单元用于打开和关闭第一和第二电平提升单元以及第一和第二电平降低单元以控制第一和第二扫描信号。

2. 发明授权

US08208598B2 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US08208598B2
公开(公告)日：2012-06-26
申请号：US12275455
申请日：2008-11-21
申请人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
发明人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2310/0281 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A shift register comprises many stages, and each of stages comprises a first, a second and a third level control unit and a first and a second control unit is provided. The first and the second level control unit respectively provides a first clock signal and a voltage to an output terminal. The first driving unit and the level control unit are coupled to a first node. The first driving unit turns on and turns off the first level control unit in response to an input signal, a second control signal and a first control signal of the next stage. The second driving unit turns on and turns off the second level control unit in response to the first control signal. The third level control unit provides a first voltage to the output terminal in response to the second control signal and the first control signal.
摘要翻译：移位寄存器包括许多级，并且每个级包括第一级，第二级和第三级控制单元以及第一和第二控制单元。第一和第二电平控制单元分别向输出端提供第一时钟信号和电压。第一驱动单元和电平控制单元耦合到第一节点。响应于下一级的输入信号，第二控制信号和第一控制信号，第一驱动单元接通并关断第一电平控制单元。第二驱动单元响应于第一控制信号而导通和关闭第二电平控制单元。第三电平控制单元响应于第二控制信号和第一控制信号向输出端提供第一电压。

3. 发明授权

US08018539B2 Pixel circuit structure 有权
标题翻译：像素电路结构
公开(公告)号：US08018539B2
公开(公告)日：2011-09-13
申请号：US12244906
申请日：2008-10-03
申请人： Yi-Cheng Tsai , I-Fang Wang , Wen-Chun Wang , Hen-Ta Kang , Kai-Lun Kuo , Ming-Chang Yu , Wan-Jen Tsai
发明人： Yi-Cheng Tsai , I-Fang Wang , Wen-Chun Wang , Hen-Ta Kang , Kai-Lun Kuo , Ming-Chang Yu , Wan-Jen Tsai
IPC分类号： G02F1/133
CPC分类号： G09G3/3648 , G09G3/3614 , G09G2300/0443 , G09G2300/0447 , G09G2300/0456 , G09G2320/028
摘要： A pixel circuit structure applied in an LCD panel, which has a common voltage and includes at least one data line, is provided. The pixel circuit structure includes a first and a second circuit. The first circuit includes a first switch and a first capacitor. The second circuit includes a second switch, a third switch and a second capacitor. One end of the first capacitor receives the common voltage. Two ends of the first switch are respectively coupled to the data line and the other end of the first capacitor. The second and the third switch are coupled serially between the data line and a voltage source. One end of the second capacitor receives the common voltage, and the other end is coupled between the second and the third switch. The potential difference between the two ends of the first capacitor is different from that of the second capacitor.
摘要翻译：提供了应用于具有公共电压并且包括至少一条数据线的LCD面板中的像素电路结构。像素电路结构包括第一和第二电路。第一电路包括第一开关和第一电容器。第二电路包括第二开关，第三开关和第二电容器。第一电容器的一端接收公共电压。第一开关的两端分别耦合到第一电容器的数据线和另一端。第二和第三开关串联连接在数据线和电压源之间。第二电容器的一端接收公共电压，另一端耦合在第二和第三开关之间。第一电容器的两端之间的电位差与第二电容器的电位差不同。

4. 发明申请

US20090268114A1 LIQUID CRYSTAL DISPLAY PANEL 有权
标题翻译：液晶显示面板
公开(公告)号：US20090268114A1
公开(公告)日：2009-10-29
申请号：US12429184
申请日：2009-04-24
申请人： Wen-Chun Wang , Yi-Chin Wang , Yi-Cheng Tsai
发明人： Wen-Chun Wang , Yi-Chin Wang , Yi-Cheng Tsai
IPC分类号： G02F1/133 , G02F1/1343 , G02F1/1335
CPC分类号： G02F1/136213 , G02F1/134309 , G02F2201/121 , G09G3/3655 , G09G2300/0443 , G09G2300/0447 , G09G2300/0456 , G09G2300/0852 , G09G2300/0876 , G09G2320/0242
摘要： A liquid crystal display panel including an active device array substrate, an opposite substrate, and a liquid crystal layer is provided. The active device array substrate has at least one pixel unit including two active devices, two first pixel electrodes, and two common lines. Each of the active devices has a gate, a source, and a drain. The gates are connected with one another, the sources are connected with one another, and the pixel electrodes are connected with the drains. A first signal source connected with one of the common lines is different from a second signal source connected with the other one of the common lines. The opposite substrate has a common electrode connected with the first signal source. The liquid crystal layer is disposed between the active device array substrate and the opposite substrate.
摘要翻译：提供了包括有源器件阵列基板，相对基板和液晶层的液晶显示面板。有源器件阵列衬底具有包括两个有源器件，两个第一像素电极和两条公共线的至少一个像素单元。每个有源器件具有栅极，源极和漏极。栅极彼此连接，源极彼此连接，像素电极与漏极连接。与公共线之一连接的第一信号源与与另一条公共线连接的第二信号源不同。相对的基板具有与第一信号源连接的公共电极。液晶层设置在有源器件阵列衬底和相对衬底之间。

5. 发明申请

US20090128541A1 SHIFT REGISTER 有权
标题翻译：移位寄存器
公开(公告)号：US20090128541A1
公开(公告)日：2009-05-21
申请号：US12275455
申请日：2008-11-21
申请人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
发明人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
IPC分类号： G06F3/038
CPC分类号： G09G3/3677 , G09G2310/0281 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A shift register comprises many stages, and each of stages comprises a first, a second and a third level control unit and a first and a second control unit is provided. The first and the second level control unit respectively provides a first clock signal and a voltage to an output terminal. The first driving unit and the level control unit are coupled to a first node. The first driving unit turns on and turns off the first level control unit in response to an input signal, a second control signal and a first control signal of the next stage. The second driving unit turns on and turns off the second level control unit in response to the first control signal. The third level control unit provides a first voltage to the output terminal in response to the second control signal and the first control signal.
摘要翻译：移位寄存器包括许多级，并且每个级包括第一级，第二级和第三级控制单元以及第一和第二控制单元。第一和第二电平控制单元分别向输出端提供第一时钟信号和电压。第一驱动单元和电平控制单元耦合到第一节点。响应于下一级的输入信号，第二控制信号和第一控制信号，第一驱动单元接通并关断第一电平控制单元。第二驱动单元响应于第一控制信号而导通和关闭第二电平控制单元。第三电平控制单元响应于第二控制信号和第一控制信号向输出端提供第一电压。

6. 发明申请

US20120206434A1 Shift Register 审中-公开
标题翻译：移位寄存器
公开(公告)号：US20120206434A1
公开(公告)日：2012-08-16
申请号：US13454952
申请日：2012-04-24
申请人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
发明人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
IPC分类号： G06F3/038
CPC分类号： G09G3/3677 , G09G2310/0281 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A shift register comprises many stages, and each of stages comprises a first, a second and a third level control unit and a first and a second control unit is provided. The first and the second level control unit respectively provides a first clock signal and a voltage to an output terminal. The first driving unit and the level control unit are coupled to a first node. The first driving unit turns on and turns off the first level control unit in response to an input signal, a second control signal and a first control signal of the next stage. The second driving unit turns on and turns off the second level control unit in response to the first control signal. The third level control unit provides a first voltage to the output terminal in response to the second control signal and the first control signal.
摘要翻译：移位寄存器包括许多级，并且每个级包括第一级，第二级和第三级控制单元以及第一和第二控制单元。第一和第二电平控制单元分别向输出端提供第一时钟信号和电压。第一驱动单元和电平控制单元耦合到第一节点。响应于下一级的输入信号，第二控制信号和第一控制信号，第一驱动单元接通并关断第一电平控制单元。第二驱动单元响应于第一控制信号而导通和关闭第二电平控制单元。第三电平控制单元响应于第二控制信号和第一控制信号向输出端提供第一电压。

7. 发明申请

US20090091670A1 PIXEL CIRCUIT STRUCTURE 有权
标题翻译：像素电路结构
公开(公告)号：US20090091670A1
公开(公告)日：2009-04-09
申请号：US12244906
申请日：2008-10-03
申请人： Yi-Cheng TSAI , I-Fang Wang , Wen-Chun Wang , Hen-Ta Kang , Kai-Lun Kuo , Ming-Chang Yu , Wan-Jen Tsai
发明人： Yi-Cheng TSAI , I-Fang Wang , Wen-Chun Wang , Hen-Ta Kang , Kai-Lun Kuo , Ming-Chang Yu , Wan-Jen Tsai
IPC分类号： G02F1/133
CPC分类号： G09G3/3648 , G09G3/3614 , G09G2300/0443 , G09G2300/0447 , G09G2300/0456 , G09G2320/028
摘要： A pixel circuit structure applied in an LCD panel, which has a common voltage and includes at least one data line, is provided. The pixel circuit structure includes a first and a second circuit. The first circuit includes a first switch and a first capacitor. The second circuit includes a second switch, a third switch and a second capacitor. One end of the first capacitor receives the common voltage. Two ends of the first switch are respectively coupled to the data line and the other end of the first capacitor. The second and the third switch are coupled serially between the data line and a voltage source. One end of the second capacitor receives the common voltage, and the other end is coupled between the second and the third switch. The potential difference between the two ends of the first capacitor is different from that of the second capacitor.
摘要翻译：提供了应用于具有公共电压并且包括至少一条数据线的LCD面板中的像素电路结构。像素电路结构包括第一和第二电路。第一电路包括第一开关和第一电容器。第二电路包括第二开关，第三开关和第二电容器。第一电容器的一端接收公共电压。第一开关的两端分别耦合到第一电容器的数据线和另一端。第二和第三开关串联连接在数据线和电压源之间。第二电容器的一端接收公共电压，另一端耦合在第二和第三开关之间。第一电容器的两端之间的电位差与第二电容器的电位差不同。

8. 发明申请

US20080016139A1 Shift register with each stage controlled by a specific voltage of the next stage and the stage after thereof 有权
标题翻译：每个级的移位寄存器由下一级的特定电压和其后的级控制
公开(公告)号：US20080016139A1
公开(公告)日：2008-01-17
申请号：US11822899
申请日：2007-07-11
申请人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
发明人： Yi-Cheng Tsai , Wen-Chun Wang , Hsi-Rong Han , Chien-Ting Chan
IPC分类号： G06F7/44
CPC分类号： G11C19/28 , G09G3/3674
摘要： A shift register has shift register units. The nth shift register unit includes first to third level control units and first and second driving units. The first and second level control units respectively provide a first clock signal and a first voltage to an output terminal. The first driving unit and the first level control unit are coupled to a first node, and a voltage on the first node is a first control signal. The first driving unit turns on and off the first level control unit in response to an input signal and second and third control signals. The second driving unit turns on and off the second level control unit in response to the first control signal. The third level control unit provides the first voltage to the output terminal in response to a front edge of the first control signal of the (n+2)th shift register unit.
摘要翻译：移位寄存器具有移位寄存器单元。第n级移位寄存器单元包括第一至第三电平控制单元和第一和第二驱动单元。第一和第二电平控制单元分别向输出端提供第一时钟信号和第一电压。第一驱动单元和第一电平控制单元耦合到第一节点，并且第一节点上的电压是第一控制信号。第一驱动单元响应于输入信号和第二和第三控制信号而打开和关闭第一电平控制单元。第二驱动单元响应于第一控制信号而打开和关闭第二电平控制单元。第三电平控制单元响应于第（n + 2）个第（＆）移位寄存器单元的第一控制信号的前沿向输出端提供第一电压。

9. 发明申请

US20070268420A1 Electrostatic discharge (ESD) protection circuit integrated with cell test function 失效
标题翻译：静电放电（ESD）保护电路集成了电池测试功能
公开(公告)号：US20070268420A1
公开(公告)日：2007-11-22
申请号：US11798228
申请日：2007-05-11
申请人： Yi-Cheng Tsai , Wen-Chun Wang
发明人： Yi-Cheng Tsai , Wen-Chun Wang
IPC分类号： G02F1/1333
CPC分类号： G09G3/20 , G02F1/13452 , G02F2202/22 , G09G2330/021 , G09G2330/04
摘要： A flat display including a display panel is disclosed. The display panel includes several signal lines and ESD protection circuits whose negative ESD protection circuits have cell test function. When a driving IC bonds to the display panel, the system operates in a normal dynamic display mode, and the negative ESD protection circuits are coupled to a low-level voltage such that thin film transistors of the negative ESD protection circuit are switched off in the normal display mode. Therefore, the power consumption of the panel module can be reduced and using time of the products can be improved.
摘要翻译：公开了一种包括显示面板的平板显示器。显示面板包括多个信号线和ESD保护电路，其负ESD保护电路具有单元测试功能。当驱动IC连接到显示面板时，系统以正常动态显示模式工作，并且负ESD保护电路耦合到低电平电压，使得负ESD保护电路的薄膜晶体管在正常显示模式。因此，可以减少面板模块的功耗，并且可以提高产品的使用时间。

10. 发明授权

US07551240B2 Electrostatic discharge (ESD) protection circuit integrated with cell test function 失效
标题翻译：静电放电（ESD）保护电路集成了电池测试功能
公开(公告)号：US07551240B2
公开(公告)日：2009-06-23
申请号：US11798228
申请日：2007-05-11
申请人： Yi-Cheng Tsai , Wen-Chun Wang
发明人： Yi-Cheng Tsai , Wen-Chun Wang
IPC分类号： G02F1/1333 , H01L31/00
CPC分类号： G09G3/20 , G02F1/13452 , G02F2202/22 , G09G2330/021 , G09G2330/04
摘要： A flat display including a display panel is disclosed. The display panel includes several signal lines and ESD protection circuits whose negative ESD protection circuits have cell test function. When a driving IC bonds to the display panel, the system operates in a normal dynamic display mode, and the negative ESD protection circuits are coupled to a low-level voltage such that thin film transistors of the negative ESD protection circuit are switched off in the normal display mode. Therefore, the power consumption of the panel module can be reduced and using time of the products can be improved.
摘要翻译：公开了一种包括显示面板的平板显示器。显示面板包括多个信号线和ESD保护电路，其负ESD保护电路具有单元测试功能。当驱动IC连接到显示面板时，系统以正常动态显示模式工作，并且负ESD保护电路耦合到低电平电压，使得负ESD保护电路的薄膜晶体管在正常显示模式。因此，可以减少面板模块的功耗，并且可以提高产品的使用时间。

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