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1. 发明申请

US20140291757A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20140291757A1
公开(公告)日：2014-10-02
申请号：US14359761
申请日：2011-11-22
申请人： Yasuhiro Hirabayashi , Masaru Senoo
发明人： Yasuhiro Hirabayashi , Masaru Senoo
IPC分类号： H01L29/423 , H01L29/78
CPC分类号： H01L29/78 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/861
摘要： A semiconductor device disclosed herein includes an insulated gate, a main and a sub trench conductors. The main and sub trench conductors are formed in the cell region, and have a conductor that is covered with an insulation film and fills a trench extending in a first direction. The sub trench is located, with respect to the main trench conductor, in a second direction perpendicularly crossing the first direction and extending from the cell region side to the non-cell region. Length of the sub trench conductor in the first direction is shorter than a length of the insulated gate in the first direction. Distance between the main and sub trench conductors is shorter than a distance between the main trench conductor and the insulated gate. At least a part of the sub trench conductor reaches a position deeper than a boundary between the first and second semiconductor regions.
摘要翻译：本文公开的半导体器件包括绝缘栅极，主沟道和次沟槽导体。主沟槽导体和副沟槽导体形成在单元区域中，并且具有被绝缘膜覆盖的导体，并填充沿第一方向延伸的沟槽。子沟槽相对于主沟槽导体沿与第一方向垂直的第二方向并且从单元区域侧延伸到非单元区域。第一方向上的副沟槽导体的长度比第一方向上的绝缘栅极的长度短。主沟槽导体和副沟槽导体之间的距离短于主沟道导体与绝缘栅之间的距离。子沟槽导体的至少一部分达到比第一和第二半导体区域之间的边界更深的位置。

2. 发明授权

US09082842B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09082842B2
公开(公告)日：2015-07-14
申请号：US14359761
申请日：2011-11-22
申请人： Yasuhiro Hirabayashi , Masaru Senoo
发明人： Yasuhiro Hirabayashi , Masaru Senoo
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L29/78 , H01L29/739 , H01L29/40 , H01L29/423 , H01L29/06
CPC分类号： H01L29/78 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/861
摘要： A semiconductor device disclosed herein includes an insulated gate, a main and a sub trench conductors. The main and sub trench conductors are formed in the cell region, and have a conductor that is covered with an insulation film and fills a trench extending in a first direction. The sub trench is located, with respect to the main trench conductor, in a second direction perpendicularly crossing the first direction and extending from the cell region side to the non-cell region. Length of the sub trench conductor in the first direction is shorter than a length of the insulated gate in the first direction. Distance between the main and sub trench conductors is shorter than a distance between the main trench conductor and the insulated gate. At least a part of the sub trench conductor reaches a position deeper than a boundary between the first and second semiconductor regions.
摘要翻译：本文公开的半导体器件包括绝缘栅极，主沟道和次沟槽导体。主沟槽导体和副沟槽导体形成在单元区域中，并且具有被绝缘膜覆盖的导体，并填充沿第一方向延伸的沟槽。子沟槽相对于主沟槽导体沿与第一方向垂直的第二方向并且从单元区域侧延伸到非单元区域。第一方向上的副沟槽导体的长度比第一方向上的绝缘栅极的长度短。主沟槽导体和副沟槽导体之间的距离短于主沟道导体与绝缘栅之间的距离。子沟槽导体的至少一部分达到比第一和第二半导体区域之间的边界更深的位置。

3. 发明申请

US20140374871A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140374871A1
公开(公告)日：2014-12-25
申请号：US14372103
申请日：2012-11-27
申请人： Yasuhiro Hirabayashi , Akinori Sakakibara
发明人： Yasuhiro Hirabayashi , Akinori Sakakibara
IPC分类号： H01L29/06 , H01L29/40
CPC分类号： H01L29/063 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/404 , H01L29/407 , H01L29/66348 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.
摘要翻译：提供了可以抑制外部电荷的影响并且可以有效地制造的半导体器件。半导体器件设置有其中设置有半导体元件的有源区和位于半导体衬底的有源区和边缘表面之间的终止区。绝缘层设置在端接区域的上表面的至少一部分上。多个浮置电极沿着从半导体衬底的有源区朝向边缘表面的方向以绝缘层间隔设置，并且多个浮置电极在半导体衬底的厚度方向上的宽度大于所述多个浮置电极在从所述有源区朝向所述半导体衬底的边缘表面的方向上的宽度。

4. 发明授权

US09385188B2 Semiconductor device with termination region having floating electrodes in an insulating layer 有权
标题翻译：具有终端区域的半导体器件，在绝缘层中具有浮置电极
公开(公告)号：US09385188B2
公开(公告)日：2016-07-05
申请号：US14372103
申请日：2012-11-27
申请人： Yasuhiro Hirabayashi , Akinori Sakakibara
发明人： Yasuhiro Hirabayashi , Akinori Sakakibara
IPC分类号： H01L29/06 , H01L29/40 , H01L29/66 , H01L29/739 , H01L29/78
CPC分类号： H01L29/063 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/404 , H01L29/407 , H01L29/66348 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.
摘要翻译：提供了可以抑制外部电荷的影响并且可以有效地制造的半导体器件。半导体器件设置有其中设置有半导体元件的有源区和位于半导体衬底的有源区和边缘表面之间的终止区。绝缘层设置在端接区域的上表面的至少一部分上。多个浮置电极沿着从半导体衬底的有源区朝向边缘表面的方向以绝缘层间隔设置，并且多个浮置电极在半导体衬底的厚度方向上的宽度大于所述多个浮置电极在从所述有源区朝向所述半导体衬底的边缘表面的方向上的宽度。

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