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1. 发明授权

US07813065B2 Systems and methods for acquiring modified rate burst demodulation in servo systems 有权
标题翻译：用于在伺服系统中获取改进的速率脉冲串解调的系统和方法
公开(公告)号：US07813065B2
公开(公告)日：2010-10-12
申请号：US12111319
申请日：2008-04-29
申请人： Viswanath Annampedu , Venkatram Muddhasani , Xun Zhang
发明人： Viswanath Annampedu , Venkatram Muddhasani , Xun Zhang
IPC分类号： G11B20/08 , G11B5/596
CPC分类号： G11B5/59622
摘要： Various embodiments of the present invention provide systems and methods for performing modified rate burst demodulation. For example, a method for performing modified rate burst demodulation is disclosed. The method includes receiving a data input that includes a synchronization pattern, an information pattern, and a demodulation pattern. A periodic boundary is established along with a phase and frequency of a sampling clock based at least in part on the synchronization pattern. The information pattern is processed using the sampling clock to determine a location fix. The sampling clock is phase shifted by a skew amount and a phase shifted sampling clock is provided. The demodulation pattern is processed using the phase shifted sampling clock.
摘要翻译：本发明的各种实施例提供了用于执行修改的速率突发解调的系统和方法。例如，公开了一种用于执行修正速率脉冲串解调的方法。该方法包括接收包括同步模式，信息模式和解调模式的数据输入。至少部分地基于同步模式，建立周期性边界以及采样时钟的相位和频率。使用采样时钟处理信息模式以确定位置锁定。采样时钟相位偏移量，并提供相移采样时钟。使用相移采样时钟来处理解调模式。

2. 发明申请

US20090268322A1 Systems and Methods for Acquiring Modified Rate Burst Demodulation in Servo Systems 有权
标题翻译：用于获取伺服系统中改进率爆破解调的系统和方法
公开(公告)号：US20090268322A1
公开(公告)日：2009-10-29
申请号：US12111319
申请日：2008-04-29
申请人： Viswanath Annampedu , Venkatram Muddhasani , Xun Zhang
发明人： Viswanath Annampedu , Venkatram Muddhasani , Xun Zhang
IPC分类号： G11B5/02
CPC分类号： G11B5/59622
摘要： Various embodiments of the present invention provide systems and methods for performing modified rate burst demodulation. For example, a method for performing modified rate burst demodulation is disclosed. The method includes receiving a data input that includes a synchronization pattern, an information pattern, and a demodulation pattern. A periodic boundary is established along with a phase and frequency of a sampling clock based at least in part on the synchronization pattern. The information pattern is processed using the sampling clock to determine a location fix. The sampling clock is phase shifted by a skew amount and a phase shifted sampling clock is provided. The demodulation pattern is processed using the phase shifted sampling clock.
摘要翻译：本发明的各种实施例提供了用于执行修改的速率突发解调的系统和方法。例如，公开了一种用于执行修正速率脉冲串解调的方法。该方法包括接收包括同步模式，信息模式和解调模式的数据输入。至少部分地基于同步模式，建立周期性边界以及采样时钟的相位和频率。使用采样时钟处理信息模式以确定位置锁定。采样时钟相位偏移量，并提供相移采样时钟。使用相移采样时钟来处理解调模式。

3. 发明申请

US20100118690A1 Systems and Methods for Sector Address Mark Detection 有权
标题翻译：用于扇区地址标记检测的系统和方法
公开(公告)号：US20100118690A1
公开(公告)日：2010-05-13
申请号：US12270786
申请日：2008-11-13
申请人： Viswanath Annampedu , Venkatram Muddhasani
发明人： Viswanath Annampedu , Venkatram Muddhasani
IPC分类号： G11B7/24
CPC分类号： G11B5/59655 , G11B5/09 , G11B5/59616
摘要： Various embodiments of the present invention provide systems and methods for sector address mark detection. As an example, data detection systems are disclosed that include a sector address mark detection circuit and a sector address mark quality detection circuit. The sector address mark detection circuit receives a data stream and identifies a sector address mark in the data stream. The sector address mark quality detection circuit receives a first sample and a second sample from the data stream corresponding to the sector address mark, and determines a quality of the sector address mark based at least in part on the first sample and the second sample. In various cases, one or more of the samples of the sector address mark up to all of the samples of the sector address mark may be used.
摘要翻译：本发明的各种实施例提供了用于扇区地址标记检测的系统和方法。作为示例，公开了包括扇区地址标记检测电路和扇区地址标记质量检测电路的数据检测系统。扇区地址标记检测电路接收数据流并识别数据流中的扇区地址标记。扇区地址标记质量检测电路从对应于扇区地址标记的数据流接收第一采样和第二采样，并且至少部分地基于第一采样和第二采样来确定扇区地址标记的质量。在各种情况下，可以使用扇区地址标记到扇区地址标记的所有样本的一个或多个样本。

4. 发明授权

US08243381B2 Systems and methods for sector address mark detection 有权
标题翻译：扇区地址标识检测的系统和方法
公开(公告)号：US08243381B2
公开(公告)日：2012-08-14
申请号：US12270786
申请日：2008-11-13
申请人： Viswanath Annampedu , Venkatram Muddhasani
发明人： Viswanath Annampedu , Venkatram Muddhasani
IPC分类号： G11B5/09
CPC分类号： G11B5/59655 , G11B5/09 , G11B5/59616
摘要： Various embodiments of the present invention provide systems and methods for sector address mark detection. As an example, data detection systems are disclosed that include a sector address mark detection circuit and a sector address mark quality detection circuit. The sector address mark detection circuit receives a data stream and identifies a sector address mark in the data stream. The sector address mark quality detection circuit receives a first sample and a second sample from the data stream corresponding to the sector address mark, and determines a quality of the sector address mark based at least in part on the first sample and the second sample. In various cases, one or more of the samples of the sector address mark up to all of the samples of the sector address mark may be used.
摘要翻译：本发明的各种实施例提供了用于扇区地址标记检测的系统和方法。作为示例，公开了包括扇区地址标记检测电路和扇区地址标记质量检测电路的数据检测系统。扇区地址标记检测电路接收数据流并识别数据流中的扇区地址标记。扇区地址标记质量检测电路从对应于扇区地址标记的数据流接收第一采样和第二采样，并且至少部分地基于第一采样和第二采样来确定扇区地址标记的质量。在各种情况下，可以使用扇区地址标记到扇区地址标记的所有样本的一个或多个样本。

5. 发明申请

US20090267819A1 Systems and Methods for Reducing the Effects of ADC Mismatch 有权
标题翻译：减少ADC失配影响的系统和方法
公开(公告)号：US20090267819A1
公开(公告)日：2009-10-29
申请号：US12111294
申请日：2008-04-29
申请人： Viswanath Annampedu , Venkatram Muddhasani
发明人： Viswanath Annampedu , Venkatram Muddhasani
IPC分类号： H03M1/12
CPC分类号： H03M1/0678 , G11B20/10009 , G11B20/10027 , G11B20/10037 , G11B20/10481 , G11B2220/2516 , H03M1/1205
摘要： Various embodiments of the present invention provide systems and methods for utilizing a plurality of potentially mismatched analog to digital converters. For example, a method for adaptively processing a variety of input signals is disclosed. The method includes providing an adaptive loop circuit, and a first and second circuit pairs. The first circuit pair includes a first analog to digital converter and first register, and the second circuit pair includes a second analog to digital converter and a second register. An input signal is received and an event status is received. The event status initially indicates that the input signal includes data associated with a first event and subsequently indicates that the input signal includes data associated with a second event. The first circuit pair to drive the adaptive loop circuit when the first event is indicated, and the second circuit pair to drive the adaptive circuit when the second event is indicated.
摘要翻译：本发明的各种实施例提供了用于利用多个潜在失配的模数转换器的系统和方法。例如，公开了一种用于自适应地处理各种输入信号的方法。该方法包括提供自适应环路电路以及第一和第二电路对。第一电路对包括第一模数转换器和第一寄存器，第二电路对包括第二模数转换器和第二寄存器。接收输入信号并接收事件状态。事件状态最初指示输入信号包括与第一事件相关联的数据，并且随后指示输入信号包括与第二事件相关联的数据。当指示第一事件时驱动自适应环路电路的第一电路对，以及当指示第二事件时驱动自适应电路的第二电路对。

6. 发明授权

US07768437B2 Systems and methods for reducing the effects of ADC mismatch 有权
标题翻译：减少ADC失配影响的系统和方法
公开(公告)号：US07768437B2
公开(公告)日：2010-08-03
申请号：US12111294
申请日：2008-04-29
申请人： Viswanath Annampedu , Venkatram Muddhasani
发明人： Viswanath Annampedu , Venkatram Muddhasani
IPC分类号： H03M1/36
CPC分类号： H03M1/0678 , G11B20/10009 , G11B20/10027 , G11B20/10037 , G11B20/10481 , G11B2220/2516 , H03M1/1205
摘要： Various embodiments of the present invention provide systems and methods for utilizing a plurality of potentially mismatched analog to digital converters. For example, a method for adaptively processing a variety of input signals is disclosed. The method includes providing an adaptive loop circuit, and a first and second circuit pairs. The first circuit pair includes a first analog to digital converter and first register, and the second circuit pair includes a second analog to digital converter and a second register. An input signal is received and an event status is received. The event status initially indicates that the input signal includes data associated with a first event and subsequently indicates that the input signal includes data associated with a second event. The first circuit pair to drive the adaptive loop circuit when the first event is indicated, and the second circuit pair to drive the adaptive circuit when the second event is indicated.
摘要翻译：本发明的各种实施例提供了用于利用多个潜在失配的模数转换器的系统和方法。例如，公开了一种用于自适应地处理各种输入信号的方法。该方法包括提供自适应环路电路以及第一和第二电路对。第一电路对包括第一模数转换器和第一寄存器，第二电路对包括第二模数转换器和第二寄存器。接收输入信号并接收事件状态。事件状态最初指示输入信号包括与第一事件相关联的数据，并且随后指示输入信号包括与第二事件相关联的数据。当指示第一事件时驱动自适应环路电路的第一电路对，以及当指示第二事件时驱动自适应电路的第二电路对。

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