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1. 发明授权

US07357879B2 Etching solution, method of etching and printed wiring board 有权
标题翻译：蚀刻溶液，蚀刻方法和印刷线路板
公开(公告)号：US07357879B2
公开(公告)日：2008-04-15
申请号：US10560421
申请日：2005-03-01
申请人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
发明人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , C25F3/00
CPC分类号： C23F1/18 , C09K13/00 , C23F1/02 , C23F1/34 , H01L21/32134 , H05K3/064 , H05K3/067 , H05K3/383 , H05K2203/0597 , H05K2203/124
摘要： There is provided an etching solution comprised of a cupric chloride solution and a high-concentration triazole type compound added to the cupric chloride solution and capable of forming an etching-inhibiting coating. In a process of forming a circuit pattern by etching with the etching solution, an etching-inhibiting coating is selected formed on parts of a copper foil laid under the edge of an etching resist to effectively inhibit horizontal side-etching of the copper foil from the edge of the etching resist. Also, nonuniform irregularities formed on the side wall of the circuit pattern by the etching improves the adhesion between the circuit pattern and an insulating resin layer covering the circuit pattern.
摘要翻译：提供了由氯化铜溶液和加入到氯化铜溶液中的能够形成蚀刻抑制涂层的高浓度三唑型化合物组成的蚀刻溶液。在通过用蚀刻溶液蚀刻形成电路图案的过程中，在布置在抗蚀剂边缘的铜箔的部分上形成蚀刻抑制涂层，以有效地抑制铜箔的水平侧蚀边缘的抗蚀剂。此外，通过蚀刻形成在电路图案的侧壁上的不均匀的凹凸改善了电路图案和覆盖电路图案的绝缘树脂层之间的粘附。

2. 发明申请

US20060199394A1 Etching solution, method of etching and printed wiring board 有权
标题翻译：蚀刻溶液，蚀刻方法和印刷线路板
公开(公告)号：US20060199394A1
公开(公告)日：2006-09-07
申请号：US10560421
申请日：2005-03-01
申请人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
发明人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
IPC分类号： C23F1/00 , C09K13/00 , H01L21/302
CPC分类号： C23F1/18 , C09K13/00 , C23F1/02 , C23F1/34 , H01L21/32134 , H05K3/064 , H05K3/067 , H05K3/383 , H05K2203/0597 , H05K2203/124
摘要： There is provided an etching solution comprised of a cupric chloride solution and a high-concentration triazole type compound added to the cupric chloride solution and capable of forming an etching-inhibiting coating. In a process of forming a circuit pattern by etching with the etching solution, an etching-inhibiting coating is selected formed on parts of a copper foil laid under the edge of an etching resist to effectively inhibit horizontal side-etching of the copper foil from the edge of the etching resist. Also, nonuniform irregularities formed on the side wall of the circuit pattern by the etching improves the adhesion between the circuit pattern and an insulating resin layer covering the circuit pattern.
摘要翻译：提供了由氯化铜溶液和加入到氯化铜溶液中的能够形成蚀刻抑制涂层的高浓度三唑型化合物组成的蚀刻溶液。在通过用蚀刻溶液蚀刻形成电路图案的过程中，在布置在抗蚀剂边缘的铜箔的部分上形成蚀刻抑制涂层，以有效地抑制铜箔的水平侧蚀边缘的抗蚀剂。此外，通过蚀刻形成在电路图案的侧壁上的不均匀的凹凸改善了电路图案和覆盖电路图案的绝缘树脂层之间的粘附。

3. 发明授权

US08448838B2 Solder ball loading mask, apparatus and associated methodology 有权
标题翻译：焊球加载掩模，仪器和相关方法
公开(公告)号：US08448838B2
公开(公告)日：2013-05-28
申请号：US13315972
申请日：2011-12-09
申请人： Shigeki Sawa , Katsuhiko Tanno , Osamu Kimura , Koji Kuribayashi
发明人： Shigeki Sawa , Katsuhiko Tanno , Osamu Kimura , Koji Kuribayashi
IPC分类号： B23K1/00 , B23K1/20
CPC分类号： H05K3/3478 , B23K3/0623 , B23K3/0692 , B23K2101/36 , H05K3/3489 , H05K2203/041 , H05K2203/0485 , H05K2203/0557
摘要： A solder ball loading method capable of securely loading solder balls on connection pads includes applying flux on each connection pad group of a printed wiring board flux is not applied to a contact portion between a spacer and the printed wiring board to keep the flux from attaching to the spacer. Because the flux is not attached to the spacer, when the mask is detached from the printed wiring board, the printed wiring board need not be inverted, and damage to the solder resist layer 70 is minimized. Further, the heights of the solder balls and the upper surface of the mask are made equal by using the spacer, making it possible to securely load the solder balls on the electrode pads, one solder ball for each connection pad, and to reduce a probability that solder balls are not loaded or that a plurality of the solder balls are loaded onto a single connection pad.
摘要翻译：能够将焊球牢固地装载在连接焊盘上的焊球加载方法包括在印刷电路板的每个连接焊盘组上施加焊剂，焊剂不会施加到间隔件和印刷电路板之间的接触部分，以保持焊剂附着到间隔物。由于焊剂没有附着到间隔物上，当掩模与印刷电路板分离时，印刷电路板不需要颠倒，并且使阻焊层70的损坏最小化。此外，通过使用间隔件使焊球的高度和掩模的上表面相等，使得可以将焊球牢固地加载在电极焊盘上，每个连接焊盘用一个焊球，并且降低概率该焊球没有被加载，或者多个焊球被加载到单个连接焊盘上。

4. 发明申请

US20120073977A1 PLATING APPARATUS AND PLATING METHOD 有权
标题翻译：电镀设备和电镀方法
公开(公告)号：US20120073977A1
公开(公告)日：2012-03-29
申请号：US13307906
申请日：2011-11-30
申请人： Yasuaki TACHI , Shigeki Sawa , Toshiyuki Kasuga
发明人： Yasuaki TACHI , Shigeki Sawa , Toshiyuki Kasuga
IPC分类号： C25D7/06
CPC分类号： H05K3/241 , C25D7/0614 , C25D17/02 , C25D17/12 , H05K1/0393 , H05K3/423 , H05K2201/0394 , H05K2201/09563 , H05K2203/0143 , H05K2203/1545
摘要： A method for plating a belt substrate including conveying a belt substrate through a plating tank, contacting an immersed cathode power-supply device and/or an auxiliary cathode power-supply device with the belt substrate conveyed into the interior of the plating tank such that the belt substrate becomes a cathode, and electrically plating a surface of the belt substrate in the interior of the plating tank while the immersed cathode power-supply device and/or the auxiliary cathode power-supply device maintains cathode power-supply to the belt substrate conveyed into the interior portion of the plating tank. The immersed cathode power-supply device and the auxiliary cathode power-supply device are positioned in the interior portion of the plating tank and are electrically connected by a short circuit wiring.
摘要翻译：一种电镀皮带基板的方法，包括：通过电镀槽输送带基板，使浸入的阴极电源装置和/或辅助阴极电源装置与输送到镀槽内部的带基板接触，带状基板成为阴极，并且在浸没的阴极电源装置和/或辅助阴极电源装置将输送的带状基板的阴极电源保持在电镀槽的内部时，对带状基板的表面进行电镀进入镀槽的内部。浸没的阴极供电装置和辅助阴极供电装置位于电镀槽的内部，并通过短路布线电连接。

5. 发明申请

US20100155129A1 PRINTED WIRING BOARD 有权
标题翻译：印刷线路板
公开(公告)号：US20100155129A1
公开(公告)日：2010-06-24
申请号：US12713274
申请日：2010-02-26
申请人： Yoichiro KAWAMURA , Shigeki Sawa , Katsuhiko Tanno , Hironori Tanaka , Naoaki Fujii
发明人： Yoichiro KAWAMURA , Shigeki Sawa , Katsuhiko Tanno , Hironori Tanaka , Naoaki Fujii
IPC分类号： H05K1/11 , H05K3/00
CPC分类号： H05K3/3478 , H01L21/4853 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L24/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/11334 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/81192 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01061 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H05K3/3452 , H05K2201/0191 , H05K2201/099 , H05K2203/041 , H05K2203/0557 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165 , H01L2924/00 , H01L2224/05599
摘要： A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening about 0.55 to about 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of about 200 μm or less.
摘要翻译：一种印刷电路板，包括设置有至少一个导体电路的布线基板，形成在所述布线基板的表面上的阻焊层，覆盖所述至少一个导体电路，形成在所述至少一个导体电路的一部分上的导体焊盘从设置在用于安装电子部件的阻焊层中的各个开口露出，以及形成在各个导体焊盘上的焊料凸块。通过使窄阻抗层的高度H与焊锡凸块的比例（H / D）在开口直径大约0.55至1.0左右，在窄间距结构下，在距离设置在阻焊层上的开口约为200μm以下。

6. 发明授权

US07714233B2 Printed wiring board 有权
标题翻译：印刷电路板
公开(公告)号：US07714233B2
公开(公告)日：2010-05-11
申请号：US11476557
申请日：2006-06-29
申请人： Yoichiro Kawamura , Shigeki Sawa , Katsuhiko Tanno , Hironori Tanaka , Naoaki Fujii
发明人： Yoichiro Kawamura , Shigeki Sawa , Katsuhiko Tanno , Hironori Tanaka , Naoaki Fujii
IPC分类号： H05K1/16
CPC分类号： H05K3/3478 , H01L21/4853 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L24/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/11334 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/81192 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01061 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H05K3/3452 , H05K2201/0191 , H05K2201/099 , H05K2203/041 , H05K2203/0557 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165 , H01L2924/00 , H01L2224/05599
摘要： A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. The ratio (H/D) of a height H of the solder bumps from solder resist layer surface to an opening diameter of the openings are made to be about 0.55 to about 1.0 with the pitch of the openings provided in the solder resist layer of about 200 μm or less.
摘要翻译：一种印刷电路板，包括设置有至少一个导体电路的布线基板，形成在所述布线基板的表面上的阻焊层，覆盖所述至少一个导体电路，形成在所述至少一个导体电路的一部分上的导体焊盘从设置在用于安装电子部件的阻焊层中的各个开口露出，以及形成在各个导体焊盘上的焊料凸块。由阻焊层表面的焊锡凸块的高度H与开口的开口直径之比H（H / D）为约0.55〜约1.0，在阻焊层上设置的开口的间距约为 200μm以下。

7. 发明授权

US5424814A Developing device with microfields formed on developer carrier 失效
标题翻译：在显影剂载体上形成微场的显影装置
公开(公告)号：US5424814A
公开(公告)日：1995-06-13
申请号：US998667
申请日：1992-12-30
申请人： Koji Suzuki , Katsuhiro Aoki , Yuichi Ueno , Akira Sawada , Naoki Iwata , Takatsugu Fujishiro , Shigeki Sawa
发明人： Koji Suzuki , Katsuhiro Aoki , Yuichi Ueno , Akira Sawada , Naoki Iwata , Takatsugu Fujishiro , Shigeki Sawa
IPC分类号： G03G15/08 , G03G13/08
CPC分类号： G03G15/0806 , G03G2215/0861
摘要： A developing device for an image forming apparatus and using a one component type developer. The developer is transferred from a developer supply member to a developer carrier which are so rotated as to move in the same direction at a position where they contact each other. This prevents the developer from a toner storing section from directly reaching part of the developer carrier having moved away from the contact position despite the movement of the developer supply member. Conductive portions connected to ground and dielectric portions each having a small area are distributed regularly or irregularly on the surface of the developer carrier. Such a surface of the developer carrier is charged by friction by the developer supply member with the result that a great number of microfields are formed in the vicinity of the developer carrier. The microfields allow only the developer sufficiently charged by friction at the contact position to form multiple layers on the surface of the developer carrier. Consequently, the toner with a desired amount of charge and containing a minimum of uncharged toner can form multiple layers on the developer carrier and is transferred to an image carrier.
摘要翻译：一种用于图像形成装置和使用单组分型显影剂的显影装置。显影剂从显影剂供应构件转移到显影剂载体，显影剂载体如此旋转以在它们彼此接触的位置沿相同方向移动。这防止显影剂供应构件的移动而使调色剂存储部分的显影剂直接到达显影剂载体的已远离接触位置的部分。连接到接地的导电部分和各自具有小面积的电介质部分规则地或不规则地分布在显影剂载体的表面上。显影剂载体的这种表面由显影剂供应构件的摩擦带电，结果是在显影剂载体附近形成大量的微场。微场仅允许在接触位置处通过摩擦力充分充电的显影剂在显影剂载体的表面上形成多个层。因此，具有期望量的电荷并且含有最少不带电调色剂的调色剂可以在显影剂载体上形成多个层并被转印到图像载体上。

8. 发明授权

US08721863B2 Plating apparatus and plating method 有权
标题翻译：电镀装置及电镀方法
公开(公告)号：US08721863B2
公开(公告)日：2014-05-13
申请号：US13307906
申请日：2011-11-30
申请人： Yasuaki Tachi , Shigeki Sawa , Toshiyuki Kasuga
发明人： Yasuaki Tachi , Shigeki Sawa , Toshiyuki Kasuga
IPC分类号： C25D5/00 , C25D7/06 , C25D17/00
CPC分类号： H05K3/241 , C25D7/0614 , C25D17/02 , C25D17/12 , H05K1/0393 , H05K3/423 , H05K2201/0394 , H05K2201/09563 , H05K2203/0143 , H05K2203/1545
摘要： A method for plating a belt substrate including conveying a belt substrate through a plating tank, contacting an immersed cathode power-supply device and/or an auxiliary cathode power-supply device with the belt substrate conveyed into the interior of the plating tank such that the belt substrate becomes a cathode, and electrically plating a surface of the belt substrate in the interior of the plating tank while the immersed cathode power-supply device and/or the auxiliary cathode power-supply device maintains cathode power-supply to the belt substrate conveyed into the interior portion of the plating tank. The immersed cathode power-supply device and the auxiliary cathode power-supply device are positioned in the interior portion of the plating tank and are electrically connected by a short circuit wiring.
摘要翻译：一种电镀皮带基板的方法，包括：通过电镀槽输送带基板，使浸入的阴极电源装置和/或辅助阴极电源装置与输送到镀槽内部的带基板接触，带状基板成为阴极，并且在浸没的阴极电源装置和/或辅助阴极电源装置将输送的带状基板的阴极电源保持在电镀槽的内部时，对带状基板的表面进行电镀进入镀槽的内部。浸没的阴极供电装置和辅助阴极供电装置位于电镀槽的内部，并通过短路布线电连接。

9. 发明申请

US20120080504A1 Solder Ball Loading Mask, Apparatus And Associated Methodology 审中-公开
标题翻译：焊球加载面膜，仪器及相关方法
公开(公告)号：US20120080504A1
公开(公告)日：2012-04-05
申请号：US13315843
申请日：2011-12-09
申请人： Shigeki Sawa , Katsuhiko Tanno , Osamu Kimura , Koji Kuribayashi
发明人： Shigeki Sawa , Katsuhiko Tanno , Osamu Kimura , Koji Kuribayashi
IPC分类号： B23K3/00
CPC分类号： H05K3/3478 , B23K3/0623 , B23K3/0692 , B23K2101/36 , H05K3/3489 , H05K2203/041 , H05K2203/0485 , H05K2203/0557
摘要： A solder ball loading method capable of securely loading solder balls on connection pads includes applying flux on each connection pad group of a printed wiring board flux is not applied to a contact portion between a spacer and the printed wiring board to keep the flux from attaching to the spacer. Because the flux is not attached to the spacer, when the mask is detached from the printed wiring board, the printed wiring board need not be inverted, and damage to the solder resist layer 70 is minimized. Further, the heights of the solder balls and the upper surface of the mask are made equal by using the spacer, making it possible to securely load the solder balls on the electrode pads, one solder ball for each connection pad, and to reduce a probability that solder balls are not loaded or that a plurality of the solder balls are loaded onto a single connection pad.
摘要翻译：能够将焊球牢固地装载在连接焊盘上的焊球加载方法包括在印刷电路板的每个连接焊盘组上施加焊剂，焊剂不会施加到间隔件和印刷电路板之间的接触部分，以保持焊剂附着到间隔物。由于焊剂没有附着到间隔物上，当掩模与印刷电路板分离时，印刷电路板不需要颠倒，并且使阻焊层70的损坏最小化。此外，通过使用间隔件使焊球的高度和掩模的上表面相等，使得可以将焊球牢固地加载在电极焊盘上，每个连接焊盘用一个焊球，并且降低概率该焊球没有被加载，或者多个焊球被加载到单个连接焊盘上。

10. 发明授权

US08003897B2 Printed wiring board 有权
标题翻译：印刷电路板
公开(公告)号：US08003897B2
公开(公告)日：2011-08-23
申请号：US12713274
申请日：2010-02-26
申请人： Yoichiro Kawamura , Shigeki Sawa , Katsuhiko Tanno , Hironori Tanaka , Naoaki Fujii
发明人： Yoichiro Kawamura , Shigeki Sawa , Katsuhiko Tanno , Hironori Tanaka , Naoaki Fujii
IPC分类号： H05K1/11
CPC分类号： H05K3/3478 , H01L21/4853 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L24/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/11334 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/81192 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01061 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H05K3/3452 , H05K2201/0191 , H05K2201/099 , H05K2203/041 , H05K2203/0557 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165 , H01L2924/00 , H01L2224/05599
摘要： A printed wiring board includes a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening about 0.55 to about 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of about 200 μm or less.
摘要翻译：一种印刷电路板，包括设置有至少一个导体电路的布线基板，形成在所述布线基板的表面上的阻焊层，覆盖所述至少一个导体电路，形成在所述至少一个导体电路的一部分上的导体焊盘从设置在用于安装电子部件的阻焊层中的各个开口露出，以及形成在各个导体焊盘上的焊料凸块。通过使窄阻抗层的高度H与焊锡凸块的比例（H / D）在开口直径大约0.55至1.0左右，在窄间距结构下，在距离设置在阻焊层上的开口约为200μm以下。

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