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1. 发明授权

US07329458B2 Wiring member and method of manufacturing the same 失效
标题翻译：接线构件及其制造方法
公开(公告)号：US07329458B2
公开(公告)日：2008-02-12
申请号：US10694776
申请日：2003-10-29
申请人： Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake , Misa Sawanobori , Kou Yamada
发明人： Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake , Misa Sawanobori , Kou Yamada
IPC分类号： B32B9/00 , H05K1/00 , B05D5/12
CPC分类号： H01L23/49894 , H01L23/145 , H01L2924/0002 , H01L2924/3011 , H05K1/0306 , H05K1/0313 , H05K3/102 , H05K3/12 , H05K3/38 , H05K2201/0116 , H05K2201/0257 , H05K2201/2072 , Y10T428/24917 , Y10T428/249953 , Y10T428/249956 , Y10T428/249957 , Y10T428/249958 , Y10T428/249987 , Y10T428/249999 , H01L2924/00
摘要： Disclosed is a wiring member comprising a sheet-like porous substrate provided with a large number of open-cells which are three-dimensionally branched and opened to a first major surface as well as to a second major surface of the porous substrate, and a conductive portion formed on the first major surface of the porous substrate and formed at least partially an inter-penetrating structure together with the porous substrate at an interface of the porous substrate. The apertures of the open-cells on the first major surface have an average diameter and an average number of the apertures, at least one of which is smaller than that of the second major surface.
摘要翻译：公开了一种布线构件，其包括设置有多个开孔的片状多孔基材，其三维分支并且开口于多孔基材的第一主表面和第二主表面，并且导电形成在所述多孔基材的所述第一主表面上并在所述多孔基材的界面处与所述多孔基材一起至少部分地形成相互穿透结构的部分。第一主表面上的开孔的孔径具有平均直径和平均孔数，其中至少一个小于第二主表面的孔径。

2. 发明授权

US07370412B2 Method for connecting electronic device 失效
标题翻译：电子设备连接方法
公开(公告)号：US07370412B2
公开(公告)日：2008-05-13
申请号：US10611895
申请日：2003-07-03
申请人： Toshiro Hiraoka , Mitsuyoshi Endo , Naoko Yamaguchi , Yasuyuki Hotta , Shigeru Matake , Hideo Aoki , Misa Sawanobori
发明人： Toshiro Hiraoka , Mitsuyoshi Endo , Naoko Yamaguchi , Yasuyuki Hotta , Shigeru Matake , Hideo Aoki , Misa Sawanobori
IPC分类号： H01K3/10
CPC分类号： H01L24/24 , H01L21/568 , H01L21/6835 , H01L23/5389 , H01L24/82 , H01L24/96 , H01L2221/68359 , H01L2221/68363 , H01L2224/0231 , H01L2224/0401 , H01L2224/12105 , H01L2224/2413 , H01L2224/24137 , H01L2224/24195 , H01L2224/76155 , H01L2224/7665 , H01L2224/82039 , H01L2224/82102 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/19105 , H01L2924/3025 , H01L2924/351 , H05K1/185 , H05K3/185 , H05K3/422 , H05K2201/0116 , Y10T29/4913 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T29/4921 , H01L2924/00
摘要： An electronic device connecting method according to a first aspect of the present invention includes: mounting an electronic device having at least one electrode portion on a sheet-like porous member having a hole therein so that the electrode portion is close to the porous member; selectively irradiating a predetermined region of the porous member, on which the electronic device is mounted, with energy lines to form a latent image in an irradiated or non-irradiated portion of the porous member, the predetermined region including a portion close to the electrode portion; after irradiating with the energy lines, filling a conductive material in a hole of the latent image of the porous member to form a conductive portion; and bonding and integrating the porous member, in which the conductive portion is formed, to and with the electronic device.
摘要翻译：根据本发明的第一方面的电子设备连接方法包括：将具有至少一个电极部分的电子设备安装在其中具有孔的片状多孔构件上，使得电极部分靠近多孔构件; 用能量线选择性地照射安装有电子装置的多孔构件的预定区域，以在多孔构件的照射或未照射部分中形成潜像，该预定区域包括靠近电极部分的部分 ; 在照射能量线之后，在多孔构件的潜像的孔中填充导电材料以形成导电部分; 并且将形成有导电部分的多孔构件与电子装置接合并整合。

3. 发明授权

US07312621B2 Semiconductor test unit having low contact resistance with examined electronic products, semiconductor contact board, method for testing semiconductor device, semiconductor device, and method for manufacturing thereof 失效
标题翻译：具有检查电子产品的低接触电阻的半导体测试单元，半导体接触板，半导体器件测试方法，半导体器件及其制造方法
公开(公告)号：US07312621B2
公开(公告)日：2007-12-25
申请号：US10401871
申请日：2003-03-31
申请人： Naoko Yamaguchi , Yoshiaki Sugizaki , Hideo Aoki , Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake , Misa Sawanobori
发明人： Naoko Yamaguchi , Yoshiaki Sugizaki , Hideo Aoki , Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake , Misa Sawanobori
IPC分类号： G01R31/02
CPC分类号： G01R31/2886 , G01R31/2863
摘要： A semiconductor test unit comprises a test circuit for inputting/outputting a test signal to/from an examined electronic product, a test signal wiring electrically connected to the test circuit, a contact board electrically connected to an electrode of the examined electronic product and provided with an electrically conductive via to which the test signal is transmitted, a multilayer circuit board electrically connected to the conductive via and the test signal wiring, located under the bottom face of the contact board, and provided with at least one through-hole, and a vacuum attachment mechanism for attaching thereto and holding the examined electronic product, the contact board, and the multilayer circuit board by vacuum. The contact board is made of an insulative material, has top and bottom faces, and is provided with at least one through-hole.
摘要翻译：半导体测试单元包括用于向被检查的电子产品输入/输出测试信号的测试电路，电连接到测试电路的测试信号布线，与所检查的电子产品的电极电连接并提供测试信号传输到的导电通孔，与导电通孔电连接的多层电路板和位于接触板底面下方的测试信号布线，并具有至少一个通孔，以及用于附接到其上的真空附着机构，并通过真空保持所检查的电子产品，接触板和多层电路板。接触板由绝缘材料制成，具有顶面和底面，并且设置有至少一个通孔。

4. 发明申请

US20050024067A1 Contact sheet for testing electronic parts, apparatus for testing electronic parts, method for testing electronic parts, method for manufacturing electronic parts and electronic parts 失效
标题翻译：电子部件检测用接触片，电子部件检测装置，电子部件检测方法，电子部件及电子部件的制造方法
公开(公告)号：US20050024067A1
公开(公告)日：2005-02-03
申请号：US10885777
申请日：2004-07-08
申请人： Naoko Yamaguchi , Hideo Aoki , Chiaki Takubo , Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake
发明人： Naoko Yamaguchi , Hideo Aoki , Chiaki Takubo , Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake
IPC分类号： G01R1/073 , G01R31/26
CPC分类号： G01R1/0735
摘要： According to one aspect of the invention, a contact sheet for testing electronic parts, comprising an insulating porous layer; and a connection electrode which is disposed on the insulating porous layer and electrically connect the electrode or terminal of the electronic parts and the terminal of a test apparatus; wherein the connection electrode is embedded below at least one main surface of the insulating porous layer.
摘要翻译：根据本发明的一个方面，一种用于测试电子部件的接触片，包括绝缘多孔层; 以及连接电极，其设置在绝缘多孔层上并将电子部件的电极或端子与测试装置的端子电连接; 其中所述连接电极嵌入所述绝缘多孔层的至少一个主表面的下方。

5. 发明授权

US06835889B2 Passive element component and substrate with built-in passive element 失效
标题翻译：无源元件元件和衬底内置无源元件
公开(公告)号：US06835889B2
公开(公告)日：2004-12-28
申请号：US10251825
申请日：2002-09-23
申请人： Toshiro Hiraoka , Yasuyuki Hotta , Koji Asakawa , Shigeru Matake
发明人： Toshiro Hiraoka , Yasuyuki Hotta , Koji Asakawa , Shigeru Matake
IPC分类号： H01L2329
CPC分类号： H05K3/423 , H01C7/00 , H01F17/0006 , H01F41/041 , H01F2017/006 , H05K1/16 , H05K1/162 , H05K1/165 , H05K1/167 , H05K2201/0116 , H05K2201/0355 , H05K2201/0394 , H05K2203/1545
摘要： The present invention provides a composite material such as a passive element, a passive element composite component, a substrate with a built-in passive element and a composite wiring substrate which are free from, for example, a layer peeling problem and enables high density packaging with ease. In the present invention, a porous base material is divided into plural functional regions and a material having different electromagnetic characteristics is filled in a pore of the porous base material of each functional region, to form a passive element or a wiring substrate. Among the aforementioned plural functional regions, at least one functional region is a conductive material region filled with a conductive material and other regions are filled with a high-dielectric material, a high-permeability material or a low-dielectric material. This structure ensures that a single passive element, plural passive elements or a wiring substrate provided with a circuit wiring can be formed on a porous base material efficiently.
摘要翻译：本发明提供了诸如无源元件，无源元件复合元件，具有内置无源元件的基板和复合布线基板的复合材料，其不含例如层剥离问题并且能够实现高密度封装轻松。在本发明中，将多孔基材分成多个功能区域，并且将具有不同电磁特性的材料填充在各功能区域的多孔基材的孔中，形成无源元件或布线基板。在上述多个功能区域中，至少一个功能区域是填充有导电材料的导电材料区域，并且其它区域填充有高介电材料，高磁导率材料或低电介质材料。这种结构确保了能够有效地在多孔基材上形成单个无源元件，多个无源元件或设置有电路布线的布线基板。

6. 发明授权

US06906423B1 Mask used for exposing a porous substrate 失效
标题翻译：用于暴露多孔基材的掩模
公开(公告)号：US06906423B1
公开(公告)日：2005-06-14
申请号：US10670520
申请日：2003-09-26
申请人： Koji Asakawa , Yasuyuki Hotta , Shigeru Matake , Toshiro Hiraoka
发明人： Koji Asakawa , Yasuyuki Hotta , Shigeru Matake , Toshiro Hiraoka
IPC分类号： H05K1/03 , H05K3/00 , H05K3/10 , H05K3/18 , H05K3/42 , G03F1/16
CPC分类号： G03F1/16 , G03F1/50 , H05K1/034 , H05K3/0002 , H05K3/0082 , H05K3/107 , H05K3/185 , H05K3/422 , H05K2201/0116 , H05K2201/015 , H05K2203/056 , H05K2203/107 , H05K2203/1147 , Y10T428/12042
摘要： A mask used for exposing a porous substrate to form a first region and a second region, the first region being filled with a conductive material piercing through the entire thickness of the porous substrate to constitute an interfacial conductive portion, the second region being filled with a conductive material not piercing the entire thickness of the porous substrate to constitute a non-interfacial conductive portion. The mask includes a first light-transmitting region for exposing the first region, and a second light-transmitting region for exposing the second region, said second light-transmitting region including an aggregation of fine patterns of which an average aperture ratio is not more than 50% of an average aperture ratio of the first light-transmitting region and a size of said fine patterns of the second light-transmitting region being in the range of 0.1 μm to 10 μm.
摘要翻译：一种用于暴露多孔基底以形成第一区域和第二区域的掩模，所述第一区域填充有穿透所述多孔基材的整个厚度的导电材料以构成界面导电部分，所述第二区域填充有导电材料不刺穿多孔基材的整个厚度以构成非界面导电部分。掩模包括用于暴露第一区域的第一透光区域和用于曝光第二区域的第二透光区域，所述第二透光区域包括平均孔径比不大于的细微图案的聚集第一透光区域的平均开口率的50％和第二透光区域的所述精细图案的尺寸在0.1μm至10μm的范围内。

7. 发明授权

US06899999B2 Method of manufacturing composite member, photosensitive composition, porous base material, insulating body and composite member 失效
标题翻译：制造复合构件，感光组合物，多孔基材，绝缘体和复合构件的方法
公开(公告)号：US06899999B2
公开(公告)日：2005-05-31
申请号：US10091481
申请日：2002-03-07
申请人： Toshiro Hiraoka , Koji Asakawa , Yasuyuki Hotta , Shigeru Matake
发明人： Toshiro Hiraoka , Koji Asakawa , Yasuyuki Hotta , Shigeru Matake
IPC分类号： G03F7/027 , G03F7/075 , G03F7/38 , H05K3/18 , G03F7/00 , G03F7/04
CPC分类号： H05K3/185 , G03F7/027 , G03F7/0755 , G03F7/38
摘要： Disclosed is a method of manufacturing a composite member having a conductive pattern, comprising (1) forming on a surface of an insulating body a photosensitive layer containing both a photosensitive compound forming an ion-exchange group upon irradiation with an energy beam and a crosslinkable compound having a crosslinkable group, (2) forming a pattern of ion-exchange groups by selectively exposing the photosensitive layer to an energy beam so as to form an ion-exchange group in the exposed portion, (3) crosslinking the crosslinkable compound contained in at least the exposed portion of the photosensitive layer, (4) allowing metal ions, or a metal colloid to be adsorbed on the pattern of ion-exchange groups formed by the selectively exposing, and (5) forming a composite member having conductive pattern by depositing a conductive material on the pattern of ion-exchange groups having the metal ions, or the metal colloid adsorbed thereon using an electroless plating.
摘要翻译：公开了一种制造具有导电图案的复合构件的方法，包括（1）在绝缘体的表面上形成含有能量束和形成离子交换基团的感光性化合物的光敏层和可交联化合物具有可交联基团，（2）通过选择性地将感光层暴露于能量束以形成离子交换基团的图案，以在暴露部分中形成离子交换基团，（3）将包含在其中的可交联化合物交联至少曝光部分感光层，（4）允许金属离子或金属胶体被吸附在通过选择性曝光形成的离子交换基团的图案上，和（5）通过沉积形成具有导电图案的复合构件在具有金属离子的离子交换基团的图案上的导电材料或使用无电解电镀吸附在其上的金属胶体。

8. 发明授权

US06649516B2 Method for manufacturing a composite member from a porous substrate by selectively infiltrating conductive material into the substrate to form via and wiring regions 有权
标题翻译：通过选择性地将导电材料渗透到基板中以形成通孔和布线区域，从多孔基板制造复合构件的方法
公开(公告)号：US06649516B2
公开(公告)日：2003-11-18
申请号：US10161707
申请日：2002-06-05
申请人： Koji Asakawa , Yasuyuki Hotta , Shigeru Matake , Toshiro Hiraoka
发明人： Koji Asakawa , Yasuyuki Hotta , Shigeru Matake , Toshiro Hiraoka
IPC分类号： H05K310
CPC分类号： H05K3/10 , H05K1/034 , H05K3/0002 , H05K3/0082 , H05K3/107 , H05K3/185 , H05K3/422 , H05K2201/0116 , H05K2201/015 , H05K2203/056 , H05K2203/107 , H05K2203/1147 , Y10T29/49155 , Y10T29/49215
摘要： Disclosed is a method for manufacturing a composite member comprising a porous substrate, a via, and a wiring. The method comprises exposing a first region and a second region in the porous substrate to a exposure beam through a mask, the second region exposed by the exposure beam not more than 50% of the exposure of the first region, the exposure beam having the wavelength that an average size of voids of the porous substrate is, as expressed by a radius of gyration, {fraction (1/20)} to 10 times, and forming the via and the wiring by infiltrating a conductive material into the first region and the second region respectively.
摘要翻译：公开了一种用于制造包括多孔基底，通孔和布线的复合构件的方法。该方法包括将多孔基底中的第一区域和第二区域暴露于通过掩模的曝光光束，由曝光光束曝光的第二区域不大于第一区域的曝光的50％，曝光光束具有波长多孔基材的空隙的平均尺寸是以回转半径表示的{分数（1/20至10倍，并且通过将导电材料渗透到第一区域和第二区域中形成通孔和布线分别。

9. 发明授权

US07414417B2 Contact sheet for testing electronic parts, apparatus for testing electronic parts, method for testing electronic parts, method for manufacturing electronic parts and electronic parts 失效
标题翻译：电子部件检测用接触片，电子部件检测装置，电子部件检测方法，电子部件及电子部件的制造方法
公开(公告)号：US07414417B2
公开(公告)日：2008-08-19
申请号：US10885777
申请日：2004-07-08
申请人： Naoko Yamaguchi , Hideo Aoki , Chiaki Takubo , Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake
发明人： Naoko Yamaguchi , Hideo Aoki , Chiaki Takubo , Toshiro Hiraoka , Yasuyuki Hotta , Shigeru Matake
IPC分类号： G01R31/02 , H01L21/66 , B23K31/02
CPC分类号： G01R1/0735
摘要： According to one aspect of the invention, a contact sheet for testing electronic parts, comprising an insulating porous layer; and a connection electrode which is disposed on the insulating porous layer and electrically connect the electrode or terminal of the electronic parts and the terminal of a test apparatus; wherein the connection electrode is embedded below at least one main surface of the insulating porous layer.
摘要翻译：根据本发明的一个方面，一种用于测试电子部件的接触片，包括绝缘多孔层; 以及连接电极，其设置在绝缘多孔层上并将电子部件的电极或端子与测试装置的端子电连接; 其中所述连接电极嵌入所述绝缘多孔层的至少一个主表面的下方。

10. 发明授权

US06709806B2 Method of forming composite member 有权
标题翻译：复合材料成型方法
公开(公告)号：US06709806B2
公开(公告)日：2004-03-23
申请号：US09808233
申请日：2001-03-15
申请人： Yasuyuki Hotta , Toshiro Hiraoka , Koji Asakawa , Shigeru Matake
发明人： Yasuyuki Hotta , Toshiro Hiraoka , Koji Asakawa , Shigeru Matake
IPC分类号： G03F700
CPC分类号： C23C18/1612 , C23C18/1608 , G03F7/0045 , G03F7/023 , G03F7/38 , H05K3/185
摘要： Disclosed is a method of manufacturing a composite member in which a conductive portion is selectively formed in an insulator. The method comprises the steps of forming a photosensitive composition layer containing a compound forming an ion-exchange group upon irradiation with light having a wavelength not shorter than 280 nm within or on the surface of an insulator, exposing selectively the photosensitive composition layer to light having a wavelength not shorter than 280 nm, forming an ion-exchange group in the exposed portion, and bonding a metal or metal ions to the ion-exchange group formed in the exposed portion of the photosensitive composition layer.
摘要翻译：公开了一种制造其中在绝缘体中选择性地形成导电部分的复合构件的方法。该方法包括以下步骤：在绝缘体的表面内或表面上照射波长不小于280nm的光，形成含有形成离子交换基团的化合物的感光性组合物层，将该感光性组合物层选择性地曝光成具有不小于280nm的波长，在曝光部分中形成离子交换基团，并将金属或金属离子与形成在感光性组合物层的露出部分中的离子交换基团结合。

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