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1. 发明授权

US06646912B2 Non-volatile memory 失效
标题翻译：非易失性存储器
公开(公告)号：US06646912B2
公开(公告)日：2003-11-11
申请号：US09875356
申请日：2001-06-05
申请人： Terril N. Hurst , Craig Perlov , Carol Wilson , Carl Taussig
发明人： Terril N. Hurst , Craig Perlov , Carol Wilson , Carl Taussig
IPC分类号： G11C1136
CPC分类号： G11C17/16 , G11C8/10
摘要： A data storage device is disclosed that comprises a cross-point memory array formed on a dielectric substrate material. The cross-point memory array comprises first and second sets of transverse electrodes separated by a storage layer including at least one semiconductor layer. The storage layer forms a non-volatile memory element at each crossing point of electrodes from the first and second sets. Each memory element can be switched between low and high impedance states, representing respective binary data states, by application of a write signal in the form of a predetermined current density through the memory element. Each memory element includes a diode junction formed in the storage layer, at least whilst in the low impedance state. A plurality of the data storage devices can be stacked and laminated into a memory module providing inexpensive high capacity data storage. Such a memory module can be employed in an archival data storage system in which the memory module provides a write-once data storage unit receivable in an appliance or interface card.
摘要翻译：公开了一种数据存储装置，其包括形成在电介质基板材料上的交叉点存储器阵列。交叉点存储器阵列包括由包括至少一个半导体层的存储层分开的第一组和第二组横向电极。存储层在与第一和第二组的电极的每个交叉点处形成非易失性存储元件。通过以预定电流密度的形式通过存储元件施加写入信号，每个存储元件可以在表示相应的二进制数据状态的低阻抗状态和高阻抗状态之间切换。每个存储元件至少在处于低阻抗状态时包括在存储层中形成的二极管结。可以将多个数据存储装置堆叠并层叠到提供便宜的高容量数据存储的存储器模块中。这样的存储器模块可以用于档案数据存储系统，其中存储器模块提供可接收在设备或接口卡中的一次写入数据存储单元。

2. 发明授权

US5909661A Method and apparatus for decomposing drive error signal noise sources 失效
标题翻译：用于分解驱动误差信号噪声源的方法和装置
公开(公告)号：US5909661A
公开(公告)日：1999-06-01
申请号：US866367
申请日：1997-05-30
申请人： Daniel Y. Abramovitch , Terril N. Hurst , Richard H. Henze
发明人： Daniel Y. Abramovitch , Terril N. Hurst , Richard H. Henze
IPC分类号： G01R29/26 , G01R31/28 , G11B5/55 , G11B5/596 , G11B7/09 , G11B21/08 , G11B21/10 , G06F15/00
CPC分类号： G11B5/59688 , G11B21/081 , G11B21/10 , G11B5/553 , G11B5/59605 , G11B7/09 , G01R31/2837
摘要： A process and apparatus is described to break down the Position Error Signal (PES) of a magnetic or optical disk or tape drive to its contributing components. (In the case of the optical disk drive, the method is actually two different PESs, Focus Error Signal (FES) and Tracking Error Signal (TES).) This method is based on three concepts: an understanding of how Bode's Integral Theorem ties into noise measurements, a measurement methodology that allows for the isolation of individual noise sources, and a system model that allows these sources to be recombined to form the drive's Position Error Signal. The method measures frequency response functions and output power spectra of each servo system element. Each input noise spectrum can then be inferred and applied to the closed loop model to determine its effect on the PES uncertainty. The method allows the user to identify and rank the most critical noise sources in the positioning mechanism of a drive. This allows for optimization of the drive positioning control loop(s) by suitable design choices. Such choices may include--but are not limited to--optimization of the position encoding on the data storage surface (such as groove dimensions in an optical drive), optimization of the position signal detection method (such as the demodulation method on a magnetic disk or tape drive), and optimization of the actuator design. Such optimization is far more difficult without this invention because it is very difficult to identify which improvements are most helpful.
摘要翻译：描述了将磁盘或光盘或磁带驱动器的位置误差信号（PES）分解成其贡献部件的过程和装置。（在光盘驱动器的情况下，该方法实际上是两个不同的PES，聚焦误差信号（FES）和跟踪误差信号（TES））。这种方法基于三个概念：了解波德的积分定理如何与噪声测量，允许隔离单个噪声源的测量方法，以及允许将这些源重新组合以形成驱动器的位置误差信号的系统模型。该方法测量每个伺服系统元件的频率响应函数和输出功率谱。然后可以推断每个输入噪声谱，并将其应用于闭环模型，以确定其对PES不确定度的影响。该方法允许用户在驱动器的定位机构中识别和排列最关键的噪声源。这允许通过适当的设计选择优化驱动器定位控制回路。这样的选择可以包括但不限于数据存储表面上的位置编码的优化（例如光驱中的凹槽尺寸），优化位置信号检测方法（诸如在磁盘上的解调方法或磁带驱动器），以及执行器设计的优化。没有本发明，这种优化更加困难，因为很难确定哪些改进是最有帮助的。

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