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    • 1. 发明授权
    • Booster circuit
    • 增压电路
    • US07215179B2
    • 2007-05-08
    • US10535102
    • 2003-09-26
    • Takanori YamazoeTakeo Kanai
    • Takanori YamazoeTakeo Kanai
    • G05F1/10
    • G11C5/146G11C5/145H02M3/073H02M2001/009H02M2003/071H02M2003/075H02M2003/076
    • The present invention relates to a booster circuit of a non-volatile memory requiring a plus or minus high voltage equal to or higher than a power-supply voltage. The present invention can generate a high voltage of approximately 12 V even at a low power-supply voltage equal to or lower than 3 V and generate not only a plus high voltage but also a minus high voltage by the same circuit. Also, by combining a body-controlled type parallel charge pump, which is a booster circuit according to the present invention, with a serial-type charge pump, two types of high voltages can be efficiently generated and a reduction in chip areas can be achieved.
    • 本发明涉及一种非易失性存储器的升压电路,其需要等于或高于电源电压的正或负高电压。 本发明即使在等于或低于3V的低电源电压下也可产生大约12V的高电压,并且不仅通过相同电路产生正高电压而且产生负高电压。 此外,通过将根据本发明的升压电路的身体控制型并联电荷泵与串联型电荷泵组合,可以有效地产生两种类型的高电压,并且可以实现芯片面积的减少 。
    • 2. 发明授权
    • Gate circuit
    • 门电路
    • US06271708B1
    • 2001-08-07
    • US09368162
    • 1999-08-05
    • Kimihiro HoshiTakeo Kanai
    • Kimihiro HoshiTakeo Kanai
    • H03K1704
    • H03K17/164H03K17/168H03K17/567
    • In a gate circuit having a turn-off gate circuit composed of: OFF gate power source Eoff of which one terminal is connected to the emitter of semiconductor switching element 81, and switch SWoff that connects the other terminal of OFF gate power source Eoff and the gate of semiconductor switching element S1 via resistor Rg, the gate circuit is provided with second switch SWoff2 that connects the other terminal of OFF gate power source Eoff and the gate of semiconductor switching element S1. By closing second switch SWoff2 at the timing at which the turn-off operation is completed, it will connect to OFF gate power source Eoff without passing through a resistor.
    • 在具有截止门电路的门电路中,包括:一个端子连接到半导体开关元件81的发射极的OFF栅极电源Eoff和将OFF栅极电源Eoff的另一个端子和 通过电阻器Rg的半导体开关元件S1的栅极,栅极电路设置有连接关闭栅极电源Eoff的另一端子和半导体开关元件S1的栅极的第二开关SWoff2。 通过在关断操作完成的定时关闭第二开关SWoff2,它将连接到OFF栅极电源Eoff而不通过电阻器。
    • 4. 发明授权
    • Semiconductor processing device and IC card
    • 半导体处理装置和IC卡
    • US08050085B2
    • 2011-11-01
    • US10521553
    • 2002-08-29
    • Masatoshi TakahashiTakanori YamazoeKozo KatayamaToshihiro TanakaYutaka ShinagawaHiroshi WataseTakeo KanaiNobutaka Nagasaki
    • Masatoshi TakahashiTakanori YamazoeKozo KatayamaToshihiro TanakaYutaka ShinagawaHiroshi WataseTakeo KanaiNobutaka Nagasaki
    • G11C7/10G11C11/40
    • G07F7/1008G06Q20/341G06Q20/40975G07F7/084G11C11/005G11C16/0425G11C16/0433G11C16/16
    • A semiconductor processing device according to the invention includes a first non-volatile memory (21) for erasing stored information on a first data length unit, a second non-volatile memory (22) for erasing stored information on a second data length unit, and a central processing unit (2), and capable of inputting/outputting encrypted data from/to an outside. The first non-volatile memory is used for storing an encryption key to be utilized for encrypting the data. The second non-volatile memory is used for storing a program to be processed by the central processing unit. The non-volatile memories to be utilized for storing the program and for storing the encryption key are separated from each other, and the data lengths of the erase units of information to be stored in the non-volatile memories are defined separately. Therefore, the stored information can efficiently be erased before the execution of a processing of writing the program, and the stored information can be erased corresponding to the data length of a necessary processing unit in the write of the encryption key to be utilized in the calculation processing of the CPU.
    • 根据本发明的半导体处理装置包括用于擦除第一数据长度单元上存储的信息的第一非易失性存储器(21),用于擦除第二数据长度单元上存储的信息的第二非易失性存储器(22),以及 中央处理单元(2),能够从/向外部输入/输出加密数据。 第一非易失性存储器用于存储要用于加密数据的加密密钥。 第二非易失性存储器用于存储要由中央处理单元处理的程序。 用于存储程序和用于存储加密密钥的非易失性存储器彼此分离,并且存储在非易失性存储器中的信息的擦除单元的数据长度被分开地定义。 因此,在执行写入程序的处理之前可以有效地擦除存储的信息,并且可以根据在计算中要使用的加密密钥的写入中的必要处理单元的数据长度来擦除存储的信息 处理CPU。
    • 8. 发明申请
    • Cellular television broadcast system
    • 蜂窝电视广播系统
    • US20070061844A1
    • 2007-03-15
    • US11442661
    • 2006-05-26
    • Shigeaki HakusuiTakeo Kanai
    • Shigeaki HakusuiTakeo Kanai
    • H04N7/16H04N7/20
    • H04N21/435H04N7/16H04N21/235H04N21/2362H04N21/41407H04N21/47202H04N21/6131H04N21/64322H04W4/029H04W4/06H04W36/0007H04W36/0009H04W36/06H04W72/005
    • Information services are provided via an over-the-air television broadcasting system that is segmented into a plurality of cells. Each cell includes one or more transmitting facilities for transmitting service information and mapping information. The mapping information includes adjacent cell information enabling mobile receiver units to transition between cells in order to continue receipt of service information without requiring communication from the receiver unit to the service provider. The transmitting facilities of adjacent cells may operate on the same television channel and/or on different television channels, typically chosen from a frequency set allocated to a given service provider. The service information may include different content in different cells, such as local content specific to each cell. The service information may be provided from one or more content servers in communication with the transmitting facilities.
    • 通过分割成多个小区的空中电视广播系统提供信息服务。 每个小区包括用于发送服务信息和映射信息的一个或多个发送设备。 映射信息包括使得移动接收机单元能够在小区之间转换的相邻小区信息,以便继续接收服务信息,而不需要从接收机单元到服务提供商的通信。 相邻小区的发射设备可以在通常从分配给给定服务提供商的频率集中选择的相同电视频道和/或不同的电视频道上操作。 服务信息可以包括不同小区中的不同内容,例如每个小区特有的本地内容。 可以从与发送设备通信的一个或多个内容服务器提供服务信息。