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    • 6. 发明授权
    • RRAM structure and process using composite spacer
    • RRAM结构和使用复合间隔的工艺
    • US08872149B1
    • 2014-10-28
    • US13954430
    • 2013-07-30
    • Taiwan Semiconductor Manufacturing Company, Ltd.
    • Ching-Pei HsiehFu-Ting SungChern-Yow HsuShih-Chang LiuChia-Shiung Tsai
    • H01L29/06H01L21/00
    • H01L45/146H01L45/04H01L45/12H01L45/1233H01L45/1675
    • A memory cell and method includes a first electrode formed in an opening in a first dielectric layer, the first dielectric layer being formed on a substrate including a metal layer, the opening being configured to allow physical contact between the first electrode and the metal layer, the first electrode having a first width W1 and extending a distance beyond a region defined by the opening, a resistive layer formed on the first electrode and having substantially the first width W1, a capping layer, having a second width W2 less than the first width W1, formed on the resistive layer, a second electrode formed on the capping layer and having substantially the second width W2, a first composite spacer region having at least two different dielectric layers formed on the resistive layer between the first width W1 and the second width W2, and a via coupled to the second electrode.
    • 存储单元和方法包括形成在第一电介质层的开口中的第一电极,所述第一介电层形成在包括金属层的基板上,所述开口被配置为允许所述第一电极和所述金属层之间的物理接触, 所述第一电极具有第一宽度W1并且延伸超过由所述开口限定的区域的距离;形成在所述第一电极上并且具有基本上第一宽度W1的电阻层,覆盖层,具有小于所述第一宽度的第二宽度W2 W1,形成在电阻层上,形成在覆盖层上并具有基本上第二宽度W2的第二电极,第一复合间隔区,其具有形成在电阻层上的第一宽度W1和第二宽度之间的至少两个不同电介质层 W2和连接到第二电极的通孔。