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1. 发明申请

US20120153507A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120153507A1
公开(公告)日：2012-06-21
申请号：US13331121
申请日：2011-12-20
申请人： Syota MIKI , Takaharu Yamano , Toshio Kobayashi
发明人： Syota MIKI , Takaharu Yamano , Toshio Kobayashi
IPC分类号： H01L23/48 , H01L21/56
CPC分类号： H01L21/568 , H01L23/3128 , H01L24/19 , H01L2224/12105 , H01L2924/01029 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00
摘要： A method include disposing a semiconductor chip having an electrode pad formed on a circuit forming surface on one surface of a support so that the electrode pad contacts with the one surface of the support, forming a first insulating layer on the one surface of the support so that the first insulating layer covers at least a side surface of the semiconductor chip, removing the support and forming an interconnection terminal on the electrode pad, forming a second insulating layer on the circuit forming surface of the semiconductor chip and the first insulating layer so that the second insulating layer covers the interconnection terminal, exposing an end portion of the interconnection terminal from a top surface of the second insulating layer, and forming a wiring pattern that is electrically connected to the end portion of the interconnection terminal, on the top surface of the second insulating layer.
摘要翻译：一种方法包括在支撑体的一个表面上设置具有形成在电路形成表面上的电极焊盘的半导体芯片，使得电极焊盘与支撑体的一个表面接触，在支撑体的一个表面上形成第一绝缘层，第一绝缘层至少覆盖半导体芯片的侧表面，去除支撑并在电极焊盘上形成互连端子，在半导体芯片的电路形成表面和第一绝缘层上形成第二绝缘层，使得所述第二绝缘层覆盖所述互连端子，将所述互连端子的端部从所述第二绝缘层的顶表面露出，并且形成与所述互连端子的端部电连接的布线图案，第二绝缘层。

2. 发明授权

US07985619B2 Manufacturing method for semiconductor device embedded substrate 有权
标题翻译：半导体器件嵌入式衬底的制造方法
公开(公告)号：US07985619B2
公开(公告)日：2011-07-26
申请号：US12608383
申请日：2009-10-29
申请人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
发明人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
IPC分类号： H01L21/00
CPC分类号： H01L23/3128 , H01L21/568 , H01L21/6835 , H01L21/78 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/02333 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/18162 , H01L2224/82
摘要： A manufacturing method for a semiconductor device embedded substrate, includes: a first step of preparing a semiconductor device having a first insulating layer; a second step of preparing a support body, and arranging the semiconductor device on one surface of the support body; a third step of forming a second insulating layer on the one surface of the support body; a fourth step of removing the support body; a fifth step of forming a first wiring pattern on a surface of each of the first insulating layer and the second insulating layer; a sixth step of forming a via-hole from which the first wiring pattern is exposed on the second insulating layer; and a seventh step of forming a second wiring pattern electrically connected on a surface of the second insulating layer.
摘要翻译：一种半导体器件嵌入式衬底的制造方法，包括：准备具有第一绝缘层的半导体器件的第一工序; 制备支撑体的第二步骤，以及将半导体器件布置在支撑体的一个表面上; 在所述支撑体的一个表面上形成第二绝缘层的第三步骤; 去除支撑体的第四步骤; 在第一绝缘层和第二绝缘层的表面上形成第一布线图案的第五步骤; 在所述第二绝缘层上形成从所述第一布线图案露出的通孔的第六步骤; 以及形成电连接在第二绝缘层的表面上的第二布线图案的第七步骤。

3. 发明授权

US08793868B2 Chip embedded substrate and method of producing the same 有权
标题翻译：芯片嵌入式基板及其制造方法
公开(公告)号：US08793868B2
公开(公告)日：2014-08-05
申请号：US13167203
申请日：2011-06-23
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H05K3/30
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译：公开了一种制造芯片嵌入式基板的方法。该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。

4. 发明授权

US07981724B2 Manufacturing method for semiconductor device embedded substrate 有权
标题翻译：半导体器件嵌入式衬底的制造方法
公开(公告)号：US07981724B2
公开(公告)日：2011-07-19
申请号：US12608492
申请日：2009-10-29
申请人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
发明人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
IPC分类号： H01L21/00
CPC分类号： H01L23/49827 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L24/96 , H01L24/97 , H01L2224/02333 , H01L2224/12105 , H01L2224/13022 , H01L2224/16 , H01L2224/24226 , H01L2224/73267 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2224/82
摘要： A manufacturing method for a semiconductor device embedded substrate, includes: a first step of preparing a semiconductor device having a first insulating layer; a second step of arranging the semiconductor device on one surface of a support body; a third step of forming a second insulating layer on the one surface of the support body; a fourth step of removing the support body; a fifth step of forming a third insulating layer on a surface of each of the semiconductor device and the second insulating layer; a sixth step of mounting a wiring substrate on a surface of each of the semiconductor device and the second insulating layer; a seventh step of forming a via-hole in the second insulating layer and the third insulating layer; and an eighth step of forming a second wiring pattern on a surface of each of the first insulating layer and the second insulating layer.
摘要翻译：一种半导体器件嵌入式衬底的制造方法，包括：准备具有第一绝缘层的半导体器件的第一工序; 将半导体器件布置在支撑体的一个表面上的第二步骤; 在所述支撑体的一个表面上形成第二绝缘层的第三步骤; 去除支撑体的第四步骤; 在所述半导体器件和所述第二绝缘层的表面上形成第三绝缘层的第五步骤; 将布线基板安装在所述半导体器件和所述第二绝缘层中的每一个的表面上的第六步骤; 在第二绝缘层和第三绝缘层中形成通孔的第七步骤; 以及在第一绝缘层和第二绝缘层的每一个的表面上形成第二布线图案的第八步骤。

5. 发明申请

US20090008765A1 CHIP EMBEDDED SUBSTRATE AND METHOD OF PRODUCING THE SAME 有权
标题翻译：芯片嵌入式基板及其制造方法
公开(公告)号：US20090008765A1
公开(公告)日：2009-01-08
申请号：US11815580
申请日：2006-12-12
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H01L23/48 , H01L21/00
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译：公开了一种制造芯片嵌入式基板的方法。该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。

6. 发明授权

US08232639B2 Semiconductor-device mounted board and method of manufacturing the same 有权
标题翻译：半导体装置安装板及其制造方法
公开(公告)号：US08232639B2
公开(公告)日：2012-07-31
申请号：US12952452
申请日：2010-11-23
申请人： Toshio Kobayashi , Takaharu Yamano , Takashi Kurihara
发明人： Toshio Kobayashi , Takaharu Yamano , Takashi Kurihara
IPC分类号： H01L23/48
CPC分类号： H01L23/5389 , H01L21/6835 , H01L23/49816 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/02333 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/13022 , H01L2224/20 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/1815 , H01L2924/18162 , H01L2224/82
摘要： In a method of manufacturing a semiconductor-device mounted board, connection terminals are formed on electrode pads on a semiconductor integrated circuit respectively. A first insulating layer is formed to cover the connection terminals. A plate-like medium having a rough surface is disposed on the first insulating layer. The rough surface of the plate-like medium is pressed onto the first insulating layer so that a part of each of the connection terminals is exposed. A semiconductor device is produced by removing the plate-like medium. A second insulating layer is formed to cover side surfaces of the semiconductor device. A wiring pattern is formed to cover surfaces of the first and second insulating layers, the wiring pattern being electrically connected to the exposed connection terminal parts.
摘要翻译：在制造半导体器件安装板的方法中，分别在半导体集成电路上的电极焊盘上形成连接端子。形成第一绝缘层以覆盖连接端子。具有粗糙表面的板状介质设置在第一绝缘层上。板状介质的粗糙表面被压在第一绝缘层上，使每个连接端子的一部分露出。通过去除板状介质来制造半导体器件。形成第二绝缘层以覆盖半导体器件的侧表面。形成布线图案以覆盖第一和第二绝缘层的表面，布线图案电连接到暴露的连接端子部分。

7. 发明授权

US07989707B2 Chip embedded substrate and method of producing the same 有权
标题翻译：芯片嵌入式基板及其制造方法
公开(公告)号：US07989707B2
公开(公告)日：2011-08-02
申请号：US11815580
申请日：2006-12-12
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H05K1/16
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译：公开了一种制造芯片嵌入式基板的方法。该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。

8. 发明申请

US20100112802A1 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE EMBEDDED SUBSTRATE 有权
标题翻译：半导体器件嵌入式衬底的制造方法
公开(公告)号：US20100112802A1
公开(公告)日：2010-05-06
申请号：US12608383
申请日：2009-10-29
申请人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
发明人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
IPC分类号： H01L21/768
CPC分类号： H01L23/3128 , H01L21/568 , H01L21/6835 , H01L21/78 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/02333 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/18162 , H01L2224/82
摘要： A manufacturing method for a semiconductor device embedded substrate, includes: a first step of preparing a semiconductor device having a first insulating layer; a second step of preparing a support body, and arranging the semiconductor device on one surface of the support body; a third step of forming a second insulating layer on the one surface of the support body; a fourth step of removing the support body; a fifth step of forming a first wiring pattern on a surface of each of the first insulating layer and the second insulating layer; a sixth step of forming a via-hole from which the first wiring pattern is exposed on the second insulating layer; and a seventh step of forming a second wiring pattern electrically connected on a surface of the second insulating layer.
摘要翻译：一种半导体器件嵌入式衬底的制造方法，包括：准备具有第一绝缘层的半导体器件的第一工序; 制备支撑体的第二步骤，以及将半导体器件布置在支撑体的一个表面上; 在所述支撑体的一个表面上形成第二绝缘层的第三步骤; 去除支撑体的第四步骤; 在第一绝缘层和第二绝缘层的表面上形成第一布线图案的第五步骤; 在所述第二绝缘层上形成从所述第一布线图案露出的通孔的第六步骤; 以及形成电连接在第二绝缘层的表面上的第二布线图案的第七步骤。

9. 发明授权

US07915078B2 Manufacturing method for semiconductor device embedded substrate 有权
标题翻译：半导体器件嵌入式衬底的制造方法
公开(公告)号：US07915078B2
公开(公告)日：2011-03-29
申请号：US12608562
申请日：2009-10-29
申请人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
发明人： Toshio Kobayashi , Tadashi Arai , Takaharu Yamano
IPC分类号： H01L21/00
CPC分类号： H01L23/5389 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/02333 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/18162 , H01L2224/82
摘要： A manufacturing method for a semiconductor device embedded substrate, includes: a first step including: a step of forming a connection terminal on an electrode pad formed on a semiconductor integrated circuit, a step of forming a first insulating layer on the semiconductor integrated circuit, a step of providing a plate-like body on the first insulating layer, a step of exposing a part of the connection terminal, and a step of removing the plate-like body to manufacture a semiconductor device; a second step of arranging the semiconductor device on one surface of a support body; a third step of forming a second insulating layer on the one surface of the support body; a fourth step of removing the support body; and a fifth step of forming a first wiring pattern electrically connected to the exposed portion on a surface of each of the first insulating layer and the second insulating layer.
摘要翻译：一种半导体器件嵌入式衬底的制造方法，包括：第一步骤，包括：在形成在半导体集成电路上的电极焊盘上形成连接端子的步骤，在半导体集成电路上形成第一绝缘层的步骤，在第一绝缘层上设置板状体的步骤，暴露连接端子的一部分的步骤以及去除板状体以制造半导体器件的步骤; 将半导体器件布置在支撑体的一个表面上的第二步骤; 在所述支撑体的一个表面上形成第二绝缘层的第三步骤; 去除支撑体的第四步骤; 以及第五步骤，形成与所述第一绝缘层和所述第二绝缘层中的每一个的表面电连接到所述暴露部分的第一布线图案。

10. 发明申请

US20130337125A1 MANUFACTURING METHOD OF GLUTEN FREE NOODLE 审中-公开
标题翻译：无糖面条的制造方法
公开(公告)号：US20130337125A1
公开(公告)日：2013-12-19
申请号：US13523804
申请日：2012-06-14
申请人： Toshio Kobayashi
发明人： Toshio Kobayashi
IPC分类号： A23L1/162 , B65B55/14 , B65B55/19
CPC分类号： A23L7/109 , B65B19/34 , B65B55/14 , B65B55/19
摘要： In a raw material preparing step, a rice powder as a primary raw material powder is added with a water to prepare a mixed raw material. In a kneading step, the mixed raw material is kneaded to form a kneaded substance. In a pressing/extending step, the kneaded substance is pressed and extended to form noodle dough sheet. In a slitting step, the noodle dough sheet is slit into predetermined noodle strand shape to obtain a continuous noodle strand However, these steps maintain a non-alpha state of the rice powder component In a packaging step, a unit-length noodle strand is accommodated in a pouch-like heat-resistant packaging container and hermetically sealed to obtain a packaged unit-length noodle strand, while maintaining a non-alpha state of the rice powder component in the noodle strand.
摘要翻译：在原料制备工序中，将作为主要原料粉末的米粉加入水中以制备混合原料。在捏合步骤中，将混合的原料捏合以形成捏合物。在压延/延伸步骤中，将捏合的物质压制并延伸以形成面条面片。在切割步骤中，将面条片切成预定的面条形状以获得连续的面条。然而，这些步骤保持米粉成分的非α状态在包装步骤中，容纳单位面条在袋状耐热包装容器中进行气密密封以获得包装的单位长度的面条，同时保持面粉条中的米粉成分的非α状态。

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