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1. 发明授权

US08441835B2 Interface control for improved switching in RRAM 有权
公开(公告)号：US08441835B2
公开(公告)日：2013-05-14
申请号：US12814410
申请日：2010-06-11
申请人： Sung Hyun Jo , Hagop Nazarian , Wei Lu
发明人： Sung Hyun Jo , Hagop Nazarian , Wei Lu
IPC分类号： G11C11/00
CPC分类号： H01L45/1608 , G11C13/0002 , G11C2213/33 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/148
摘要： A memory device has a crossbar array including a first array of first electrodes extending along a first direction. A second array of second electrodes extends along a second direction. A non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array. The non-crystalline silicon structure has a first layer having a first defect density and a second layer having a second defect density different from the first defect density. Each intersection of the first array and the second array defines a two-terminal memory cell.

2. 发明申请

US20110305064A1 INTERFACE CONTROL FOR IMPROVED SWITCHING IN RRAM 有权
标题翻译：接口控制改进RRAM中的切换
公开(公告)号：US20110305064A1
公开(公告)日：2011-12-15
申请号：US12814410
申请日：2010-06-11
申请人： Sung Hyun JO , Hagop Nazarian , Wei Lu
发明人： Sung Hyun JO , Hagop Nazarian , Wei Lu
IPC分类号： G11C11/00 , H01L21/02 , H01L45/00
CPC分类号： H01L45/1608 , G11C13/0002 , G11C2213/33 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/148
摘要： A memory device has a crossbar array including a first array of first electrodes extending along a first direction. A second array of second electrodes extends along a second direction. A non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array. The non-crystalline silicon structure has a first layer having a first defect density and a second layer having a second defect density different from the first defect density. Each intersection of the first array and the second array defines a two-terminal memory cell.
摘要翻译：存储器件具有包括沿着第一方向延伸的第一电极的第一阵列的交叉开关阵列。第二电极阵列沿第二方向延伸。在由第一阵列和第二阵列限定的交点处在第一电极和第二电极之间提供的非晶硅结构。非晶硅结构具有具有第一缺陷密度的第一层和具有与第一缺陷密度不同的第二缺陷密度的第二层。第一阵列和第二阵列的每个交点定义两端存储单元。

3. 发明授权

US09508425B2 Nanoscale metal oxide resistive switching element 有权
标题翻译：纳米级金属氧化物电阻开关元件
公开(公告)号：US09508425B2
公开(公告)日：2016-11-29
申请号：US13167920
申请日：2011-06-24
申请人： Wei Lu , Sung Hyun Jo
发明人： Wei Lu , Sung Hyun Jo
IPC分类号： H01L47/00 , G11C11/56 , G11C13/00 , H01L27/24 , H01L45/00
CPC分类号： G11C11/5685 , G11C13/0007 , H01L27/2436 , H01L27/2472 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1633 , H01L45/1675
摘要： A non-volatile memory device structure. The non-volatile memory device structure comprises a first electrode formed from a first metal material, a resistive switching element overlying the first electrode. The resistive switching element comprises a metal oxide material characterized by one or more oxygen deficient sites. The device includes a second electrode overlying the resistive switching layer, the second electrode being formed from a second metal material. The second electrode is made from a noble metal. The one or more oxygen deficient sites are caused to migrate from one of the first electrode or the second electrode towards the other electrode upon a voltage applied to the first electrode or the second electrode. The device can have a continuous change in resistance upon applying a continuous voltage ramp, suitable for an analog device. Alternatively, the device can have a sharp change in resistance upon applying the continuous voltage ramp, suitable for a digital device.
摘要翻译：非易失性存储器件结构。非易失性存储器件结构包括由第一金属材料形成的第一电极，覆盖第一电极的电阻式开关元件。电阻式开关元件包括以一个或多个缺氧部位为特征的金属氧化物材料。该器件包括覆盖电阻开关层的第二电极，第二电极由第二金属材料形成。第二电极由贵金属制成。当施加到第一电极或第二电极的电压时，使一个或多个缺氧部位从第一电极或第二电极中的一个迁移到另一个电极。当施加适用于模拟装置的连续电压斜坡时，该装置可以具有连续的电阻变化。或者，在施加适用于数字设备的连续电压斜坡时，该装置可以具有急剧的电阻变化。

4. 发明授权

US08907317B2 Silicon based nanoscale crossbar memory 有权
标题翻译：硅基纳米尺度交叉记忆体
公开(公告)号：US08907317B2
公开(公告)日：2014-12-09
申请号：US13291094
申请日：2011-11-07
申请人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
发明人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
IPC分类号： H01L29/06 , H01L21/82 , G11C13/00 , H01L45/00 , H01L27/24 , G11C11/56 , B82Y10/00
CPC分类号： H01L45/1253 , B82Y10/00 , B82Y30/00 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/005 , G11C2013/0071 , G11C2213/11 , G11C2213/33 , G11C2213/77 , G11C2213/81 , H01L27/2409 , H01L27/2463 , H01L27/2472 , H01L45/085 , H01L45/122 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/1608 , H01L45/1675
摘要： The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.
摘要翻译：本申请描述了一种交叉开关存储器阵列。存储器阵列包括第一材料的平行纳米线的第一阵列和第二材料的平行纳米线的第二阵列。第一和第二阵列彼此成一角度定向。阵列还包括布置在第一材料的纳米线和第二材料的纳米线之间的两个阵列的每个交叉处的非晶硅的多个纳米结构。纳米结构与第一和第二材料的纳米线一起形成电阻记忆单元。

5. 发明申请

US20140036605A1 RESISTIVE SWITCHING FOR NON VOLATILE MEMORY DEVICE USING AN INTEGRATED BREAKDOWN ELEMENT 有权
公开(公告)号：US20140036605A1
公开(公告)日：2014-02-06
申请号：US13735814
申请日：2013-01-07
申请人： Wei Lu , Sung Hyun Jo
发明人： Wei Lu , Sung Hyun Jo
IPC分类号： G11C13/00 , H02H9/08
CPC分类号： H01L45/1616 , G11C13/0007 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2213/33 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/08 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/14 , H01L45/141 , H01L45/146 , H01L45/148 , H02H9/08
摘要： A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided.

6. 发明申请

US20100102290A1 SILICON BASED NANOSCALE CROSSBAR MEMORY 有权
标题翻译：基于硅的NANOSCALE十字路口存储器
公开(公告)号：US20100102290A1
公开(公告)日：2010-04-29
申请号：US12582086
申请日：2009-10-20
申请人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
发明人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
IPC分类号： H01L47/00
CPC分类号： H01L45/1253 , B82Y10/00 , B82Y30/00 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/005 , G11C2013/0071 , G11C2213/11 , G11C2213/33 , G11C2213/77 , G11C2213/81 , H01L27/2409 , H01L27/2463 , H01L27/2472 , H01L45/085 , H01L45/122 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/1608 , H01L45/1675
摘要： The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.
摘要翻译：本申请描述了一种交叉开关存储器阵列。存储器阵列包括第一材料的平行纳米线的第一阵列和第二材料的平行纳米线的第二阵列。第一和第二阵列彼此成一角度定向。阵列还包括布置在第一材料的纳米线和第二材料的纳米线之间的两个阵列的每个交叉处的非晶硅的多个纳米结构。纳米结构与第一和第二材料的纳米线一起形成电阻记忆单元。

7. 发明申请

US20090014707A1 NON-VOLATILE SOLID STATE RESISTIVE SWITCHING DEVICES 审中-公开
标题翻译：非挥发性固态电阻开关器件
公开(公告)号：US20090014707A1
公开(公告)日：2009-01-15
申请号：US11875541
申请日：2007-10-19
申请人： Wei Lu , Sung Hyun Jo
发明人： Wei Lu , Sung Hyun Jo
IPC分类号： H01L45/00
CPC分类号： H01L45/14 , H01L27/2472 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/1616 , H01L45/1675
摘要： Non-crystalline silicon non-volatile resistive switching devices include a metal electrode, a non-crystalline silicon layer and a planar doped silicon electrode. An electrical signal applied to the metal electrode drives metal ions from the metal electrode into the non-crystalline silicon layer to form a conducting filament from the metal electrode to the planar doped silicon electrode to alter a resistance of the non-crystalline silicon layer. Another electrical signal applied to the metal electrode removes at least some of the metal ions forming the conducting filament from the non-crystalline silicon layer to further alter the resistance of the non-crystalline silicon layer.
摘要翻译：非晶硅非易失性电阻开关器件包括金属电极，非晶硅层和平面掺杂硅电极。施加到金属电极的电信号将金属离子从金属电极驱动到非晶硅层，以形成从金属电极到平面掺杂硅电极的导电丝，以改变非晶硅层的电阻。施加到金属电极的另一电信号从非晶硅层去除形成导电丝的至少一些金属离子，以进一步改变非晶硅层的电阻。

8. 发明申请

US20120049149A1 SILICON BASED NANOSTRUCTURE CROSSBAR MEMORY 有权
标题翻译：基于硅的纳米结构记录
公开(公告)号：US20120049149A1
公开(公告)日：2012-03-01
申请号：US13291094
申请日：2011-11-07
申请人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
发明人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
IPC分类号： H01L47/00 , B82Y10/00
CPC分类号： H01L45/1253 , B82Y10/00 , B82Y30/00 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/005 , G11C2013/0071 , G11C2213/11 , G11C2213/33 , G11C2213/77 , G11C2213/81 , H01L27/2409 , H01L27/2463 , H01L27/2472 , H01L45/085 , H01L45/122 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/1608 , H01L45/1675
摘要： The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.
摘要翻译：本申请描述了一种交叉开关存储器阵列。存储器阵列包括第一材料的平行纳米线的第一阵列和第二材料的平行纳米线的第二阵列。第一和第二阵列彼此成一角度定向。阵列还包括布置在第一材料的纳米线和第二材料的纳米线之间的两个阵列的每个交叉处的非晶硅的多个纳米结构。纳米结构与第一和第二材料的纳米线一起形成电阻记忆单元。

9. 发明申请

US20100085798A1 SILICON-BASED NANOSCALE RESISTIVE DEVICE WITH ADJUSTABLE RESISTANCE 有权
标题翻译：基于硅的纳米电阻器件具有可调电阻
公开(公告)号：US20100085798A1
公开(公告)日：2010-04-08
申请号：US12575921
申请日：2009-10-08
申请人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
发明人： Wei Lu , Sung Hyun Jo , Kuk-Hwan Kim
IPC分类号： G11C11/00 , H01L47/00
CPC分类号： G11C13/0069 , G11C11/56 , G11C13/0002 , G11C13/003 , G11C2213/11 , G11C2213/15 , G11C2213/33 , G11C2213/72 , G11C2213/76 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/148
摘要： A non-volatile solid state resistive device that includes a first electrode, a p-type poly-silicon second electrode, and a non-crystalline silicon nanostructure electrically connected between the electrodes. The nanostructure has a resistance that is adjustable in response to a voltage being applied to the nanostructure via the electrodes. The nanostructure can be formed as a nanopillar embedded in an insulating layer located between the electrodes. The first electrode can be a silver or other electrically conductive metal electrode. A third (metal) electrode can be connected to the p-type poly-silicon second electrode at a location adjacent the nanostructure to permit connection of the two metal electrodes to other circuitry. The resistive device can be used as a unit memory cell of a digital non-volatile memory device to store one or more bits of digital data by varying its resistance between two or more values.
摘要翻译：一种非挥发性固态电阻器件，其包括电连接在电极之间的第一电极，p型多晶硅第二电极和非晶硅纳米结构。纳米结构具有响应于通过电极施加到纳米结构的电压而可调节的电阻。纳米结构可以形成为嵌入位于电极之间的绝缘层中的纳米柱。第一电极可以是银或其它导电金属电极。第三（金属）电极可以在邻近纳米结构的位置处连接到p型多晶硅第二电极，以允许两个金属电极连接到其它电路。电阻器件可以用作数字非易失性存储器件的单元存储单元，以通过改变其两个或多个值之间的电阻来存储一位或多位数字数据。

10. 发明授权

US10134985B2 Non-volatile solid state resistive switching devices 有权
公开(公告)号：US10134985B2
公开(公告)日：2018-11-20
申请号：US11875541
申请日：2007-10-19
申请人： Wei Lu , Sung Hyun Jo
发明人： Wei Lu , Sung Hyun Jo
IPC分类号： H01L47/00 , H01L45/00 , H01L27/24
摘要： Non-crystalline silicon non-volatile resistive switching devices include a metal electrode, a non-crystalline silicon layer and a planar doped silicon electrode. An electrical signal applied to the metal electrode drives metal ions from the metal electrode into the non-crystalline silicon layer to form a conducting filament from the metal electrode to the planar doped silicon electrode to alter a resistance of the non-crystalline silicon layer. Another electrical signal applied to the metal electrode removes at least some of the metal ions forming the conducting filament from the non-crystalline silicon layer to further alter the resistance of the non-crystalline silicon layer.

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