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1. 发明授权

US06847990B2 Data transfer unit with support for multiple coherency granules 有权
标题翻译：支持多个一致性粒子的数据传输单元
公开(公告)号：US06847990B2
公开(公告)日：2005-01-25
申请号：US10150671
申请日：2002-05-17
申请人： Srinath Audityan , Marie J. Sullivan , Jose M. Nunez
发明人： Srinath Audityan , Marie J. Sullivan , Jose M. Nunez
IPC分类号： G06F12/08 , G06F12/00 , G06F13/28 , G06F13/42
CPC分类号： G06F13/4208 , G06F12/0835 , G06F13/28
摘要： A data transfer unit is able to read data from a source at the source coherency granule size and write data at the destination coherency granule size even though the two granule sizes may be different. A data transfer unit has registers for storing the granule size information in preparation of performing a transfer of a data block between a source and a destination. The data block is transferred in sub-blocks. Except for the first and last sub-blocks, the sub-blocks, for a read, are sized to the source coherency granule size, which is the transfer size that has been optimized for the source. For the write, the sub-blocks are sized to the destination coherency granule size, which is the transfer size that has been optimized for the destination. Thus, both the read and the write are optimized even though the transfers themselves are among devices with different coherency granules.
摘要翻译：数据传输单元能够以源一致性粒度大小从源读取数据，并且以目的一致性粒度大小写入数据，即使两个粒度大小可能不同。数据传送单元具有用于在准备执行源和目的地之间的数据块的传送的情况下存储颗粒大小信息的寄存器。数据块在子块中传输。除了第一个和最后一个子块之外，用于读取的子块的大小与源相关性粒度大小相同，这是源已经优化的传输大小。对于写入，子块的大小与目标一致性粒度大小相同，这是目标优化的传输大小。因此，即使传输本身在具有不同一致性颗粒的设备中，读取和写入都被优化。

2. 发明申请

US20130275989A1 CONTROLLER FOR MANAGING A RESET OF A SUBSET OF THREADS IN A MULTI-THREAD SYSTEM 有权
标题翻译：用于管理多个线程系统中的线程的重置的控制器
公开(公告)号：US20130275989A1
公开(公告)日：2013-10-17
申请号：US13445582
申请日：2012-04-12
申请人： Kun Xu , David B. Kramer , Marie J. Sullivan
发明人： Kun Xu , David B. Kramer , Marie J. Sullivan
IPC分类号： G06F9/50
CPC分类号： G06F9/5022 , G06F11/1438 , G06F11/1479
摘要： An integrated circuit device includes a processor core, and a controller. The processor core issues a command intended for a first thread of a plurality of threads. The controller initiates de-allocates hardware resources of the controller that are allocated to the first thread during a thread reset process for the first thread, returns a specified value to the processor core in response to the first command intended for the first thread during the thread reset process, drops responses intended for the first thread from other devices during the thread reset process, completes the thread reset process in response to a determination that all expected responses intended for the first thread have been either received or dropped, and continues to issue requests to other devices in response to commands from other threads of the plurality of threads and processing corresponding responses during the thread reset process.
摘要翻译：集成电路装置包括处理器核心和控制器。处理器核心发出用于多个线程的第一线程的命令。在针对第一线程的线程复位过程期间，控制器启动对分配给第一线程的控制器的硬件资源的分配，响应于在线程期间针对第一线程的第一命令，将指定的值返回到处理器核心复位过程在线程重置过程期间将针对其他设备的第一个线程的响应丢弃，响应于所有预期针对第一个线程的预期响应已被接收或丢弃的确定而完成线程重置过程，并且继续发出请求响应于来自多个线程的其他线程的命令并且在线程重置过程期间处理对应的响应而发送到其他设备。

3. 发明授权

US08924784B2 Controller for managing a reset of a subset of threads in a multi-thread system 有权
标题翻译：用于管理多线程系统中的线程子集的重置的控制器
公开(公告)号：US08924784B2
公开(公告)日：2014-12-30
申请号：US13445582
申请日：2012-04-12
申请人： Kun Xu , David B. Kramer , Marie J. Sullivan
发明人： Kun Xu , David B. Kramer , Marie J. Sullivan
IPC分类号： G06F11/00
CPC分类号： G06F9/5022 , G06F11/1438 , G06F11/1479
摘要： An integrated circuit device includes a processor core, and a controller. The processor core issues a command intended for a first thread of a plurality of threads. The controller initiates de-allocates hardware resources of the controller that are allocated to the first thread during a thread reset process for the first thread, returns a specified value to the processor core in response to the first command intended for the first thread during the thread reset process, drops responses intended for the first thread from other devices during the thread reset process, completes the thread reset process in response to a determination that all expected responses intended for the first thread have been either received or dropped, and continues to issue requests to other devices in response to commands from other threads of the plurality of threads and processing corresponding responses during the thread reset process.
摘要翻译：集成电路装置包括处理器核心和控制器。处理器核心发出用于多个线程的第一线程的命令。在针对第一线程的线程复位过程期间，控制器启动对分配给第一线程的控制器的硬件资源的分配，响应于在线程期间针对第一线程的第一命令，将指定的值返回到处理器核心复位过程在线程重置过程期间将针对其他设备的第一个线程的响应丢弃，响应于所有预期针对第一个线程的预期响应已被接收或丢弃的确定而完成线程重置过程，并且继续发出请求响应于来自多个线程的其他线程的命令并且在线程重置过程期间处理对应的响应而发送到其他设备。

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