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1. 发明授权

US5798544A Semiconductor memory device having trench isolation regions and bit lines formed thereover 失效
标题翻译：具有形成在其上的沟槽隔离区域和位线的半导体存储器件
公开(公告)号：US5798544A
公开(公告)日：1998-08-25
申请号：US242345
申请日：1994-05-13
申请人： Shuichi Ohya , Masato Sakao , Yoshihiro Takaishi , Kiyonori Kajiyana , Takeshi Akimoto , Shizuo Oguro , Seiichi Shishiguchi
发明人： Shuichi Ohya , Masato Sakao , Yoshihiro Takaishi , Kiyonori Kajiyana , Takeshi Akimoto , Shizuo Oguro , Seiichi Shishiguchi
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108 , H01L29/76
CPC分类号： H01L27/10823 , H01L27/10808
摘要： Disclosed herein is a semiconductor memory device including a plurality of memory cells each includes an active region which is defined in a column direction by a pair of trench isolation regions formed in a semiconductor substrate and in a row direction by an isolation gate conductor lines formed on a first gate insulating film covering the substrate, a source and a drain region selectively formed in the active region to define a channel region of a cell transistor, a second gate insulating film formed on the channel region, a word line formed on the second gate insulating film, a first insulating film covering the active region and the word line, a bit line formed on the first insulating film to overlap with the isolation gate conductor, a bit line connection conductor formed in the first insulating film to connect the drain region to the bit line with being in contact with the sidewall surface of the bit line, a second insulating film covering the bit line and the first insulating film, and a storage capacitor having a capacitor electrode connected to the source region through a contact hole provided in the first and second insulating film.
摘要翻译：这里公开了一种半导体存储器件，其包括多个存储单元，每个存储单元包括有源区，该有源区通过在半导体衬底中形成的一对沟槽隔离区而在列方向上限定，并且在行方向上由隔离栅导体线形成覆盖基板的第一栅极绝缘膜，选择性地形成在有源区中的源极和漏极区域，以限定单元晶体管的沟道区，形成在沟道区上的第二栅极绝缘膜，形成在第二栅极上的字线绝缘膜，覆盖有源区和字线的第一绝缘膜，形成在第一绝缘膜上以与隔离栅导体重叠的位线;形成在第一绝缘膜中的位线连接导体，以将漏区连接到位线与位线的侧壁表面接触，覆盖位线的第二绝缘膜和第一绝缘f 以及具有通过设置在第一和第二绝缘膜中的接触孔连接到源极区的电容器电极的存储电容器。

2. 发明授权

US5804505A Method of producing semiconductor device having buried contact structure 失效
标题翻译：具有掩埋接触结构的半导体器件的制造方法
公开(公告)号：US5804505A
公开(公告)日：1998-09-08
申请号：US679489
申请日：1996-07-12
申请人： Yoshiaki Yamada , Kiyonori Kajiyana
发明人： Yoshiaki Yamada , Kiyonori Kajiyana
IPC分类号： H01L21/28 , H01L21/02 , H01L21/302 , H01L21/3065 , H01L21/3205 , H01L21/3213 , H01L21/74 , H01L21/768 , H01L23/48 , H01L23/52 , H01L21/44
CPC分类号： H01L21/76864 , H01L21/02071 , H01L21/76843 , H01L21/76855 , H01L21/76856 , H01L21/76877 , Y10S438/906
摘要： Disclosed herein is a method of producing a semiconductor device which includes the steps of forming a hole in an insulating film covering a semiconductor substrate, forming a titanium nitride layer on surfaces of the hole and the insulating film, depositing tungsten on the titanium nitride layer with filling the hole to thereby form a blanket tungsten layer, etching back the blanket tungsten layer by a plasma gas including fluorine until the titanium nitride layer is exposed to thereby form a tungsten plug filling the hole, cleaning the titanium nitride layer to remove fluorine adhering to and remaining on the titanium nitride layer, and forming an aluminum layer on the cleaned titanium layer and the tungsten plug.
摘要翻译：本发明公开了一种制造半导体器件的方法，该方法包括以下步骤：在覆盖半导体衬底的绝缘膜上形成孔，在该表面上形成氮化钛层和绝缘膜，在氮化钛层上沉积钨，填充孔，从而形成覆盖钨层，通过包含氟的等离子体气体将覆盖钨层回蚀刻直到氮化钛层露出，从而形成填充孔的钨丝塞，清洁氮化钛层以去除附着于并保留在氮化钛层上，并在清洁的钛层和钨丝塞上形成铝层。

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