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1. 发明授权

US5168214A Multi-rate superresolution time series spectrum analyzer 失效
标题翻译：多速率超分辨率时间序列频谱分析仪
公开(公告)号：US5168214A
公开(公告)日：1992-12-01
申请号：US829832
申请日：1992-02-03
申请人： William E. Engeler , Seth D. Silverstein
发明人： William E. Engeler , Seth D. Silverstein
IPC分类号： G01R23/165 , G01S13/526
CPC分类号： G01S13/526 , G01R23/165
摘要： Parallel architectures preprocesses large matrices from sampled coherent time apertures receiving signals from distant sources to produce lower order matrices, derived from pseudo coherent time apertures, which are computationally less burdensome. The large matrices are processed by frequency shifting, low pass filtering with an FIR filter, and executing front-end decimation to create the pseudo coherent time apertures, each corresponding to different subbands of the temporal frequency spectrum. The signals representing the pseudo coherent time apertures are processed using matrix based superresolution spectral estimation algorithms such as the Tufts-Kumaresan (T-K) reduced rank modified covariance algorithm and the Linear Minimum Free Energy algorithms to produce an image of the sources.
摘要翻译：并行架构预处理来自采样的相干时间孔径的大矩阵，其接收来自远距离源的信号以产生从伪相干时间孔导出的较低阶矩阵，其计算上的负担较小。大矩阵通过频移，FIR滤波器的低通滤波处理，并且执行前端抽取以产生每个对应于时间频谱的不同子带的伪相干时间孔径。表示伪相干时间孔径的信号使用基于矩阵的超分辨率频谱估计算法来处理，例如Tufts-Kumaresan（T-K）降级修正协方差算法和线性最小自由能算法来产生源的图像。

2. 发明授权

US5117238A Superresolution beamformer for large order phased array system 失效
标题翻译：超分辨率波束形成器用于大订单相控阵
公开(公告)号：US5117238A
公开(公告)日：1992-05-26
申请号：US656882
申请日：1991-02-19
申请人： Seth D. Silverstein , William E. Engeler
发明人： Seth D. Silverstein , William E. Engeler
IPC分类号： H01Q3/22 , H01Q3/26
CPC分类号： H01Q3/22 , H01Q3/26
摘要： Parallel architectures preprocesses large matrices from digital phased array systems, receiving signals from distant sources, to produce lower order matrices, called pseudo coherent apertures, which are computationally less burdensome. The large matrices are processed by frequency shifting, low pass filtering with an FIR filter, and executing front-end decimation to create the pseudo coherent apertures, each corresponding to different sectors of the spatial frequency spectrum. The pseudo coherent apertures are processed using matrix based superresolution spectral estimation algorithms such as the Tufts-Kumaresan (T-K) reduced rank modified covariance algorithm and the Linear Minimum Free Energy algorithms produce an image of the sources.
摘要翻译：并行架构预处理来自数字相控阵列系统的大型矩阵，接收来自远距离源的信号，以产生称为伪相干孔径的较低阶矩阵，其在计算上不那么繁重。大矩阵通过频移，FIR滤波器的低通滤波处理，并且执行前端抽取以产生每个对应于空间频谱的不同扇区的伪相干孔。使用基于矩阵的超分辨率频谱估计算法（例如Tufts-Kumaresan（T-K））降级修正的协方差算法来处理伪相干孔径，并且线性最小自由能算法产生源的图像。

3. 发明授权

US5572219A Method and apparatus for remotely calibrating a phased array system used for satellite communication 失效
标题翻译：用于远程校准用于卫星通信的相控阵列系统的方法和装置
公开(公告)号：US5572219A
公开(公告)日：1996-11-05
申请号：US499528
申请日：1995-07-07
申请人： Seth D. Silverstein , Robert L. Nevin , William E. Engeler
发明人： Seth D. Silverstein , Robert L. Nevin , William E. Engeler
IPC分类号： H01Q3/00 , H01Q3/22
CPC分类号： H01Q3/22 , H01Q3/005
摘要： A method and apparatus for remotely calibrating a system having a plurality of N elements, such as a phased array system, is provided. The method includes generating coherent signals, such as a calibration signal and a reference signal having a predetermined spectral relationship between one another. The calibration signal which is applied to each respective one of the plurality of N elements can be orthogonally encoded based on the entries of a predetermined invertible encoding matrix, such as a binary Hadamard matrix, to generate first and second sets of orthogonally encoded signals. The first and second sets of orthogonally encoded signals and the reference signal are transmitted to a remote location. The transmitted first and second sets of orthogonally encoded signals are coherently detected at the remote location. The coherently detected first and second sets of orthogonally encoded signals are then decoded using the inverse of the predetermined invertible encoding matrix to generate a set of decoded signals. The set of decoded signals is then processed for generating calibration data for each element of the system.
摘要翻译：提供了用于远程校准具有多个N个元件（诸如相控阵列系统）的系统的方法和装置。该方法包括产生相干信号，例如校准信号和具有彼此之间的预定光谱关系的参考信号。可以基于诸如二进制Hadamard矩阵的预定可逆编码矩阵的条目来对应用于多个N个元素中的每个相应一个元素的校准信号进行正交编码，以生成第一和第二组正交编码信号。第一组和第二组正交编码信号和参考信号被发送到远程位置。所发送的第一组和第二组正交编码信号在远程位置被相干地检测。然后使用预定可逆编码矩阵的倒数对相干检测的第一和第二组正交编码信号进行解码，以生成一组解码信号。然后对该组解码信号进行处理，以产生系统的每个元件的校准数据。

4. 发明授权

US5122732A Multi-rate superresolution time series spectrum analyzer 失效
公开(公告)号：US5122732A
公开(公告)日：1992-06-16
申请号：US656904
申请日：1991-02-19
申请人： William E. Engeler , Seth D. Silverstein
发明人： William E. Engeler , Seth D. Silverstein
IPC分类号： G01R23/165 , G01S13/526
CPC分类号： G01S13/526 , G01R23/165
摘要： Parallel architectures preprocesses large matrices from sampled coherent time apertures receiving signals from distant sources to produce lower order matrices, derived from pseudo coherent time apertures, which are computationally less burdensome. The large matrices are processed by frequency shifting, low pass filtering with an FIR filter, and executing front-end decimation to create the pseudo coherent time apertures, each corresponding to different subbands of the temporal frequency spectrum. The signals representing the pseudo coherent time apertures are processed using matrix based superresolution spectral estimation algorithms such as the Tufts-Kumaresan (T-K) reduced rank modified covariance algorithm and the Linear Minimum Free Energy algorithms to produce an image of the sources.

5. 发明授权

US5151970A Method of generating, in the analog regime, weighted summations of digital signals 失效
标题翻译：在模拟方式中产生数字信号的加权求和的方法
公开(公告)号：US5151970A
公开(公告)日：1992-09-29
申请号：US722801
申请日：1991-06-28
申请人： William E. Engeler
发明人： William E. Engeler
IPC分类号： G06N3/04
CPC分类号： G06N3/04
摘要： A method is disclosed for operating electronic apparatus for generating a weighted summation of digital input signals as manifested in electric signal form, each sample of which digital input signals has a plurality B in number of bits identified by respective ones of consecutive ordinal numbers first through B.sup.th assigned in order of decreasing significance. Successive samples of each of the digital input signals is supplied in a respective stream, such that the respective streams of samples are parallel in time with each other. Each B-bit sample of said digital input signals is recoded into a plurality D in number of binary-coded digits, as manifested in electric signal form and as identified by consecutive ordinal numbers frist through D.sup.th assigned in order of decreasing significance of the respective weighting assigned each of the D binary-coded digits, B and D begin respectively a relatively larger positive integer and a relatively smaller positive integer. Each set of temporally aligned digits is converted to a set of corresponding analog electric signals, consisting of D subsets each containing analog electric signals corresponding to digits of the same assigned weighting. A weighted summation procedure is performed on the streams of partial weighted summation results, thereby to obtain a stream of final weighted summation results as manifested in electric signal form.
摘要翻译：公开了一种用于操作电子装置的方法，用于产生数字输入信号的加权求和，其表现为电信号形式，其中每个样本的数字输入信号具有多个B，其数目由连续序数第一至第B 按照意义递减的顺序分配。每个数字输入信号的连续样本在相应流中提供，使得相应的样本流在时间上彼此平行。所述数字输入信号的每个B位采样被以多个二进制编码的数字重新编码为多个D，如电信号形式所示，并且由通过Dth分配的连续序数确定的顺序是按照相应加权的显着性降低的顺序分配了每个D二进制编码数字，B和D分别开始相对较大的正整数和相对较小的正整数。每组时间对齐的数字被转换成一组相应的模拟电信号，由一组D子集组成，每个子集包含对应于相同分配权重的数字的模拟电信号。对部分加权求和结果的流执行加权求和程序，从而获得表示为电信号形式的最终加权求和结果流。

6. 发明授权

US4937775A Apparatus for the cross-correlation of a pair of complex sampled signals 失效
标题翻译：用于一对复杂采样信号互相关的装置
公开(公告)号：US4937775A
公开(公告)日：1990-06-26
申请号：US274473
申请日：1988-11-21
申请人： William E. Engeler , Matthew N O'Donnell
发明人： William E. Engeler , Matthew N O'Donnell
IPC分类号： G06F17/16 , G06F17/15
CPC分类号： G06F17/15
摘要： Apparatus for the cross-correlation of two complex sampled digital data signals X and Y uses a first N-stage CORDIC rotator of pipeline sequential form for rotating each of the real and imaginary data portions of the first (X) complex sampled signal sequentially through a summation of angles .theta.=.xi..sub.i .alpha..sub.i where .xi..sub.i =+1 or -1, .alpha..sub.1 =90.degree. and .alpha..sub.n-2 =tan.sup.-1 (2.sup.-n) for n=0, 1, 2, 3, . . . N-2) until X.sub.Im is approximately zero and a substantially zero phase angle is reached. The sign from each i-th stage, of this first pipeline is also utilized to determine the sign of rotation in each like-positioned i-th stage of a plurality M of additional CORDIC pipeline rotators, where M is the total number of time delays at which the cross-correlation function is evaluated. The real and imaginary portions of the complete M-th interval cross-correlation product are each obtained by multiplying the associated complex output of each of the Y pipeline rotators by the first pipeline magnitude signal output; N samples are then summed to provide at the j-th rotator output the appropriate pair of the real and imaginary parts of the j-th complex digital data output sample C(j).

7. 发明授权

US4903026A Architecture for high sampling rate, high resolution analog-to-digital converter system 失效
标题翻译：高采样率，高分辨率模数转换器系统的架构
公开(公告)号：US4903026A
公开(公告)日：1990-02-20
申请号：US274082
申请日：1988-11-22
申请人： Jerome J. Tiemann , William E. Engeler , Kenneth B. Welles
发明人： Jerome J. Tiemann , William E. Engeler , Kenneth B. Welles
IPC分类号： H03M1/10 , H03M1/16
CPC分类号： H03M1/1042 , H03M1/168
摘要： A high resolution analog-to-digital (A/D) converter (14) and a pipelined A/D converter are used in a single system so that unknown offset and gain errors of the pipe-lined A/D converter are determined and corrected. Each stage of the pipelined A/D converter includes a flash A/D converter (16), a corresponding digital-to-analog (D/A) converter (18), and a differential amplifier (20) so that, in each stage the output voltage of the D/A converter is subtracted from a sample of the analog input voltage, to constitute the input signal for the next stage. The flash A/D converter of each stage addresses digital words in memory (22) which, when summed by an adder chain (24), constitute the output signal of the system. The flash A/D converter output signals are also supplied to corresponding stages of a shift register (28 or 28') which accumulates the memory address bits. A comparator and finite state machine (26) receives the memory address bits from the shift register and iteratively compares the digital output signals of the pipelined A/D converter and the high resolution A/D converter and corrects the words in memory addressed by the flash A/D converters to improve resolution of the system.
摘要翻译：在单个系统中使用高分辨率模数（A / D）转换器（A / D）转换器（14）和流水线A / D转换器，以便确定和校正管道内A / D转换器的未知偏移和增益误差。流水线A / D转换器的每个级包括闪存A / D转换器（16），对应的数模（D / A）转换器（18）和差分放大器（20），使得在每个级从模拟输入电压的样本中减去D / A转换器的输出电压，构成下一级的输入信号。每级的闪存A / D转换器解决存储器（22）中的数字字，当加法器链（24）相加时，它构成系统的输出信号。闪存A / D转换器输出信号也提供给积累存储器地址位的移位寄存器（28或28'）的相应级。比较器和有限状态机（26）从移位寄存器接收存储器地址位，并且迭代地比较流水线A / D转换器和高分辨率A / D转换器的数字输出信号，并校正由闪存寻址的存储器中的字 A / D转换器提高系统的分辨率。

8. 发明授权

US4839652A Method and apparatus for high speed digital phased array coherent imaging system 失效
标题翻译：高速数字相控阵相干成像系统的方法与装置
公开(公告)号：US4839652A
公开(公告)日：1989-06-13
申请号：US56177
申请日：1987-06-01
申请人： Matthew O'Donnell , William E. Engeler , Thomas L. Vogelsong , Steven G. Karr , Sharbel E. Noujaim
发明人： Matthew O'Donnell , William E. Engeler , Thomas L. Vogelsong , Steven G. Karr , Sharbel E. Noujaim
IPC分类号： G06F3/05 , A61B8/00 , G01S7/52 , G01S7/523 , G01S15/89 , G10K11/34 , H03H17/00 , H03H17/06
CPC分类号： H03H17/0664 , G01S15/8918 , G01S7/52034 , G01S7/52046 , G10K11/346 , H03H2218/04
摘要： A method for generating an output stream of digital data words, with each data word representing the amplitude of an analog signal at one of a multiplicity F samples each second and with substantially equally spaced time intervals T therebetween, is obtained from a digital baseband demodulation system used for array beam forming. A data stream, formed of interleaved ADC output digital data words acquired from a set of converters, is at a rate of F total samples/second. Subsequent digital demodulation, filtration, and decimation provides digital output signals which need less delay resolution prior to the formation of coherent sum signals, thereby reducing overall channel memory requirements. The output baseband data stream has enhanced dynamic range, thereby reducing the ADC bit density requirements.

9. 发明授权

US4240089A Linearized charge transfer devices 失效
标题翻译：线性化电荷转移装置
公开(公告)号：US4240089A
公开(公告)日：1980-12-16
申请号：US952413
申请日：1978-10-18
申请人： William E. Engeler
发明人： William E. Engeler
IPC分类号： G11C19/28 , H01L29/768 , H01L29/94 , H01L29/78
CPC分类号： H01L29/94 , G11C19/282 , H01L29/76816 , H01L29/76866
摘要： In surface charge transfer devices a surface adjacent semiconductor layer of high resistivity and an underlying semiconductor layer of substantially lower resistivity are provided. The devices are operated to maintain depletion in the surface adjacent layer at least to the interface between the two layers to maintain substantially constant depletion depth and thereby provide substantially linear response.
摘要翻译：在表面电荷转移装置中，提供具有高电阻率的表面相邻半导体层和基本上较低电阻率的下面的半导体层。这些装置被操作以至少保持两层之间的界面处的表面相邻层的耗尽，以维持基本上不变的耗尽深度，从而提供基本上线性的响应。

10. 发明授权

US4178519A Input circuit for charge transfer apparatus 失效
标题翻译：电荷转移装置的输入电路
公开(公告)号：US4178519A
公开(公告)日：1979-12-11
申请号：US934011
申请日：1978-08-16
申请人： William E. Engeler , Richard D. Baertsch
发明人： William E. Engeler , Richard D. Baertsch
IPC分类号： G11C19/28 , G11C27/04 , H01L29/768 , H01L27/02 , H01L29/78
CPC分类号： H01L29/76808 , G11C19/285 , G11C27/04
摘要： Input structures are described for sampling an analog signal and providing charge samples in accordance therewith to charge transfer devices.
摘要翻译：描述了用于对模拟信号进行采样并根据其提供电荷样本的电荷转移装置的输入结构。

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