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1. 发明申请

US20050124158A1 Silver under-layers for electroless cobalt alloys 有权
标题翻译：无电钴合金的银层
公开(公告)号：US20050124158A1
公开(公告)日：2005-06-09
申请号：US10967101
申请日：2004-10-15
申请人： Sergey Lopatin , Arulkumar Shanmugasundrum , Yosef Shacham-Diamand
发明人： Sergey Lopatin , Arulkumar Shanmugasundrum , Yosef Shacham-Diamand
IPC分类号： C23C18/50 , H01L21/288 , H01L21/44 , H01L21/768 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76846 , C23C18/50 , C23C28/021 , C23C28/023 , H01L21/288 , H01L21/76849 , H01L21/76852 , H01L21/76874
摘要： In one embodiment, a method for depositing a capping layer on a substrate surface containing a copper layer is provided which includes exposing the substrate surface to a zinc solution to form a zinc layer on the copper layer. The method further includes exposing the substrate surface to a silver solution to form a silver layer on the zinc layer, and depositing the capping layer on the silver layer by an electroless deposition process. A second silver layer may be formed on the capping layer, if desired. In another embodiment, a composition of a deposition solution to deposit a cobalt tungsten alloy is disclosed. The deposition solution includes CaWO4, a cobalt source in a range from about 50 mM to about 500 mM, a complexing agent in a range from about 100 mM to about 700 mM and a buffering agent in a range from about 50 mM to about 500 mM.
摘要翻译：在一个实施例中，提供了一种用于在包含铜层的衬底表面上沉积覆盖层的方法，其包括将衬底表面暴露于锌溶液以在铜层上形成锌层。该方法还包括将衬底表面暴露于银溶液以在锌层上形成银层，并通过无电沉积工艺将覆盖层沉积在银层上。如果需要，可以在覆盖层上形成第二银层。在另一个实施方案中，公开了沉积钴钨合金的沉积溶液的组合物。沉积溶液包括CaWO 4 SO 4，钴源在约50mM至约500mM的范围内，络合剂在约100mM至约700mM的范围内，缓冲剂的范围约50mM至约500mM。

2. 发明授权

US07064065B2 Silver under-layers for electroless cobalt alloys 有权
标题翻译：无电钴合金的银层
公开(公告)号：US07064065B2
公开(公告)日：2006-06-20
申请号：US10967101
申请日：2004-10-15
申请人： Sergey D. Lopatin , Arulkumar Shanmugasundrum , Yosef Shacham-Diamand
发明人： Sergey D. Lopatin , Arulkumar Shanmugasundrum , Yosef Shacham-Diamand
IPC分类号： H01L21/44 , C23C28/02 , C25D3/46
CPC分类号： H01L21/76846 , C23C18/50 , C23C28/021 , C23C28/023 , H01L21/288 , H01L21/76849 , H01L21/76852 , H01L21/76874
摘要： In one embodiment, a method for depositing a capping layer on a substrate surface containing a copper layer is provided which includes exposing the substrate surface to a zinc solution, exposing the substrate surface to a silver solution to form a silver layer thereon and depositing the capping layer on the silver layer by an electroless deposition process. A second silver layer may be formed on the capping layer, if desired. In another embodiment, a composition of a deposition solution useful for forming a cobalt tungsten alloy contains calcium tungstate, a cobalt source at a concentration within a range from about 50 mM to about 500 mM, a complexing agent at a concentration within a range from about 100 mM to about 700 mM, and a buffering agent at a concentration within a range from about 50 mM to about 500 mM.
摘要翻译：在一个实施例中，提供了一种用于在包含铜层的衬底表面上沉积覆盖层的方法，其包括将衬底表面暴露于锌溶液，将衬底表面暴露于银溶液以在其上形成银层并沉积封盖通过无电镀沉积工艺在银层上。如果需要，可以在覆盖层上形成第二银层。在另一个实施方案中，可用于形成钴钨合金的沉积溶液的组合物含有钨酸钙，浓度在约50mM至约500mM范围内的钴源，浓度在约 100mM至约700mM的缓冲剂和浓度为约50mM至约500mM的缓冲剂。

3. 发明申请

US20050085031A1 Heterogeneous activation layers formed by ionic and electroless reactions used for IC interconnect capping layers 审中-公开
标题翻译：通过用于IC互连覆盖层的离子和无电反应形成的非均相活化层
公开(公告)号：US20050085031A1
公开(公告)日：2005-04-21
申请号：US10967099
申请日：2004-10-15
申请人： Sergey Lopatin , Arulkumar Shanmugasundram , Yosef Shacham-Diamand , Timothy Weidman , Dmitry Lubomirsky
发明人： Sergey Lopatin , Arulkumar Shanmugasundram , Yosef Shacham-Diamand , Timothy Weidman , Dmitry Lubomirsky
IPC分类号： C23C18/18 , C23C18/50 , H01L21/285 , H01L21/288 , H01L21/768 , H01L21/8238
CPC分类号： H01L21/76849 , C23C18/1844 , C23C18/50 , H01L21/28562 , H01L21/288 , H01L21/76867 , H01L21/76868 , H01L21/76874
摘要： Embodiments of the invention generally provide compositions of activation-alloy solutions, methods to deposit activation-alloys and electronic devices including activation-alloys and capping layers. In one embodiment, a method for depositing a capping layer for a semiconductor device is provided which includes exposing a conductive layer on a substrate surface to an activation-alloy solution, forming an activation-alloy layer on the conductive layer using the activation-alloy solution, and depositing the capping layer on the activation-alloy layer using an electroless deposition solution.
摘要翻译：本发明的实施方案通常提供活化合金溶液的组合物，沉积活化合金的方法和包括活化合金和覆盖层的电子器件。在一个实施例中，提供了一种用于沉积半导体器件的覆盖层的方法，其包括将基板表面上的导电层暴露于活化合金溶液，使用活化合金溶液在导电层上形成活化合金层，并使用无电镀沉积溶液将所述封盖层沉积在所述活化合金层上。

4. 发明授权

US5674787A Selective electroless copper deposited interconnect plugs for ULSI applications 失效
标题翻译：用于ULSI应用的选择性无电铜沉积互连插头
公开(公告)号：US5674787A
公开(公告)日：1997-10-07
申请号：US587263
申请日：1996-01-16
申请人： Bin Zhao , Prahalad K. Vasudev , Valery M. Dubin , Yosef Shacham-Diamand , Chiu H. Ting
发明人： Bin Zhao , Prahalad K. Vasudev , Valery M. Dubin , Yosef Shacham-Diamand , Chiu H. Ting
IPC分类号： H01L21/288 , H01L21/768 , H01L21/28
CPC分类号： H01L21/76831 , H01L21/288 , H01L21/76849 , H01L21/76874 , H01L21/76879 , Y10S977/81
摘要： A method or utilizing electroless copper deposition to selectively form encapsulated copper plugs to connect conductive regions on a semiconductor. A via opening in an inter-level dielectric (ILD) provides a path for connecting two conductive regions separated by the ILD. Once the underlying metal layer is exposed by the via opening, a SiN or SiON dielectric encapsulation layer is formed along the sidewalls of the via. Then, a contact displacement technique is used to form a thin activation layer of copper on a barrier metal, such as TiN, which is present as a covering layer on the underlying metal layer. After the contact displacement of copper on the barrier layer at the bottom of the via, an electroless copper deposition technique is then used to auto-catalytically deposit copper in the via. The electroless copper deposition continues until the via is almost filled, but leaving sufficient room at the top in order to form an upper encapsulation layer. The SiN or SiON sidewalls, the bottom barrier layer and the cap barrier layer function to fully encapsulate the copper plug in the via. The plug is then annealed.
摘要翻译：一种方法或利用无电镀铜沉积来选择性地形成封装的铜塞以连接半导体上的导电区域。层间电介质（ILD）中的通孔开口提供用于连接由ILD分离的两个导电区域的路径。一旦底层金属层被通孔开口暴露，沿通孔的侧壁形成SiN或SiON电介质封装层。然后，使用接触位移技术在阻挡金属上形成薄的铜活化层，例如在下面的金属层上作为覆盖层存在的TiN。在通孔底部的阻挡层上的铜的接触位移之后，然后使用无电解铜沉积技术自动催化将铜沉积在通孔中。无电铜沉积继续直到通孔几乎被填充，但是在顶部留下足够的空间以形成上封装层。 SiN或SiON侧壁，底部阻挡层和帽阻挡层用于将铜塞完全封装在通孔中。然后将塞子退火。

5. 发明申请

US20050181226A1 Method and apparatus for selectively changing thin film composition during electroless deposition in a single chamber 审中-公开
公开(公告)号：US20050181226A1
公开(公告)日：2005-08-18
申请号：US11040962
申请日：2005-01-22
申请人： Timothy Weidman , Ian Pancham , Dmitry Lubomirsky , Arulkumar Shanmugasundram , Yosef Shacham-Diamand , Farhad Moghadam
发明人： Timothy Weidman , Ian Pancham , Dmitry Lubomirsky , Arulkumar Shanmugasundram , Yosef Shacham-Diamand , Farhad Moghadam
IPC分类号： C23C18/16 , C23C18/50 , H01L21/02 , H01L21/288 , H01L21/768 , B05C3/00 , B05D1/18
CPC分类号： C23C18/1683 , C23C18/1619 , C23C18/1651 , C23C18/50 , H01L21/02068 , H01L21/02074 , H01L21/288 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76874 , Y10T428/12
摘要： A method and apparatus for electrolessly depositing a multilayer film using a fluid processing solution(s) that can clean and then electrolessly deposit a metal films having discrete or varying composition onto a conductive surface using a single processing cell. The process advantageously includes in-situ cleaning step in order to minimize the formation of oxides on the conductive surfaces, by minimizing or preventing the exposure of the conductive surfaces to oxygen (e.g., air) between the cleaning step and an electroless deposition process step(s). In one aspect, the chemical components used in the fluid processing solution(s) are selected so that the interaction of various chemical components will not drastically change the desirable properties of each of the interacting fluids, generate particles in the fluid lines or on the surface of the substrate, and/or generate a significant amount of heat which can damage the hardware or significantly change the electroless process results. In another aspect, no rinsing steps are required between the various deposition steps used to form the various layers, since the processing fluids are selected so that they are compatible with each other. In another aspect, throughout the process the conductive surfaces are continually in contact with various chemical components that will inhibit oxidation of the conductive surfaces and/or reduce the oxidized metal surfaces. In one aspect, a multilayer structure can formed on the surface of the conductive surface using the continuous electroless deposition process where the first layer of the multilayer structure has at least two of the following elements cobalt (Co), tungsten (W), phosphorus (P) or boron (B); and a second layer contains at least two of the following elements cobalt (Co), boron (B) or phosphorus (P). Formation of a multilayer structure on the conductive surface may have advantage since each deposited layer can have differing properties which when placed together will form a layer that has improved properties over a single deposited layer.

6. 发明授权

US5891513A Electroless CU deposition on a barrier layer by CU contact displacement for ULSI applications 失效
标题翻译：通过用于ULSI应用的CU接触位移，在阻挡层上沉积化学镀
公开(公告)号：US5891513A
公开(公告)日：1999-04-06
申请号：US587262
申请日：1996-01-16
申请人： Valery M. Dubin , Yosef Shacham-Diamand , Chiu H. Ting , Bin Zhao , Prahalad K. Vasudev
发明人： Valery M. Dubin , Yosef Shacham-Diamand , Chiu H. Ting , Bin Zhao , Prahalad K. Vasudev
IPC分类号： C23C18/16 , H01L21/288 , H01L21/768 , H01L23/532 , H05K3/04 , H05K3/38 , H05K3/42 , H05K3/46 , B05D5/12
CPC分类号： H01L21/76843 , C23C18/1603 , C23C18/1651 , C23C18/1689 , C23C18/1831 , C23C18/1879 , C23C18/54 , H01L21/288 , H01L21/76807 , H01L21/76874 , H01L21/76877 , H01L23/53238 , H05K3/388 , H05K3/465 , H01L2924/0002 , H05K2201/09563 , H05K2203/072 , H05K2203/0733 , H05K3/045 , H05K3/422 , H05K3/4661 , Y10S977/892
摘要： A method of utilizing electroless copper deposition to form interconnects on a semiconductor wafer. Once a via or a trench is formed in a dielectric layer, a titanium nitride (TiN) or tantalum (Ta) barrier layer is blanket deposited. Then, a contact displacement technique is used to form a thin activation seed layer of copper on the barrier layer. An electroless deposition technique is then used to auto-catalytically deposit copper on the activated barrier layer. The electroless copper deposition continues until the via/trench is filled. Subsequently, the surface is polished by an application of chemical-mechanical polishing (CMP) to remove excess copper and barrier material from the surface, so that the only copper and barrier material remaining are in the via/trench openings. Then an overlying silicon nitride (SiN) layer is formed above the exposed copper in order to form a dielectric barrier layer. The copper interconnect is fully encapsulated from the adjacent material by the TiN (or Ta) and the SiN layers.
摘要翻译：一种利用无电铜沉积在半导体晶片上形成互连的方法。一旦在电介质层中形成通孔或沟槽，则氮化钛（TiN）或钽（Ta）阻挡层被覆盖沉积。然后，使用接触位移技术在阻挡层上形成铜的薄的活化种子层。然后使用无电沉积技术在活化的阻挡层上自动催化沉积铜。继续进行化学镀铜沉积，直到通孔/沟槽被填充。随后，通过施加化学机械抛光（CMP）来抛光表面以从表面去除多余的铜和阻挡材料，使得剩余的唯一的铜和阻挡材料在通孔/沟槽开口中。然后，在暴露的铜上方形成覆盖氮化硅（SiN）层，以形成电介质阻挡层。铜互连通过TiN（或Ta）和SiN层从相邻材料完全封装。

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