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1. 发明授权

US07994006B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07994006B2
公开(公告)日：2011-08-09
申请号：US12271446
申请日：2008-11-14
申请人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L21/336
CPC分类号： H01L29/7811 , H01L29/402 , H01L29/456 , H01L29/66712 , H01L29/7802 , H01L29/7813
摘要： A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminal portion side.
摘要翻译：一种半导体器件，包括形成在半导体衬底的表面上的第一导电类型的漂移层。漂移层的表面具有位于第一区域的外周上的第二区域。形成在第一区域中的单元部分包括形成在第一基极层和源极层中的第二导电类型的第一基极层，源极层和控制电极。该装置还包括形成在漂移层中的端接部分，包括第二导电类型的第二基极层，第二导电类型的杂质扩散层，以及终止部分侧的端面位于电池单元上的金属化合物远离端子部侧的杂质扩散层的端面。

2. 发明授权

US07462541B2 Manufacturing method of semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US07462541B2
公开(公告)日：2008-12-09
申请号：US11250464
申请日：2005-10-17
申请人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L21/336
CPC分类号： H01L29/7811 , H01L29/402 , H01L29/456 , H01L29/66712 , H01L29/7802 , H01L29/7813
摘要： A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminating portion side.
摘要翻译：一种半导体器件，包括形成在半导体衬底的表面上的第一导电类型的漂移层。漂移层的表面具有位于第一区域的外周上的第二区域。形成在第一区域中的单元部分包括形成在第一基极层和源极层中的第二导电类型的第一基极层，源极层和控制电极。该装置还包括形成在漂移层中的端接部分，包括第二导电类型的第二基极层，第二导电类型的杂质扩散层，以及终止部分侧的端面位于电池单元上的金属化合物部分侧远离终止部分侧的杂质扩散层的端面。

3. 发明申请

US20090075433A1 Manufacturing Method of Semiconductor Device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20090075433A1
公开(公告)日：2009-03-19
申请号：US12271446
申请日：2008-11-14
申请人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L21/331 , H01L21/336
CPC分类号： H01L29/7811 , H01L29/402 , H01L29/456 , H01L29/66712 , H01L29/7802 , H01L29/7813
摘要： A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminal portion side.
摘要翻译：一种半导体器件，包括形成在半导体衬底的表面上的第一导电类型的漂移层。漂移层的表面具有位于第一区域的外周上的第二区域。形成在第一区域中的单元部分包括形成在第一基极层和源极层中的第二导电类型的第一基极层，源极层和控制电极。该装置还包括形成在漂移层中的端接部分，包括第二导电类型的第二基极层，第二导电类型的杂质扩散层，以及终止部分侧的端面位于电池单元上的金属化合物远离端子部侧的杂质扩散层的端面。

4. 发明申请

US20060097313A1 Semiconductor device and method of manufacturing same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060097313A1
公开(公告)日：2006-05-11
申请号：US11061624
申请日：2005-02-22
申请人： Satoshi Yanagisawa , Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Yanagisawa , Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L31/113 , H01L29/94
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/0878 , H01L29/1095 , H01L29/66712
摘要： A semiconductor device comprises a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type provided on a major surface of the semiconductor layer; a second semiconductor pillar layer of a second conductivity type provided adjacent to the first semiconductor pillar layer; a semiconductor region of the first conductivity type provided between the semiconductor layer and the second semiconductor pillar layer, the semiconductor region having a lower impurity concentration than the semiconductor layer; a semiconductor base layer of the second conductivity type provided on the second semiconductor pillar layer; a semiconductor source region of the first conductivity type selectively provided in the surface of the semiconductor base layer; a gate insulating film provided on the semiconductor base layer between the semiconductor source region and the first semiconductor pillar layer; and a gate electrode provided on the gate insulating film.
摘要翻译：半导体器件包括第一导电类型的半导体层; 设置在半导体层的主表面上的第一导电类型的第一半导体柱层; 与第一半导体柱层相邻设置的第二导电类型的第二半导体柱层; 所述第一导电类型的半导体区域设置在所述半导体层和所述第二半导体柱层之间，所述半导体区域的杂质浓度低于所述半导体层; 设置在第二半导体柱层上的第二导电类型的半导体基底层; 选择性地设置在半导体基底层的表面中的第一导电类型的半导体源区; 设置在所述半导体基底层之间的所述半导体源极区域与所述第一半导体柱层之间的栅极绝缘膜; 以及设置在栅极绝缘膜上的栅电极。

5. 发明授权

US06972460B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06972460B2
公开(公告)日：2005-12-06
申请号：US10680210
申请日：2003-10-08
申请人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L21/336 , H01L29/06 , H01L29/40 , H01L29/45 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7811 , H01L29/402 , H01L29/456 , H01L29/66712 , H01L29/7802 , H01L29/7813
摘要： A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminal portion side.
摘要翻译：一种半导体器件，包括形成在半导体衬底的表面上的第一导电类型的漂移层。漂移层的表面具有位于第一区域的外周上的第二区域。形成在第一区域中的单元部分包括形成在第一基极层和源极层中的第二导电类型的第一基极层，源极层和控制电极。该装置还包括形成在漂移层中的端接部分，包括第二导电类型的第二基极层，第二导电类型的杂质扩散层，以及终止部分侧的端面位于电池单元上的金属化合物远离端子部侧的杂质扩散层的端面。

6. 发明申请

US20050250322A1 Semiconductor device and its manufacturing method 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050250322A1
公开(公告)日：2005-11-10
申请号：US11094190
申请日：2005-03-31
申请人： Satoshi Aida , Shigeo Kouzuki , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Aida , Shigeo Kouzuki , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L29/78 , H01L21/265 , H01L21/336 , H01L21/44 , H01L29/06 , H01L29/10 , H01L29/423
CPC分类号： H01L29/7811 , H01L21/26586 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/4238 , H01L29/66712 , H01L29/7802
摘要： There is provided a power MISFET which includes a semiconductor region of a first conductivity, a semiconductor base region of a second conductivity, a pillar region, a first major electrode region of a first conductivity on the base region, a second major electrode region connected with at least the semiconductor region and a part of the pillar region, a control electrode and an electrode pad connected with the control electrode. The pillar region including a first region of a first conductivity type and a second region of a second conductivity type is not formed under the electrode pad. Also, a method for manufacturing a MISFET is provided.
摘要翻译：提供了一种功率MISFET，其包括第一导电性的半导体区域，第二导电性的半导体基极区域，柱状区域，基极区域上的第一导电性的第一主电极区域，与第二导电性区域连接的第二主电极区域至少半导体区域和一部分柱区域，控制电极和与控制电极连接的电极焊盘。包括第一导电类型的第一区域和第二导电类型的第二区域的柱区域不形成在电极焊盘下面。另外，提供了用于制造MISFET的方法。

7. 发明申请

US20050194638A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20050194638A1
公开(公告)日：2005-09-08
申请号：US10975356
申请日：2004-10-29
申请人： Shigeo Kouzuki , Satoshi Aida , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
发明人： Shigeo Kouzuki , Satoshi Aida , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L23/48 , H01L29/76 , H01L29/78
CPC分类号： H01L29/7802 , H01L23/49524 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/31 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/80 , H01L24/83 , H01L24/85 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L2224/04042 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/4103 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48095 , H01L2224/48247 , H01L2224/48472 , H01L2224/48624 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/83801 , H01L2224/84205 , H01L2224/85205 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/3512 , H01L2224/83205 , H01L2924/00012
摘要： A semiconductor device comprises a semiconductor element and a conductive member. The semiconductor element has a semiconductor substrate having first and second major surfaces; a semiconductor layer formed on the first major surface of the semiconductor substrate; a plurality of trenches formed on the semiconductor layer, the trenches being parallel to each other and extending to a first direction; filling material filling the trenches; a first electrode pad provided on the semiconductor layer and connected electrically to a first major electrode; a second major electrode provided on the second major surface; and a gate electrode pad provided on the semiconductor layer and connected to a gate electrode which controls conduction between the first major electrode and the second major electrode. The conductive member is connected to at least one of the first electrode pad and the gate electrode pad via a first contact area. A leading-out direction of the conductive member is substantially parallel to the first direction.
摘要翻译：半导体器件包括半导体元件和导电元件。半导体元件具有具有第一和第二主表面的半导体衬底; 形成在半导体衬底的第一主表面上的半导体层; 形成在所述半导体层上的多个沟槽，所述沟槽彼此平行并延伸到第一方向; 填充沟槽的填充材料; 设置在所述半导体层上并与第一主电极电连接的第一电极焊盘; 设置在第二主表面上的第二主电极; 以及设置在所述半导体层上并与控制所述第一主电极和所述第二主电极之间的导通的栅电极连接的栅电极焊盘。导电构件经由第一接触区域连接到第一电极焊盘和栅电极焊盘中的至少一个。导电构件的导出方向基本上平行于第一方向。

8. 发明授权

US06849900B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06849900B2
公开(公告)日：2005-02-01
申请号：US10606755
申请日：2003-06-27
申请人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka , Wataru Saito
发明人： Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa , Hironori Yoshioka , Wataru Saito
IPC分类号： H01L21/336 , H01L29/06 , H01L29/739 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/7802
摘要： A semiconductor device includes: a semiconductor substrate of a first conductivity type; a semiconductor layer of a first conductivity type formed on a first main surface of the semiconductor substrate, the semiconductor layer including a first region for a cell portion and a second region for a terminating portion, the second region being positioned in an outer periphery of the first region, the terminating portion maintaining breakdown voltage by extending a depletion layer to relieve an electric field; junction pairs of semiconductor layers periodically arranged so as to form a line from the first region to the second region in a first direction parallel to the first main surface in the semiconductor layer and having mutually opposite conductivity types of impurities, each of the junction pair being composed of a first impurity diffusion layer of a second conductivity type formed from a surface of the semiconductor layer toward the semiconductor substrate and a second impurity diffusion layer of a first conductivity type formed from the surface of the semiconductor layer toward the semiconductor substrate and adjacently to the first impurity diffusion layer; a base layer of a second conductivity type selectively formed on each surface layer of the junction pairs which are formed in the first region, so as to connect with the first impurity diffusion layer and the second impurity diffusion layer in the same manner; a source layer of a first conductivity type selectively formed on each surface layer of the base layers of the second conductive type; a control electrode formed above each surface of the base layers and above each surface of the source layers via an insulating film; a first main electrode formed so as to cover the control electrode and to contact the source layers and the base layers in the same manner; and a second main electrode formed on a second main surface opposite to the first main surface of the semiconductor substrate.
摘要翻译：半导体器件包括：第一导电类型的半导体衬底; 形成在所述半导体衬底的第一主表面上的第一导电类型的半导体层，所述半导体层包括用于单元部分的第一区域和用于端接部分的第二区域，所述第二区域位于所述半导体衬底的外周中第一区域，终端部分通过延伸耗尽层来缓和电场来保持击穿电压; 在半导体层中平行于第一主表面的第一方向上并且具有相互相反的导电类型的杂质的周期性地布置以便形成从第一区域到第二区域的线的结对对，由半导体层的朝向半导体衬底的表面形成的第二导电类型的第一杂质扩散层和由半导体层的表面朝向半导体衬底形成的第一导电类型的第二杂质扩散层，并且相邻于第一杂质扩散层; 选择性地形成在形成在第一区域的结对的每个表面层上的第二导电类型的基底层，以与第一杂质扩散层和第二杂质扩散层相同的方式连接; 选择性地形成在第二导电类型的基底层的每个表面层上的第一导电类型的源极层; 控制电极，其经由绝缘膜形成在所述基底层的每个表面上方和所述源极层的每个表面上方; 形成为覆盖控制电极并以相同的方式接触源极层和基极层的第一主电极; 以及形成在与所述半导体衬底的所述第一主表面相对的第二主表面上的第二主电极。

9. 发明授权

US07259426B2 Semiconductor device and its manufacturing method 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07259426B2
公开(公告)日：2007-08-21
申请号：US11094190
申请日：2005-03-31
申请人： Satoshi Aida , Shigeo Kouzuki , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
发明人： Satoshi Aida , Shigeo Kouzuki , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7811 , H01L21/26586 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/4238 , H01L29/66712 , H01L29/7802
摘要： There is provided a power MISFET which includes a semiconductor region of a first conductivity, a semiconductor base region of a second conductivity, a pillar region, a first major electrode region of a first conductivity on the base region, a second major electrode region connected with at least the semiconductor region and a part of the pillar region, a control electrode and an electrode pad connected with the control electrode. The pillar region including a first region of a first conductivity type and a second region of a second conductivity type is not formed under the electrode pad. Also, a method for manufacturing a MISFET is provided.
摘要翻译：提供了一种功率MISFET，其包括第一导电性的半导体区域，第二导电性的半导体基极区域，柱状区域，基极区域上的第一导电性的第一主电极区域，与第二导电性区域连接的第二主电极区域至少半导体区域和一部分柱区域，控制电极和与控制电极连接的电极焊盘。包括第一导电类型的第一区域和第二导电类型的第二区域的柱区域不形成在电极焊盘下面。另外，提供了用于制造MISFET的方法。

10. 发明授权

US07253507B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07253507B2
公开(公告)日：2007-08-07
申请号：US10975356
申请日：2004-10-29
申请人： Shigeo Kouzuki , Satoshi Aida , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
发明人： Shigeo Kouzuki , Satoshi Aida , Satoshi Yanagisawa , Masaru Izumisawa , Hironori Yoshioka
IPC分类号： H01L23/045
CPC分类号： H01L29/7802 , H01L23/49524 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/31 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/80 , H01L24/83 , H01L24/85 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L2224/04042 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/4103 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48095 , H01L2224/48247 , H01L2224/48472 , H01L2224/48624 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/83801 , H01L2224/84205 , H01L2224/85205 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/3512 , H01L2224/83205 , H01L2924/00012
摘要： A semiconductor device comprises a semiconductor element and a conductive member. The semiconductor element has a semiconductor substrate having first and second major surfaces; a semiconductor layer formed on the first major surface of the semiconductor substrate; a plurality of trenches formed on the semiconductor layer, the trenches being parallel to each other and extending to a first direction; filling material filling the trenches; a first electrode pad provided on the semiconductor layer and connected electrically to a first major electrode; a second major electrode provided on the second major surface; and a gate electrode pad provided on the semiconductor layer and connected to a gate electrode which controls conduction between the first major electrode and the second major electrode. The conductive member is connected to at least one of the first electrode pad and the gate electrode pad via a first contact area. A leading-out direction of the conductive member is substantially parallel to the first direction.
摘要翻译：半导体器件包括半导体元件和导电元件。半导体元件具有具有第一和第二主表面的半导体衬底; 形成在半导体衬底的第一主表面上的半导体层; 形成在所述半导体层上的多个沟槽，所述沟槽彼此平行并延伸到第一方向; 填充沟槽的填充材料; 设置在所述半导体层上并与第一主电极电连接的第一电极焊盘; 设置在第二主表面上的第二主电极; 以及设置在所述半导体层上并与控制所述第一主电极和所述第二主电极之间的导通的栅电极连接的栅电极焊盘。导电构件经由第一接触区域连接到第一电极焊盘和栅电极焊盘中的至少一个。导电构件的导出方向基本上平行于第一方向。

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