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1. 发明授权

US11581435B2 Semiconductor device including a first fin active region, a second fin active region and a field region 有权
公开(公告)号：US11581435B2
公开(公告)日：2023-02-14
申请号：US16895059
申请日：2020-06-08
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim , Hyung-Soon Jang , Jong-Mil Youn , Tae-Won Ha
IPC分类号： H01L29/78 , H01L29/423 , H01L21/8238 , H01L27/092 , H01L29/49 , H01L29/51 , H01L29/06 , H01L29/161 , H01L29/20 , H01L29/165 , H01L27/02
摘要： A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

2. 发明授权

US10714614B2 Semiconductor device including a first fin active region and a second fin active region 有权
公开(公告)号：US10714614B2
公开(公告)日：2020-07-14
申请号：US16109350
申请日：2018-08-22
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim , Hyung-Soon Jang , Jong-Mil Youn , Tae-Won Ha
IPC分类号： H01L29/78 , H01L29/423 , H01L21/8238 , H01L27/092 , H01L29/49 , H01L29/51 , H01L29/06 , H01L29/161 , H01L29/20 , H01L29/165 , H01L27/02
摘要： A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

3. 发明授权

US10084088B2 Method for fabricating a semiconductor device having a first fin active pattern and a second fin active pattern 有权
公开(公告)号：US10084088B2
公开(公告)日：2018-09-25
申请号：US15618623
申请日：2017-06-09
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim , Hyung-Soon Jang , Jong-Mil Youn , Tae-Won Ha
IPC分类号： H01L21/8238 , H01L29/78 , H01L29/423 , H01L27/092 , H01L29/49 , H01L29/51 , H01L29/06 , H01L29/161 , H01L29/20 , H01L29/165 , H01L27/02
CPC分类号： H01L29/7848 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823842 , H01L21/823871 , H01L27/0207 , H01L27/092 , H01L27/0922 , H01L27/0924 , H01L29/0642 , H01L29/0649 , H01L29/0653 , H01L29/161 , H01L29/165 , H01L29/20 , H01L29/42364 , H01L29/42372 , H01L29/42376 , H01L29/495 , H01L29/4966 , H01L29/4983 , H01L29/51 , H01L29/513 , H01L29/517
摘要： A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

4. 发明授权

US10014208B2 Semiconductor device having a device isolation layer 有权
公开(公告)号：US10014208B2
公开(公告)日：2018-07-03
申请号：US15444567
申请日：2017-02-28
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Ju-Youn Kim , Min-Choul Kim , Baik-Min Sung , Sang-Hyun Woo
IPC分类号： H01L27/088 , H01L21/762 , H01L27/092
CPC分类号： H01L21/76224 , H01L21/76232 , H01L27/0886 , H01L27/0924 , H01L27/1211 , H01L29/0653 , H01L29/66545 , H01L29/7848 , H01L29/785
摘要： A semiconductor device includes a fin protruding from a substrate and extending in a first direction, first and second gate structures intersecting the fin, a recess formed in the fin between the first and second gate structures, a device isolation layer which fills the recess, and which has an upper surface protruded outwardly from the fin and disposed to be coplanar with upper surfaces of the first and second gate structures, a liner formed along a side walls of the device isolation layer protruded outwardly from the fin and a source/drain region disposed at both sides of the recess and spaced apart from the device isolation layer.

5. 发明授权

US09634118B2 Methods of forming semiconductor devices 有权
公开(公告)号：US09634118B2
公开(公告)日：2017-04-25
申请号：US15164160
申请日：2016-05-25
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim
IPC分类号： H01L21/8236 , H01L21/8238 , H01L29/66 , H01L29/49
CPC分类号： H01L29/66545 , H01L21/28088 , H01L21/28185 , H01L21/82345 , H01L21/823821 , H01L21/823842 , H01L29/4958 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming first and second dielectric layers in first and second trenches. The method includes forming first and second conductive layers on the first and second dielectric layers, respectively. The method includes forming first and second protective layers on the first and second conductive layers, respectively. The method includes performing an annealing process while the first and second protective layers are on the first and second conductive layers. The method includes removing the first and second protective layers. The method includes removing the first conductive layer, after performing the annealing process. Moreover, the method includes forming first and second gate metals in the first and second trenches, respectively, after removing the first conductive layer.

6. 发明授权

US09461173B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09461173B2
公开(公告)日：2016-10-04
申请号：US14964830
申请日：2015-12-10
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim , Hyung-Soon Jang , Jong-Mil Youn , Tae-Won Ha
IPC分类号： H01L29/78 , H01L29/423 , H01L21/8238 , H01L27/092 , H01L29/49 , H01L29/51 , H01L29/06 , H01L29/161 , H01L29/20 , H01L29/165
CPC分类号： H01L29/7848 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823842 , H01L21/823871 , H01L27/0207 , H01L27/092 , H01L27/0922 , H01L27/0924 , H01L29/0642 , H01L29/0649 , H01L29/0653 , H01L29/161 , H01L29/165 , H01L29/20 , H01L29/42364 , H01L29/42372 , H01L29/42376 , H01L29/495 , H01L29/4966 , H01L29/4983 , H01L29/51 , H01L29/513 , H01L29/517
摘要： A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
摘要翻译：半导体器件包括：衬底，包括第一有源区，第二有源区和第一有源区和第二有源区之间的场区;以及栅极结构，形成在衬底上以跨过第一有源区，第二有源区和场地区。栅极结构包括彼此直接接触的p型金属栅电极和n型金属栅极电极，p型金属栅极电极从第一有源区域延伸到第二有源区域的一半以下。

7. 发明授权

US09087886B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09087886B2
公开(公告)日：2015-07-21
申请号：US14132306
申请日：2013-12-18
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim
IPC分类号： H01L29/772 , H01L21/02 , H01L27/092
CPC分类号： H01L27/0924 , H01L21/02697 , H01L21/28088 , H01L21/823842 , H01L27/0207 , H01L27/092 , H01L27/1104 , H01L29/0847 , H01L29/165 , H01L29/42364 , H01L29/42376 , H01L29/495 , H01L29/4966 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/772 , H01L29/7848 , H01L29/785
摘要： Provided are a semiconductor device and a fabricating method of the semiconductor device. The semiconductor device may include an interlayer dielectric film formed on a substrate and including a trench, a gate insulating film formed in the trench, a first work function control film formed on the gate insulating film of the trench along bottom and sidewalls of the trench, a first metal gate pattern formed on the first work function control film of the trench and filling a portion of the trench, and a second metal gate pattern formed on the first metal gate pattern of the trench, the second metal gate pattern different from the first metal gate pattern.
摘要翻译：提供半导体器件和半导体器件的制造方法。半导体器件可以包括形成在衬底上并且包括沟槽的层间电介质膜，形成在沟槽中的栅极绝缘膜，形成在沟槽的栅极绝缘膜上的第一功函数控制膜，沿沟槽的底部和侧壁形成，形成在所述沟槽的第一功函数控制膜上并填充所述沟槽的一部分的第一金属栅极图案，以及形成在所述沟槽的所述第一金属栅极图案上的第二金属栅极图案，所述第二金属栅极图案不同于所述第一金属栅极图案金属门图案。

8. 发明授权

US09059090B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09059090B2
公开(公告)日：2015-06-16
申请号：US14257466
申请日：2014-04-21
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Ju-Youn Kim , Hyun-Min Choi , Sung-Kee Han , Je-Don Kim
IPC分类号： H01L21/28 , H01L21/285 , H01L29/66 , H01L21/8234
CPC分类号： H01L21/28008 , H01L21/28518 , H01L21/823462 , H01L29/66545
摘要： A method of fabricating a semiconductor device includes forming a first gate pattern and a dummy gate pattern on a first active area and a second active area of a substrate, respectively, the first gate pattern including a first gate insulating layer and a silicon gate electrode, removing the dummy gate pattern to expose a surface of the substrate in the second active area, forming a second gate pattern including a second gate insulating layer and a metal gate electrode on the exposed surface of the substrate, the first gate insulating layer having a thickness larger than a thickness of the second gate insulating layer, and forming a gate silicide on the silicon gate electrode after forming the second gate pattern.
摘要翻译：一种制造半导体器件的方法包括分别在衬底的第一有源区和第二有源区上形成第一栅极图案和伪栅极图案，所述第一栅极图案包括第一栅极绝缘层和硅栅电极，去除伪栅极图案以在第二有源区域中露出衬底的表面，在衬底的暴露表面上形成包括第二栅极绝缘层和金属栅电极的第二栅极图案，第一栅极绝缘层具有厚度大于第二栅极绝缘层的厚度，以及在形成第二栅极图案之后在硅栅电极上形成栅极硅化物。

9. 发明申请

US20140306295A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140306295A1
公开(公告)日：2014-10-16
申请号：US14105627
申请日：2013-12-13
申请人： Samsung Electronics Co., Ltd.
发明人： Ju-Youn Kim
IPC分类号： H01L29/51
CPC分类号： H01L29/517 , H01L21/28088 , H01L21/82345 , H01L21/823462 , H01L29/4966 , H01L29/78
摘要： A semiconductor device includes a substrate including a first region and a second region. The semiconductor device also includes first and second gate laminated bodies respectively formed on the first region and the second region, wherein the first gate laminated body includes a first gate insulating film that is in contact with the substrate and that includes a first high-k dielectric film; a first lower laminated body on the first gate insulating film; and a first upper laminated body on the first lower laminated body. The first lower laminated body includes a titanium nitride film, an aluminum film, and a titanium nitride film, laminated in sequence; and the second gate laminated body includes a second gate insulating film in contact with the substrate and including a second high-k dielectric film. Additionally, a second laminated body is formed on the second gate insulating film.
摘要翻译：半导体器件包括包括第一区域和第二区域的衬底。半导体器件还包括分别形成在第一区域和第二区域上的第一和第二栅极层叠体，其中第一栅极层叠体包括与衬底接触并且包括第一高k电介质的第一栅极绝缘膜电影; 第一栅绝缘膜上的第一下层叠体; 以及在第一下层叠体上的第一上层叠体。第一下层压体包括依次层压的氮化钛膜，铝膜和氮化钛膜; 并且所述第二栅极层叠体包括与所述基板接触并包括第二高k电介质膜的第二栅极绝缘膜。另外，在第二栅极绝缘膜上形成第二层叠体。

10. 发明申请

US20140061813A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140061813A1
公开(公告)日：2014-03-06
申请号：US13902099
申请日：2013-05-24
申请人： Samsung Electronics Co., Ltd.
发明人： Cheong-Sik Yu , Choel-Hwyi Bae , Ju-Youn Kim , Chang-Min Hong
IPC分类号： H01L27/11
CPC分类号： H01L27/1104 , H01L21/823842 , H01L21/82385 , H01L27/1116
摘要： A semiconductor device includes a semiconductor substrate including a first region and a second region, a first high-k dielectric film pattern on the first region, a second high-k dielectric film pattern on the second region and having the same thickness as the first high-k dielectric film pattern. First and second work function control film patterns are positioned on the high-k dielectric film patterns of the first region. Third and fourth work function control patterns are positioned on the high-k dielectric film pattern of the second region, the first work function control pattern being thicker than the third work function control pattern and the fourth work function control pattern being thicker than the second.
摘要翻译：一种半导体器件包括：包括第一区域和第二区域的半导体衬底，第一区域上的第一高k电介质膜图案，第二区域上的第二高k电介质膜图案，并且具有与第一高度相同的厚度 -k电介质膜图案。第一和第二功能控制膜图案位于第一区域的高k电介质膜图案上。第三和第四工作功能控制图案位于第二区域的高k电介质膜图案上，第一工作功能控制图案比第三工作功能控制图案厚，第四工作功能控制图案比第二工件功能控制图案厚。

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