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    • 1. 发明授权
    • Non-volatile memory device and corresponding operating method with stress reduction
    • 非易失性存储器件及相应的减压操作方法
    • US09564231B2
    • 2017-02-07
    • US14970732
    • 2015-12-16
    • STMICROELECTRONICS S.R.L.
    • Francesca GrandeAlfredo SignorelloSantiNunzioAntonino PaganoMaria Giaquinta
    • G11C8/08G11C16/14G11C16/08
    • G11C16/14G11C8/08G11C8/10G11C16/08G11C16/16
    • A non-volatile memory device includes a memory array with memory cells arranged in rows and columns. Each cell has respective current-conduction regions and a control-gate region. The control-gate regions of the memory cells of a same row are coupled to a control-gate terminal and biased at a respective control-gate voltage. A control-gate decoder selects and biases the control-gate regions of the rows at respective control voltages according to operations to be performed on the memory cells. The current-conduction regions of the memory cells are arranged within a same bulk well, and the control-gate decoder has a number of driver blocks each of which supplies the control-gate voltages to a respective number of rows of the array. The driver blocks are provided in respective biasing wells, separate and distinct from one another.
    • 非易失性存储器件包括具有以行和列排列的存储器单元的存储器阵列。 每个单元具有各自的导电区域和控制栅极区域。 同一行的存储单元的控制栅极区域耦合到控制栅极端子并且以相应的控制栅极电压偏置。 控制栅解码器根据对存储器单元执行的操作,在各个控制电压下选择并偏置行的控制栅极区域。 存储器单元的导通区域被布置在相同的体积阱中,并且控制栅极解码器具有多个驱动器块,每个驱动器块将控制栅极电压提供给阵列的相应数量的行。 驱动器块设置在各自的偏置井中,彼此分开且不同。
    • 3. 发明申请
    • NON-VOLATILE MEMORY DEVICE AND CORRESPONDING OPERATING METHOD WITH STRESS REDUCTION
    • 非易失性存储器件和减少应力的相应操作方法
    • US20160351264A1
    • 2016-12-01
    • US14970732
    • 2015-12-16
    • STMICROELECTRONICS S.R.L.
    • Francesca GRANDEAlfredo SignorelloSantiNunzioAntonino PaganoMaria Giaquinta
    • G11C16/14G11C16/08
    • G11C16/14G11C8/08G11C8/10G11C16/08G11C16/16
    • A non-volatile memory device includes a memory array with memory cells arranged in rows and columns. Each cell has respective current-conduction regions and a control-gate region. The control-gate regions of the memory cells of a same row are coupled to a control-gate terminal and biased at a respective control-gate voltage. A control-gate decoder selects and biases the control-gate regions of the rows at respective control voltages according to operations to be performed on the memory cells. The current-conduction regions of the memory cells are arranged within a same bulk well, and the control-gate decoder has a number of driver blocks each of which supplies the control-gate voltages to a respective number of rows of the array. The driver blocks are provided in respective biasing wells, separate and distinct from one another.
    • 非易失性存储器件包括具有以行和列排列的存储器单元的存储器阵列。 每个单元具有各自的导电区域和控制栅极区域。 同一行的存储单元的控制栅极区域耦合到控制栅极端子并且以相应的控制栅极电压偏置。 控制栅解码器根据对存储器单元执行的操作,在各个控制电压下选择并偏置行的控制栅极区域。 存储器单元的导通区域被布置在相同的体积阱中,并且控制栅极解码器具有多个驱动器块,每个驱动器块将控制栅极电压提供给阵列的相应数量的行。 驱动器块设置在各自的偏置井中,彼此分开且不同。
    • 5. 发明授权
    • High-efficiency driving stage for phase change non-volatile memory devices
    • 用于相变非易失性存储器件的高效率驱动级
    • US08947906B2
    • 2015-02-03
    • US13771663
    • 2013-02-20
    • STMicroelectronics S.r.l.
    • Antonio ConteMaria GiaquintaLoredana Chiaramonte
    • G11C11/00G11C13/00G11C5/14
    • G11C13/0004G11C5/145G11C5/147G11C13/0038G11C13/0069
    • A driving stage for a phase change non-volatile memory device may have an output driving unit which supplies an output driving current during an operation of programming of at least one memory cell. A driving-control unit receives an input current and generates at output a first control signal that controls supply of the output driving current by the output driving unit in such a way that a value of this current has a desired relation with the input current. A level-shifter element, set between the output of the driving-control unit and a control input of the output driving unit, determines a level shift of the voltage of the first control signal so as to supply to the control input of the output driving unit a second control signal, having a voltage value that is increased with respect to, and is a function of, the first control signal.
    • 用于相变非易失性存储器件的驱动级可以具有输出驱动单元,其在至少一个存储器单元的编程操作期间提供输出驱动电流。 驱动控制单元接收输入电流并在输出端产生控制由输出驱动单元输出驱动电流的供给的第一控制信号,使得该电流的值与输入电流具有期望的关系。 设置在驱动控制单元的输出和输出驱动单元的控制输入之间的电平移动元件确定第一控制信号的电压的电平偏移,以便提供给输出驱动的控制输入 单元具有第二控制信号,具有相对于第一控制信号而增加并且是第一控制信号的函数的电压值。