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1. 发明授权

US09437271B2 Electronic devices having semiconductor magnetic memory units 有权
标题翻译：具有半导体磁存储单元的电子设备
公开(公告)号：US09437271B2
公开(公告)日：2016-09-06
申请号：US14058079
申请日：2013-10-18
申请人： SK hynix Inc.
发明人： Ji-Wang Lee
IPC分类号： G06F3/00 , G11C11/16 , G11C13/00
CPC分类号： G11C13/004 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/0802 , G06F2212/2024 , G06F2212/60 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1697 , G11C11/2273 , G11C13/0004 , G11C13/0007 , G11C17/16 , G11C17/18 , G11C2013/0045 , G11C2013/0054 , G11C2213/79
摘要： An electronic device comprising a semiconductor memory unit that includes a resistance variable element configured to be changed in a resistance value according to a value of data stored therein; a first reference resistance element having a first resistance value; a second reference resistance element having a second resistance value larger than the first resistance value; and a comparison unit configured to receive a voltage corresponding to the resistance value of the resistance variable element through a first input terminal and a second input terminal thereof, a voltage corresponding to the first resistance value of the first reference resistance element through a third input terminal, and a voltage corresponding to the second resistance value of the second reference resistance element through a fourth input terminal, the comparison unit configured to output a result of comparing inputs to the first input terminal and the second input terminal and inputs to the third input terminal and fourth input terminal.
摘要翻译：一种电子设备，包括半导体存储单元，其包括电阻可变元件，电阻可变元件被配置为根据存储在其中的数据的值改变电阻值; 具有第一电阻值的第一参考电阻元件; 第二参考电阻元件，具有大于第一电阻值的第二电阻值; 以及比较单元，被配置为通过第一输入端和第二输入端接收对应于电阻可变元件的电阻值的电压，通过第三输入端子接收对应于第一参考电阻元件的第一电阻值的电压以及通过第四输入端子对应于第二参考电阻元件的第二电阻值的电压，比较单元被配置为输出将输入与第一输入端子和第二输入端子进行比较的输入的结果，并输入到第三输入端子和第四输入端子。

2. 发明申请

US20130076401A1 INPUT BUFFER CIRCUIT OF SEMICONDUCTOR APPARATUS 有权
标题翻译：半导体器件的输入缓冲电路
公开(公告)号：US20130076401A1
公开(公告)日：2013-03-28
申请号：US13680239
申请日：2012-11-19
申请人： SK HYNIX INC.
发明人： Ji-Wang Lee , Yong-Ju Kim , Sung-Woo Han , Hee-Woong Song , Ic-Su Oh , Hyung-Soo Kim , Tae-Jin Hwang , Hae-Rang Choi , Jae-Min Jang , Chang-Kun Park
IPC分类号： H03K5/153
CPC分类号： H03K5/153
摘要： The input buffer circuit of a semiconductor apparatus includes a first buffering unit that that is activated by a voltage level difference between a first voltage terminal and a second voltage terminal, and generates a first compare signal and a second compare signal by comparing the voltage levels of reference voltage and an input signal; a control unit that controls the amount of current flowing between the second voltage terminal and a ground terminal by comparing the voltage levels of the reference voltage and the second compare signal; and a second buffering unit that generates an output signal by comparing the voltage levels of the input signal and the first compare signal.
摘要翻译：半导体装置的输入缓冲电路包括第一缓冲单元，其由第一电压端子和第二电压端子之间的电压电平差激活，并且通过比较第一电压电平和第二电压电平的电压电平来生成第一比较信号和第二比较信号参考电压和输入信号; 控制单元，其通过比较所述参考电压和所述第二比较信号的电压电平来控制在所述第二电压端子和接地端子之间流动的电流量; 以及第二缓冲单元，其通过比较输入信号和第一比较信号的电压电平来产生输出信号。

3. 发明申请

US20140244930A1 ELECTRONIC DEVICES HAVING SEMICONDUCTOR MAGNETIC MEMORY UNITS 有权
标题翻译：具有半导体磁记忆体单元的电子器件
公开(公告)号：US20140244930A1
公开(公告)日：2014-08-28
申请号：US14058079
申请日：2013-10-18
申请人： SK hynix Inc.
发明人： Ji-Wang Lee
IPC分类号： G11C13/00 , G06F12/00
CPC分类号： G11C13/004 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/0802 , G06F2212/2024 , G06F2212/60 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1697 , G11C11/2273 , G11C13/0004 , G11C13/0007 , G11C17/16 , G11C17/18 , G11C2013/0045 , G11C2013/0054 , G11C2213/79
摘要： An electronic device comprising a semiconductor memory unit that includes a resistance variable element configured to be changed in a resistance value according to a value of data stored therein; a first reference resistance element having a first resistance value; a second reference resistance element having a second resistance value larger than the first resistance value; and a comparison unit configured to receive a voltage corresponding to the resistance value of the resistance variable element through a first input terminal and a second input terminal thereof, a voltage corresponding to the first resistance value of the first reference resistance element through a third input terminal, and a voltage corresponding to the second resistance value of the second reference resistance element through a fourth input terminal, the comparison unit configured to output a result of comparing inputs to the first input terminal and the second input terminal and inputs to the third input terminal and fourth input terminal.
摘要翻译：一种电子设备，包括半导体存储单元，其包括电阻可变元件，电阻可变元件被配置为根据存储在其中的数据的值改变电阻值; 具有第一电阻值的第一参考电阻元件; 第二参考电阻元件，具有大于第一电阻值的第二电阻值; 以及比较单元，被配置为通过第一输入端和第二输入端接收对应于电阻可变元件的电阻值的电压，通过第三输入端子接收对应于第一参考电阻元件的第一电阻值的电压以及通过第四输入端子对应于第二参考电阻元件的第二电阻值的电压，比较单元被配置为输出将输入与第一输入端子和第二输入端子进行比较的输入的结果，并输入到第三输入端子和第四输入端子。

4. 发明授权

US09373394B2 Reference column of semiconductor memory, and electronic device including the same 有权
标题翻译：半导体存储器的参考列和包括其的电子器件
公开(公告)号：US09373394B2
公开(公告)日：2016-06-21
申请号：US14191416
申请日：2014-02-26
申请人： SK hynix Inc.
发明人： Ji-Wang Lee
IPC分类号： G11C13/00
CPC分类号： G11C13/004 , G11C13/0004 , G11C13/0007 , G11C2013/0054 , G11C2213/79
摘要： A reference column of a semiconductor memory includes a reference bit line; a reference source line; and first to Nth resistive memory cells disposed between the reference bit line and the reference source line. Data of a first state is stored in the first resistive memory cell and data of a second state is stored in the Nth resistive memory cell before a read operation, and the first and Nth resistive memory cells form current paths between the reference bit line and the reference source line in the read operation.
摘要翻译：半导体存储器的参考列包括参考位线; 参考源线; 以及设置在参考位线和参考源极线之间的第一至第N电阻式存储单元。第一状态的数据被存储在第一电阻性存储器单元中，并且在读取操作之前将第二状态的数据存储在第N电阻性存储单元中，并且第一和第N电阻存储器单元形成参考位线和参考源行在读操作。

5. 发明授权

US10255974B2 Electronic devices having semiconductor magnetic memory units 有权
公开(公告)号：US10255974B2
公开(公告)日：2019-04-09
申请号：US15256694
申请日：2016-09-05
申请人： SK hynix Inc.
发明人： Ji-Wang Lee
IPC分类号： G06F12/0802 , G11C13/00 , G11C11/16 , G06F3/06 , G11C11/22 , G11C17/16 , G11C17/18
摘要： An electronic device comprising a semiconductor memory unit that includes a resistance variable element configured to be changed in a resistance value according to a value of data stored therein; a first reference resistance element having a first resistance value; a second reference resistance element having a second resistance value larger than the first resistance value; and a comparison unit configured to receive a voltage corresponding to the resistance value of the resistance variable element through a first input terminal and a second input terminal thereof, a voltage corresponding to the first resistance value of the first reference resistance element through a third input terminal, and a voltage corresponding to the second resistance value of the second reference resistance element through a fourth input terminal, the comparison unit configured to output a result of comparing inputs to the first input terminal and the second input terminal and inputs to the third input terminal and fourth input terminal.

6. 发明申请

US20170069374A1 ELECTRONIC DEVICES HAVING SEMICONDUCTOR MAGNETIC MEMORY UNITS 审中-公开
标题翻译：具有半导体磁记忆体单元的电子器件
公开(公告)号：US20170069374A1
公开(公告)日：2017-03-09
申请号：US15256694
申请日：2016-09-05
申请人： SK hynix Inc.
发明人： Ji-Wang Lee
IPC分类号： G11C13/00 , G06F12/0802 , G11C17/18 , G11C11/22 , G11C17/16 , G06F3/06 , G11C11/16
CPC分类号： G11C13/004 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/0802 , G06F2212/2024 , G06F2212/60 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1697 , G11C11/2273 , G11C13/0004 , G11C13/0007 , G11C17/16 , G11C17/18 , G11C2013/0045 , G11C2013/0054 , G11C2213/79
摘要： An electronic device comprising a semiconductor memory unit that includes a resistance variable element configured to be changed in a resistance value according to a value of data stored therein; a first reference resistance element having a first resistance value; a second reference resistance element having a second resistance value larger than the first resistance value; and a comparison unit configured to receive a voltage corresponding to the resistance value of the resistance variable element through a first input terminal and a second input terminal thereof, a voltage corresponding to the first resistance value of the first reference resistance element through a third input terminal, and a voltage corresponding to the second resistance value of the second reference resistance element through a fourth input terminal, the comparison unit configured to output a result of comparing inputs to the first input terminal and the second input terminal and inputs to the third input terminal and fourth input terminal.
摘要翻译：一种电子设备，包括半导体存储单元，其包括电阻可变元件，电阻可变元件被配置为根据存储在其中的数据的值改变电阻值; 具有第一电阻值的第一参考电阻元件; 第二参考电阻元件，具有大于第一电阻值的第二电阻值; 以及比较单元，被配置为通过第一输入端和第二输入端接收对应于电阻可变元件的电阻值的电压，通过第三输入端子接收对应于第一参考电阻元件的第一电阻值的电压以及通过第四输入端子对应于第二参考电阻元件的第二电阻值的电压，比较单元被配置为输出将输入与第一输入端子和第二输入端子进行比较的输入的结果，并输入到第三输入端子和第四输入端子。

7. 发明申请

US20140241041A1 REFERENCE COLUMN OF SEMICONDUCTOR MEMORY, AND ELECTRONIC DEVICE INCLUDING THE SAME 有权
标题翻译：半导体存储器的参考柱，以及包括其的电子器件
公开(公告)号：US20140241041A1
公开(公告)日：2014-08-28
申请号：US14191416
申请日：2014-02-26
申请人： SK hynix Inc.
发明人： Ji-Wang Lee
IPC分类号： G11C13/00
CPC分类号： G11C13/004 , G11C13/0004 , G11C13/0007 , G11C2013/0054 , G11C2213/79
摘要： A reference column of a semiconductor memory includes a reference bit line; a reference source line; and first to Nth resistive memory cells disposed between the reference bit line and the reference source line. Data of a first state is stored in the first resistive memory cell and data of a second state is stored in the Nth resistive memory cell before a read operation, and the first and Nth resistive memory cells form current paths between the reference bit line and the reference source line in the read operation.
摘要翻译：半导体存储器的参考列包括参考位线; 参考源线; 以及设置在参考位线和参考源极线之间的第一至第N电阻式存储单元。第一状态的数据被存储在第一电阻性存储器单元中，并且在读取操作之前将第二状态的数据存储在第N电阻性存储单元中，并且第一和第N电阻存储器单元形成参考位线和参考源行在读操作。

8. 发明授权

US08461878B2 Input buffer circuit of semiconductor apparatus 有权
标题翻译：半导体装置的输入缓冲电路
公开(公告)号：US08461878B2
公开(公告)日：2013-06-11
申请号：US13680239
申请日：2012-11-19
申请人： SK Hynix Inc.
发明人： Ji-Wang Lee , Yong-Ju Kim , Sung-Woo Han , Hee-Woong Song , Ic-Su Oh , Hyung-Soo Kim , Tae-Jin Hwang , Hae-Rang Choi , Jae-Min Jang , Chang-Kun Park
IPC分类号： H03K5/153
CPC分类号： H03K5/153
摘要： The input buffer circuit of a semiconductor apparatus includes a first buffering unit that that is activated by a voltage level difference between a first voltage terminal and a second voltage terminal, and generates a first compare signal and a second compare signal by comparing the voltage levels of reference voltage and an input signal; a control unit that controls the amount of current flowing between the second voltage terminal and a ground terminal by comparing the voltage levels of the reference voltage and the second compare signal; and a second buffering unit that generates an output signal by comparing the voltage levels of the input signal and the first compare signal.
摘要翻译：半导体装置的输入缓冲电路包括第一缓冲单元，其由第一电压端子和第二电压端子之间的电压电平差激活，并且通过比较第一电压电平和第二电压电平的电压电平来生成第一比较信号和第二比较信号参考电压和输入信号; 控制单元，其通过比较所述参考电压和所述第二比较信号的电压电平来控制在所述第二电压端子和接地端子之间流动的电流量; 以及第二缓冲单元，其通过比较输入信号和第一比较信号的电压电平来产生输出信号。

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