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1. 发明授权

US4357547A EFL Toggle flip-flop 失效
标题翻译： EFL切换触发器
公开(公告)号：US4357547A
公开(公告)日：1982-11-02
申请号：US237322
申请日：1981-02-23
申请人： Roy H. Espe , W. Eric Main
发明人： Roy H. Espe , W. Eric Main
IPC分类号： H03K3/289
CPC分类号： H03K3/289
摘要： A toggle flip-flop of the type which is controlled by a clock signal capable of assuming high and low states includes a master circuit portion and a slave circuit portion. The master circuit portion includes a first output stage which is latched when the clock signal is high while the slave circuit portion has an output stage which is latched when the clock signal is low. A driving voltage signal is produced in the slave circuit portion for driving the second output stage. Means are provided for inverting the driving voltage signal and for using the inverted version to drive the first output stage.
摘要翻译：由能够承受高低状态的时钟信号控制的类型的开关触发器包括主电路部分和从电路部分。主电路部分包括当时钟信号为高电平时锁存的第一输出级，而从电路部分具有当时钟信号为低电平时锁存的输出级。在用于驱动第二输出级的从电路部分中产生驱动电压信号。提供用于反转驱动电压信号和使用反转版驱动第一输出级的装置。

2. 发明授权

US4890072A Phase locked loop having a fast lock current reduction and clamping circuit 失效
标题翻译：锁相环具有快速锁定电流降低和钳位电路
公开(公告)号：US4890072A
公开(公告)日：1989-12-26
申请号：US151870
申请日：1988-02-03
申请人： Roy H. Espe , Lawrence M. Ecklund
发明人： Roy H. Espe , Lawrence M. Ecklund
IPC分类号： H03L7/18 , H03L7/093 , H03L7/10 , H03L7/113
CPC分类号： H03L7/10
摘要： A circuit for use in a phase locked loop (PLL) which is responsive to the PLL being out of lock for providing fast lock current to drive the VCO of the PLL in the direction to acquire lock. The circuit includes a pair of controlled current sources responsive to selective control signals for either sourcing or sinking fast lock current at the output of the circuit that are utilized to produce an error control voltage at the loop filter to drive the VCO accordingly while a reducing circuit is responsive to the control voltage reaching a predetermined value as the VCO is driven toward one end or the other of its range for clamping the control voltage while reducing the fast lock current to a reduced value thereby limiting excessive charge build-up on the loop filter capacitor of the PLL. Thus, the circuit permits the VCO to acquire fast lock up by providing fast lock current thereto while clamping the range of the VCO and reducing the fast lock current as the VCO approaches either end of its range. Upon acquiring lock up, the controlled current sources are disabled.

3. 发明授权

US4845750A Multiple function control circuit for an AM stereo receiver 失效
标题翻译： AM立体声接收机的多功能控制电路
公开(公告)号：US4845750A
公开(公告)日：1989-07-04
申请号：US121361
申请日：1987-11-16
申请人： Lawrence M. Ecklund , Roy H. Espe
发明人： Lawrence M. Ecklund , Roy H. Espe
IPC分类号： H04H1/00 , H04H20/49
CPC分类号： H04H20/49
摘要： In an AM stereophonic receiver a voltage is developed in response to negative overmodulation in the received signal, to detection of a pilot tone, to detection of a minimum or no signal strength condition, and to external control. Predetermined levels of this voltage are utilized to enable/disenable various function circuits within the receiver to optimize the operation.
摘要翻译：在AM立体声接收机中，响应于接收信号中的负调制，检测导频，检测最小或无信号强度条件以及外部控制，产生电压。该电压的预定电平用于使/禁用接收器内的各种功能电路以优化操作。

4. 发明授权

US5794136A Noise blanker and a radio receiver and method employing same 失效
标题翻译：噪声抑制器和无线电接收机以及使用它的方法
公开(公告)号：US5794136A
公开(公告)日：1998-08-11
申请号：US710890
申请日：1996-09-24
申请人： Gregory J. Buchwald , Lawrence M. Ecklund , Roy H. Espe
发明人： Gregory J. Buchwald , Lawrence M. Ecklund , Roy H. Espe
IPC分类号： H03G3/34 , H04B1/16
CPC分类号： H03G3/345
摘要： A noise blanker (400) suitable for use with a radio receiver (500) having a track and hold unit (509) includes an impulse noise detector (401), a low pass filter (404) that is coupled to the impulse noise detector, and a first amplitude threshold detector (406) that is coupled to the output of the low pass filter and to the input of the track and hold unit. In one embodiment, this noise blanker is configured in conjunction with a radio receiver to yield a radio receiver that substantially minimizes the impact of noise impulses on resulting processed audio. In one embodiment, a second amplitude threshold detector (512) and a repetition rate threshold detector (513) are additionally utilized to allow gating of the internal signal processing paths of the radio receiver in conjunction with operation of the track and hold unit.
摘要翻译：适用于具有跟踪和保持单元（509）的无线电接收机（500）的噪声抑制器（400）包括脉冲噪声检测器（401），耦合到脉冲噪声检测器的低通滤波器（404）以及第一幅度阈值检测器（406），其耦合到所述低通滤波器的输出和所述轨道和保持单元的输入。在一个实施例中，该噪声消除器被配置为与无线电接收器结合，以产生基本上最小化噪声脉冲对所产生的处理音频的影响的无线电接收机。在一个实施例中，另外利用第二幅度阈值检测器（512）和重复率阈值检测器（513）来结合轨道和保持单元的操作来允许无线电接收机的内部信号处理路径的门控。

5. 发明授权

US5583891A Noise attenuation circuit for amplitude modulated radio and method therefor 失效
标题翻译：用于调幅无线电的噪声衰减电路及其方法
公开(公告)号：US5583891A
公开(公告)日：1996-12-10
申请号：US332171
申请日：1994-10-31
申请人： Roy H. Espe , Richard Potyka
发明人： Roy H. Espe , Richard Potyka
IPC分类号： H03G3/34 , H04B1/10 , H03D1/06 , H04B7/10
CPC分类号： H04B1/1027 , H03G3/345
摘要： A noise attenuation circuit (43) is provided for reducing noise in an RF stage of an AM radio receiver. A RF amplifier (44) amplifies an RF signal with amplitude modulated audio information from the signal path of an AM receiver. An AM detector (46) receives the amplified RF signal and removes the audio information. A high-pass filter (47) filters out a majority of the audio information. A noise pulse couples through the hi-pass filter (47) which is detected by a pulse detector (48) when above a predetermined threshold voltage. The pulse detector (48) enables an RF timer (49) for generating a pulse of a predetermined width. The RF timer enables a RF attenuator (51) for attenuating the RF signal in the signal path of the AM receiver. The RF attenuator (51) attenuates an average noise pulse to a level approximately equal to the magnitude of an unmodulated RF signal.
摘要翻译：提供了一种用于降低AM无线电接收机的RF级中的噪声的噪声衰减电路（43）。 RF放大器（44）从AM接收机的信号路径放大具有调幅音频信息的RF信号。 AM检测器（46）接收放大的RF信号并去除音频信息。高通滤波器（47）滤除大部分音频信息。当高于预定阈值电压时，噪声脉冲通过脉冲检测器（48）检测的高通滤波器（47）耦合。脉冲检测器（48）使得RF定时器（49）能够产生预定宽度的脉冲。 RF定时器使得能够衰减AM接收机的信号路径中的RF信号的RF衰减器（51）。 RF衰减器（51）将平均噪声脉冲衰减到大致等于未调制的RF信号的幅度的电平。

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