专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08713290B2 Scaleable status tracking of multiple assist hardware threads 失效
公开(公告)号：US08713290B2
公开(公告)日：2014-04-29
申请号：US12886149
申请日：2010-09-20
申请人： Richard Louis Arndt , Giles Roger Frazier , Ronald P. Hall
发明人： Richard Louis Arndt , Giles Roger Frazier , Ronald P. Hall
IPC分类号： G06F9/48
CPC分类号： G06F9/52 , G06F9/3004 , G06F9/30087 , G06F9/3009 , G06F9/3851 , G06F9/485
摘要： A processor includes an initiating hardware thread, which initiates a first assist hardware thread to execute a first code segment. Next, the initiating hardware thread sets an assist thread executing indicator in response to initiating the first assist hardware thread. The set assist thread executing indicator indicates whether assist hardware threads are executing. A second assist hardware thread initiates and begins executing a second code segment. In turn, the initiating hardware thread detects a change in the assist thread executing indicator, which signifies that both the first assist hardware thread and the second assist hardware thread terminated. As such, the initiating hardware thread evaluates assist hardware thread results in response to both of the assist hardware threads terminating.

2. 发明申请

US20120072707A1 Scaleable Status Tracking Of Multiple Assist Hardware Threads 失效
标题翻译：多个辅助硬件线程的可扩展状态跟踪
公开(公告)号：US20120072707A1
公开(公告)日：2012-03-22
申请号：US12886149
申请日：2010-09-20
申请人： Richard Louis Arndt , Giles Roger Frazier , Ronald P. Hall
发明人： Richard Louis Arndt , Giles Roger Frazier , Ronald P. Hall
IPC分类号： G06F9/00
CPC分类号： G06F9/52 , G06F9/3004 , G06F9/30087 , G06F9/3009 , G06F9/3851 , G06F9/485
摘要： A processor includes an initiating hardware thread, which initiates a first assist hardware thread to execute a first code segment. Next, the initiating hardware thread sets an assist thread executing indicator in response to initiating the first assist hardware thread. The set assist thread executing indicator indicates whether assist hardware threads are executing. A second assist hardware thread initiates and begins executing a second code segment. In turn, the initiating hardware thread detects a change in the assist thread executing indicator, which signifies that both the first assist hardware thread and the second assist hardware thread terminated. As such, the initiating hardware thread evaluates assist hardware thread results in response to both of the assist hardware threads terminating.
摘要翻译：处理器包括启动硬件线程，其启动第一辅助硬件线程以执行第一代码段。接下来，启动硬件线程响应于启动第一辅助硬件线程而设置辅助线程执行指示符。设置的辅助线程执行指示符指示辅助硬件线程是否正在执行。第二辅助硬件线程启动并开始执行第二代码段。反过来，启动硬件线程检测到辅助线程执行指示符的变化，这意味着第一辅助硬件线程和第二辅助硬件线程都被终止。因此，启动硬件线程响应于两个辅助硬件线程终止来评估辅助硬件线程结果。

3. 发明授权

US08719638B2 Assist thread analysis and debug mechanism 失效
公开(公告)号：US08719638B2
公开(公告)日：2014-05-06
申请号：US13551366
申请日：2012-07-17
申请人： Richard Louis Arndt , Giles Roger Frazier
发明人： Richard Louis Arndt , Giles Roger Frazier
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3648
摘要： A processor recognizes a request from a program executing on a first hardware thread to initiate software code on a second hardware thread. In response, the second hardware thread initiates and commences executing the software code. During execution, the software code uses hardware registers of the second hardware thread to store data. Upon termination of the software code, the second hardware thread invokes a hypervisor program, which extracts data from the hardware registers and stores the extracted data in a shared memory area. In turn, a debug routine executes and retrieves the extracted data from the shared memory area.

4. 发明申请

US20120284717A1 Assist Thread Analysis and Debug Mechanism 失效
标题翻译：辅助线程分析和调试机制
公开(公告)号：US20120284717A1
公开(公告)日：2012-11-08
申请号：US13551366
申请日：2012-07-17
申请人： Richard Louis Arndt , Giles Roger Frazier
发明人： Richard Louis Arndt , Giles Roger Frazier
IPC分类号： G06F9/455
CPC分类号： G06F11/3636 , G06F11/3648
摘要： A processor recognizes a request from a program executing on a first hardware thread to initiate software code on a second hardware thread. In response, the second hardware thread initiates and commences executing the software code. During execution, the software code uses hardware registers of the second hardware thread to store data. Upon termination of the software code, the second hardware thread invokes a hypervisor program, which extracts data from the hardware registers and stores the extracted data in a shared memory area. In turn, a debug routine executes and retrieves the extracted data from the shared memory area.
摘要翻译：处理器识别来自在第一硬件线程上执行的程序的请求以在第二硬件线程上发起软件代码。作为响应，第二硬件线程启动并开始执行软件代码。在执行期间，软件代码使用第二硬件线程的硬件寄存器来存储数据。在软件代码终止时，第二硬件线程调用管理程序程序，该程序从硬件寄存器中提取数据，并将提取的数据存储在共享存储器区域中。反过来，调试例程执行并从共享存储器区域检索提取的数据。

5. 发明授权

US08694832B2 Assist thread analysis and debug mechanism 有权
标题翻译：辅助线程分析和调试机制
公开(公告)号：US08694832B2
公开(公告)日：2014-04-08
申请号：US13039833
申请日：2011-03-03
申请人： Richard Louis Arndt , Giles Roger Frazier
发明人： Richard Louis Arndt , Giles Roger Frazier
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3648
摘要： A processor recognizes a request from a program executing on a first hardware thread to initiate software code on a second hardware thread. In response, the second hardware thread initiates and commences executing the software code. During execution, the software code uses hardware registers of the second hardware thread to store data. Upon termination of the software code, the second hardware thread invokes a hypervisor program, which extracts data from the hardware registers and stores the extracted data in a shared memory area. In turn, a debug routine executes and retrieves the extracted data from the shared memory area.
摘要翻译：处理器识别来自在第一硬件线程上执行的程序的请求以在第二硬件线程上发起软件代码。作为响应，第二硬件线程启动并开始执行软件代码。在执行期间，软件代码使用第二硬件线程的硬件寄存器来存储数据。在软件代码终止时，第二硬件线程调用管理程序程序，该程序从硬件寄存器中提取数据，并将提取的数据存储在共享存储器区域中。反过来，调试例程执行并从共享存储器区域检索提取的数据。

6. 发明申请

US20120226946A1 Assist Thread Analysis and Debug Mechanism 有权
公开(公告)号：US20120226946A1
公开(公告)日：2012-09-06
申请号：US13039833
申请日：2011-03-03
申请人： Richard Louis Arndt , Giles Roger Frazier
发明人： Richard Louis Arndt , Giles Roger Frazier
IPC分类号： G06F9/455 , G06F11/36
CPC分类号： G06F11/3636 , G06F11/3648
摘要： A processor recognizes a request from a program executing on a first hardware thread to initiate software code on a second hardware thread. In response, the second hardware thread initiates and commences executing the software code. During execution, the software code uses hardware registers of the second hardware thread to store data. Upon termination of the software code, the second hardware thread invokes a hypervisor program, which extracts data from the hardware registers and stores the extracted data in a shared memory area. In turn, a debug routine executes and retrieves the extracted data from the shared memory area.

7. 发明授权

US08898441B2 Obtaining and releasing hardware threads without hypervisor involvement 有权
标题翻译：获取和释放硬件线程，而不需要管理程序的参与
公开(公告)号：US08898441B2
公开(公告)日：2014-11-25
申请号：US13452854
申请日：2012-04-21
申请人： Giles Roger Frazier , Ronald P. Hall
发明人： Giles Roger Frazier , Ronald P. Hall
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/46 , G06F9/48 , G06F2209/5018
摘要： A first hardware thread executes a software program instruction, which instructs the first hardware thread to initiate a second hardware thread. As such, the first hardware thread identifies one or more register values accessible by the first hardware thread. Next, the first hardware thread copies the identified register values to one or more registers accessible by the second hardware thread. In turn, the second hardware thread accesses the copied register values included in the accessible registers and executes software code accordingly.
摘要翻译：第一硬件线程执行软件程序指令，指令第一硬件线程启动第二硬件线程。因此，第一硬件线程识别由第一硬件线程可访问的一个或多个寄存器值。接下来，第一硬件线程将所识别的寄存器值复制到由第二硬件线程可访问的一个或多个寄存器。反过来，第二个硬件线程访问可访问寄存器中包含的复制寄存器值，并相应地执行软件代码。

8. 发明申请

US20120072705A1 Obtaining And Releasing Hardware Threads Without Hypervisor Involvement 有权
公开(公告)号：US20120072705A1
公开(公告)日：2012-03-22
申请号：US12886091
申请日：2010-09-20
申请人： Giles Roger Frazier , Ronald P. Hall
发明人： Giles Roger Frazier , Ronald P. Hall
IPC分类号： G06F9/38 , G06F9/455 , G06F9/30 , G06F12/02
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/46 , G06F9/48 , G06F2209/5018
摘要： A first hardware thread executes a software program instruction, which instructs the first hardware thread to initiate a second hardware thread. As such, the first hardware thread identifies one or more register values accessible by the first hardware thread. Next, the first hardware thread copies the identified register values to one or more registers accessible by the second hardware thread. In turn, the second hardware thread accesses the copied register values included in the accessible registers and executes software code accordingly.

9. 发明授权

US08793474B2 Obtaining and releasing hardware threads without hypervisor involvement 有权
公开(公告)号：US08793474B2
公开(公告)日：2014-07-29
申请号：US12886091
申请日：2010-09-20
申请人： Giles Roger Frazier , Ronald P. Hall
发明人： Giles Roger Frazier , Ronald P. Hall
IPC分类号： G06F9/48 , G06F9/46
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/46 , G06F9/48 , G06F2209/5018
摘要： A first hardware thread executes a software program instruction, which instructs the first hardware thread to initiate a second hardware thread. As such, the first hardware thread identifies one or more register values accessible by the first hardware thread. Next, the first hardware thread copies the identified register values to one or more registers accessible by the second hardware thread. In turn, the second hardware thread accesses the copied register values included in the accessible registers and executes software code accordingly.

10. 发明申请

US20120210102A1 Obtaining And Releasing Hardware Threads Without Hypervisor Involvement 有权
标题翻译：获取和释放没有虚拟机管理程序的硬件线程
公开(公告)号：US20120210102A1
公开(公告)日：2012-08-16
申请号：US13452854
申请日：2012-04-21
申请人： Giles Roger Frazier , Ronald P. Hall
发明人： Giles Roger Frazier , Ronald P. Hall
IPC分类号： G06F9/30 , G06F9/38 , G06F9/312
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/46 , G06F9/48 , G06F2209/5018
摘要： A first hardware thread executes a software program instruction, which instructs the first hardware thread to initiate a second hardware thread. As such, the first hardware thread identifies one or more register values accessible by the first hardware thread. Next, the first hardware thread copies the identified register values to one or more registers accessible by the second hardware thread. In turn, the second hardware thread accesses the copied register values included in the accessible registers and executes software code accordingly.
摘要翻译：第一硬件线程执行软件程序指令，指令第一硬件线程启动第二硬件线程。因此，第一硬件线程识别由第一硬件线程可访问的一个或多个寄存器值。接下来，第一硬件线程将所识别的寄存器值复制到由第二硬件线程可访问的一个或多个寄存器。反过来，第二个硬件线程访问可访问寄存器中包含的复制寄存器值，并相应地执行软件代码。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式