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1. 发明申请

US20160004273A1 Clock generator, communication device and sequential clock gating circuit 有权
标题翻译：时钟发生器，通信设备和顺序时钟门控电路
公开(公告)号：US20160004273A1
公开(公告)日：2016-01-07
申请号：US14720056
申请日：2015-05-22
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： CHIH-JUNG CHIANG , SHUN-TE TSENG , KAI-YIN LIU , JIAN-RU LIN
IPC分类号： G06F1/10 , G06F1/08
CPC分类号： G06F1/10 , G06F1/06 , G06F1/08 , H03K19/0016
摘要： The present invention discloses a clock generator comprising: an oscillator operable to generate a reference clock; a multi-phase clock generating circuit operable to generate a plurality of output clocks of the same frequency but different phases according to the reference clock and stop or start outputting the output clocks according to a power control signal; a sequential clock gating circuit operable to sequentially stop or start outputting a plurality of gated clocks according to a gate control signal and maintain an output cycle number relation between the gated clocks even though the multi-phase clock generating circuit stops and then starts outputting the output clocks; and a clock operation control circuit operable to provide the power control signal and the gate control signal.
摘要翻译：本发明公开了一种时钟发生器，包括：可操作以产生参考时钟的振荡器; 多相时钟发生电路，用于根据参考时钟产生相同频率但不同相位的多个输出时钟，并根据功率控制信号停止或开始输出输出时钟; 顺序时钟门控电路，其可操作以根据门控制信号顺序地停止或开始输出多个选通时钟，并且即使多相时钟产生电路停止，并且仍然保持门控时钟之间的输出周期数关系，并且然后开始输出输出时钟以及时钟操作控制电路，其可操作以提供功率控制信号和门控制信号。

2. 发明申请

US20190140652A1 Voltage-controlled oscillator and phase-locked loop 审中-公开
公开(公告)号：US20190140652A1
公开(公告)日：2019-05-09
申请号：US16168113
申请日：2018-10-23
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： SUNG-LIN TSAI , KUO-WEI WU , JIAN-RU LIN
IPC分类号： H03L7/099 , H03L7/093 , H03L7/087 , H03L7/089
摘要： Disclosed is a voltage-controlled oscillator (VCO) capable of providing an effective high VCO gain against slow change of an input voltage caused by the variation of manufacturing processes, temperature, voltage, etc. and providing an effective low VCO gain against rapid change of the input voltage for reducing jitter. The VCO includes: an input circuit generating an input current according to an input voltage; a first current supply circuit generating a first output current according to the input current; a second current supply circuit generating a second output current according to the input current; a filter coupled to the input circuit and the second current supply circuit and configured to slow down the influence caused by the variation of the input current on the second current supply circuit; and an oscillating circuit generating an output clock according to the first output current and the second output current.

3. 发明申请

US20230025101A1 ANALOG FRONT-END DEVICE 有权
公开(公告)号：US20230025101A1
公开(公告)日：2023-01-26
申请号：US17830382
申请日：2022-06-02
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： JIAN-RU LIN , KAI-YUE LIN , YU-TING CHIU
IPC分类号： H03G3/30 , H03F3/19 , H03F1/02
摘要： An analog front-end device includes an amplifier circuit, a first gain control circuit, and a tracking circuit. The amplifier circuit is configured to generate a first output signal according to a first input signal. The first gain control circuit is configured to set a first electronic component according to a first gain control signal and transmit the first input signal to a first input terminal of the amplifier circuit via the first electronic component, in which a terminal of the first electronic component is selectively coupled to the first input terminal or a first predetermined node. The tracking circuit is configured to adjust a level of the first predetermined node according to a level of the first input terminal, in order to reduce a voltage difference between the first input terminal and the first predetermined node.

4. 发明申请

US20150103986A1 Signal transmitting and receiving circuit of digital subscriber line 有权
标题翻译：数字用户线信号发射和接收电路
公开(公告)号：US20150103986A1
公开(公告)日：2015-04-16
申请号：US14316539
申请日：2014-06-26
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： YUNG-TAI CHEN , CHENG-HSIEN LI , HUNG-CHEN CHU , JIAN-RU LIN
IPC分类号： H04B3/20 , H04M1/76
CPC分类号： H04B3/20
摘要： This invention discloses a signal transmitting and receiving circuit of a digital subscriber line used for transmitting an output signal to a telecommunication loop or receiving an input signal from the telecommunication loop. The signal transmitting and receiving circuit comprises a transformer, which is coupled to the telecommunication loop; a signal transmitting module, which is coupled to the transformer, for generating the output signal; a signal receiving module, which is coupled to the transformer, for processing the input signal; an echo cancelling circuit, comprising passive components and having two ends, one of which is coupled to the signal transmitting module and the transformer, the other is coupled to the signal receiving module and the transformer. The output signal is transmitted to the telecommunication loop via the electromagnetic coupling of the transformer, and the input signal is received by the signal receiving module by the electromagnetic coupling of the transformer.
摘要翻译：本发明公开了一种数字用户线路的信号发送和接收电路，用于向电信环路发送输出信号或从电信环路接收输入信号。信号发射和接收电路包括耦合到电信环路的变压器; 信号发射模块，其耦合到所述变压器，用于产生所述输出信号; 信号接收模块，其耦合到所述变压器，用于处理所述输入信号; 回波消除电路，包括无源部件并具有两端，其中一端耦合到信号传输模块和变压器，另一端耦合到信号接收模块和变压器。输出信号通过变压器的电磁耦合传输到电信环路，输入信号由变压器的电磁耦合由信号接收模块接收。

5. 发明公开

US20240388302A1 Compensation circuit and compensation method for successive-approximation register (SAR) analog-to-digital converter (ADC) 审中-公开
公开(公告)号：US20240388302A1
公开(公告)日：2024-11-21
申请号：US18661769
申请日：2024-05-13
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： JIAN-RU LIN , YING-CHENG WU , CHIA-WEI YU
IPC分类号： H03M1/06
CPC分类号： H03M1/0604
摘要： A compensation circuit is applied to a successive-approximation register (SAR) analog-to-digital converter (ADC) (SAR ADC) that includes a comparator, and the comparator includes a first transistor and a second transistor. The first transistor and the second transistor receive an input signal during a sampling phase, and the comparator determines at least one bit of a digital output code during a comparison phase. The compensation circuit includes a voltage generator coupled to the comparator for providing a first voltage to a first bulk of the first transistor and a second bulk of the second transistor during the sampling phase and providing a second voltage to the first bulk of the first transistor and the second bulk of the second transistor during the comparison phase.

6. 发明申请

US20200328761A1 Transmitter, receiver and transceiver 审中-公开
公开(公告)号：US20200328761A1
公开(公告)日：2020-10-15
申请号：US16843438
申请日：2020-04-08
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： JIAN-RU LIN , WEI-CHOU WANG , TUNG-HUNG SUNG , SHIH-HSIUNG HUANG
IPC分类号： H04B1/00 , H04L25/02 , H04B1/04
摘要： A transmitter, a receiver and a transceiver are provided. The transceiver includes a hybrid transceiving circuit and a common-mode voltage control circuit. The hybrid transceiving circuit includes a digital-to-analog converter (DAC) circuit, a line driver coupled to the DAC circuit, a filtering and/or amplifying circuit coupled to the line driver, and an analog-to-digital converter (ADC) circuit coupled to the filtering and/or amplifying circuit. The common-mode voltage control circuit is electrically connected to a node of the hybrid transceiving circuit and is configured to detect a common-mode voltage of the node and to adjust the common-mode voltage of the node.

7. 发明申请

US20200336150A1 Voltage-controlled oscillator and phase-locked loop 审中-公开
公开(公告)号：US20200336150A1
公开(公告)日：2020-10-22
申请号：US16916257
申请日：2020-06-30
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： SUNG-LIN TSAI , KUO-WEI WU , JIAN-RU LIN
IPC分类号： H03L7/099 , H03L7/093 , H03K3/03
摘要： Disclosed is a voltage-controlled oscillator (VCO) capable of providing an effective high VCO gain against slow change of an input voltage caused by the variation of manufacturing processes, temperature, voltage, etc. and providing an effective low VCO gain against rapid change of the input voltage for reducing jitter. The VCO includes: an input circuit generating an input current according to an input voltage; a first current supply circuit generating a first output current according to the input current; a second current supply circuit generating a second output current according to the input current; a filter coupled to the input circuit and the second current supply circuit and configured to slow down the influence caused by the variation of the input current on the second current supply circuit; and an oscillating circuit generating an output clock according to the first output current and the second output current.

8. 发明申请

US20180212422A1 Electrostatic discharge protection circuit 审中-公开
公开(公告)号：US20180212422A1
公开(公告)日：2018-07-26
申请号：US15878817
申请日：2018-01-24
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： CHIEN-MING WU , JIAN-RU LIN , LIANG-HUAN LEI , CHENG-PANG CHAN
IPC分类号： H02H9/04
CPC分类号： H02H9/04 , H02H3/04 , H02H3/207
摘要： The present invention discloses an electrostatic discharge (ESD) protection circuit, including: a first terminal configured to receive a first voltage; a second terminal configured to receive a second voltage; a detection voltage generating circuit configured to provide a detection voltage according to the first voltage and the second voltage; a warning circuit configured to generate a control signal according to the detection voltage, in which the control signal indicates a normal condition when the detection voltage satisfies predetermined voltage setting, and the control signal indicates an abnormal condition when the detection voltage does not satisfy the predetermined voltage setting; and a protected circuit configured to carry out a self-protection operation when receiving the control signal indicating the abnormal condition.

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