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1. 发明授权

US5017992A High blocking-capacity semiconductor component 失效
标题翻译：高阻塞容量半导体元件
公开(公告)号：US5017992A
公开(公告)日：1991-05-21
申请号：US490288
申请日：1990-03-08
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/74 , H01L29/08 , H01L29/417 , H01L29/744
CPC分类号： H01L29/744 , H01L29/0834 , H01L29/41716
摘要： In the case of a high blocking-capacity semiconductor component with an anode structure, which provides between the n-type base layer (6) and the anode-side p-type emitter regions (8) an n-doped barrier layer (7), and between the p-type emitter regions (8) emitter short-circuits with short-circuit contact regions (9), by partitioning of the barrier layer (7) into local barrier-layer regions (7a,b) an easily adjustable and simultaneously increased short-circuit resistance (R.sub.s) in the short-circuit path is obtained.
摘要翻译：在n型基极层（6）和阳极侧p型发射极区域（8）之间提供具有阳极结构的高阻塞容量半导体元件的情况下，n掺杂势垒层（7），并且通过将阻挡层（7）分隔成局部阻挡层区域（7a，b），在p型发射极区域（8）具有短路接触区域（9）的发射极短路之间，容易调节和同时增加了短路路径中的短路电阻（Rs）。

2. 发明授权

US4743950A Thyristor with switchable emitter short circuit 失效
标题翻译：晶闸管可切换发射极短路
公开(公告)号：US4743950A
公开(公告)日：1988-05-10
申请号：US940921
申请日：1986-12-12
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/08 , H01L29/74 , H01L29/06
CPC分类号： H01L29/0839 , H01L29/7404 , H01L29/744 , H01L29/0649
摘要： In thyristor having disconnectable emitter short circuits provided by means of monolithically integrated transistor structure, wherein a simplified production and improved control of the short circuits is achieved by the fact that a bipolar structure is integrated as the transistor structure into the component. In a preferred illustrative embodiment, the n.sup.+ -type emitter layer of the thyristor is interrupted by intermediate spaces in which the transistor structure is in each case disposed.
摘要翻译：在具有通过单片集成晶体管结构提供的可断开的发射极短路的晶闸管中，其中通过将双极结构作为晶体管结构集成到部件中而实现短路的简化生产和改进的控制。在优选的说明性实施例中，晶闸管的n +型发射极层被中间空间中断，其中晶体管结构在每种情况下都被布置。

3. 发明授权

US4596999A Power semiconductor component and process for its manufacture 失效
标题翻译：功率半导体元件及其制造工艺
公开(公告)号：US4596999A
公开(公告)日：1986-06-24
申请号：US592280
申请日：1984-03-22
申请人： Jens Gobrecht , Peter Roggwiller , Roland Sittig , Jan Voboril
发明人： Jens Gobrecht , Peter Roggwiller , Roland Sittig , Jan Voboril
IPC分类号： H01L29/74 , H01L29/739 , H01L29/744 , H01L29/80 , H01L29/06
CPC分类号： H01L29/744 , H01L29/7392
摘要： A power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first and second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. The invention further includes a process for manufacturing the component, wherein the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.
摘要翻译：提出了具有这种类型的部件的功率半导体部件，其具有至少三个连续的层并且具有高电流容量和小的功率损耗。为了接触前两层，该部件具有第一和第二金属化接触平面，其将阶梯状结构压印在部件的第一表面上。这些台阶的高度在10到20微米之间，宽度在20到300微米之间。第一接触面的表面积和第二接触面的表面积之间的比率在1和4之间。第一层是重掺杂的，最大厚度为8μm，第二层是轻掺杂的，最大厚度为40亩。本发明还包括一种制造该部件的方法，其中根据本发明的表面结构基本上由具有单个铝掩模的反应离子蚀刻工艺制备。

4. 发明授权

US5057440A Manufacturing gate turn-off thyristor having the cathode produced in two diffusion steps 失效
标题翻译：具有两个扩张步骤生产的阴茎的制造门关闭电路
公开(公告)号：US5057440A
公开(公告)日：1991-10-15
申请号：US394555
申请日：1989-08-16
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/08 , H01L29/36 , H01L29/74 , H01L29/744
CPC分类号： H01L29/744 , H01L29/0839 , H01L29/36
摘要： A method for producing a gate turn-off thyristor (GTO) having a semi-conductor substrate (1) with at least one p-conducting anode layer (4), one n-type base layer (6), one p-type base layer (7) which is in electrical contact with a gate, and one n-conducting cathode layer (8) has a cathode layer (8) with a highly doped zone (10) acting as an n.sup.+ emitter and a lightly doped zone (9) in which highly doped zone (10) adjoins the surface of the semi-conductor substrate (1) and has a doping density which is at least an order of magnitude higher than that of the p-type base layer (7), the lightly doped zone (9) is situated between a pn junction J.sub.1, produced by the p-type base layer (7) and the cathode layer (8), and the highly doped zone (10) of the cathode layer (8) including producing the doping profile of the cathode layer in first and second diffusion steps, the depth and the breakdown properties of the pn junction J.sub.1 between cathode layer and p-type base layer being determined in the first diffusion step and the layer properties of the cathode layer being determined in the second diffusion step.

5. 发明授权

US4829348A Disconnectable power semiconductor component 失效
标题翻译：可断开的功率半导体元件
公开(公告)号：US4829348A
公开(公告)日：1989-05-09
申请号：US148136
申请日：1988-01-27
申请人： Bruno Broich , Jens Gobrecht , Peter Roggwiller , Jan Voboril
发明人： Bruno Broich , Jens Gobrecht , Peter Roggwiller , Jan Voboril
IPC分类号： H01L29/74 , H01L29/06 , H01L29/10 , H01L29/739 , H01L29/744 , H01L29/749
CPC分类号： H01L29/0661 , H01L29/102 , H01L29/7392 , H01L29/744
摘要： A field-controlled thyristor having a sequence of layers consisting of anode layer, channel layer and gate regions and cathode regions, which regions are alternately arranged at the cathode side, wherein an improvement in the turn-off gain is achieved by a p-type doping of the side walls of the troughs which separate the cathode regions from each other, and/or by an additional intermediate layer which has low p-type doping and which is arranged between adjacent gate regions.
摘要翻译：具有由阳极层，沟道层和栅极区域和阴极区域组成的层序列的场控晶闸管，该区域在阴极侧交替布置，其中关断增益的改善通过p型掺杂了将阴极区彼此分离的槽的侧壁和/或通过具有低p型掺杂并且布置在相邻栅极区之间的附加中间层的掺杂。

6. 发明授权

US4642669A Semiconductor device having a blocking capability in only one direction 失效
标题翻译：具有在一个方向上具有阻挡能力的半导体器件
公开(公告)号：US4642669A
公开(公告)日：1987-02-10
申请号：US679359
申请日：1984-12-07
申请人： Peter Roggwiller , Roland Sittig
发明人： Peter Roggwiller , Roland Sittig
IPC分类号： H01L29/06 , H01L29/36 , H01L29/74 , H01L29/861 , H01L29/34
CPC分类号： H01L29/36 , H01L29/0661 , H01L29/7432 , H01L29/861
摘要： For improving the dynamic characteristics of semiconductor components required to absorb high reverse voltages only in one polarity (diodes, reverse-conducting thyristors and asymmetric thyristors), in many cases structures having an n base consisting of two layers are used. In order to improve the reverse-voltage capability, it is proposed, in a semiconductor component having at least one pn.sup.- n sequence of layers, to select the thickness (S) and the doping of an n stop layer (4) in such a way that the following applies: ##EQU1## where e=elementary charge, .epsilon.=dielectric constant of the semiconductor, N.sub.D =donor concentration, X=path coordinate, 0.8.ltoreq.k.ltoreq.1.0 and E.sub.n =field strength at the n.sup.- n junction. The effect of this measure is that the geometric conditions of the edge chamfering are less stringent. The edge can also be shaped by means of conventional etching processes.
摘要翻译：为了改善仅在一个极性（二极管，反向导通晶闸管和不对称晶闸管）吸收高反向电压所需的半导体元件的动态特性，在许多情况下使用具有由两层组成的n基极的结构。为了提高反向电压能力，提出在具有至少一个pn-n层序列的半导体部件中，选择厚度（S）和n停止层（4）的掺杂以下适用的方式：其中e =基本电荷，ε=半导体的介电常数，ND =供体浓度，X =路径坐标，0.8

7. 发明授权

US5093693A PN-junction with guard ring 失效
标题翻译： PN-JUNCTION WITH GUARD RING
公开(公告)号：US5093693A
公开(公告)日：1992-03-03
申请号：US647207
申请日：1991-01-28
申请人： Christian C. Abbas , Peter Roggwiller , Jan Voboril
发明人： Christian C. Abbas , Peter Roggwiller , Jan Voboril
IPC分类号： H01L29/744 , H01L21/266 , H01L21/329 , H01L29/06 , H01L29/74 , H01L29/749 , H01L29/861
CPC分类号： H01L29/0615 , H01L21/266 , H01L29/0619 , H01L29/8611
摘要： In a semiconductor component, a pn junction which emerges at a main surface (2) of a semiconductor substrate (1) at the edge of a highly doped zone (3) is formed by a laterally bounded, highly doped zone (3) extending inwards from a main surface (2) of the semiconductor substrate (1) and by a lightly doped zone surrounding the highly doped zone. The edge of the highly doped zone (3) is formed by a guard zone (6b) whose doping density gradually decreases in a direction parallel to the main surface (2) from the highly doped zone (3) towards the pn junction. Any surface breakdown of the pn junction is prevented by the fact that the guard zone (6b) has a maximum penetration depth near the highly doped zone (3) and that the maximum penetration depth of the guard zone (6b) is greater than the penetration depth of the adjacent highly doped zone (3). The guard zone (6b) has a maximum doping density which does not appreciably exceed 10.sup.15 cm.sup.-3, a width which is comparable with a thickness of the slightly doped zone and a maximum penetration depth which is between 40 .mu.m and 80 .mu.m. The doping density of the guard zone (6b) decreases approximately linearly or stepwise in a direction parallel to the main surface (2).
摘要翻译：在半导体部件中，在高掺杂区域（3）的边缘处出现在半导体衬底（1）的主表面（2）处的pn结通过向内延伸的横向有界的高掺杂区域（3）形成从半导体衬底（1）的主表面（2）和围绕高掺杂区的轻掺杂区域。高掺杂区域（3）的边缘由保护区（6b）形成，其保护区（6b）的掺杂密度在从高掺杂区（3）朝向pn结平行于主表面（2）的方向上逐渐减小。由于保护区（6b）在高掺杂区（3）附近具有最大穿透深度，并且防护区（6b）的最大穿透深度大于穿透深度的事实，防止了pn结的任何表面击穿相邻的高掺杂区（3）的深度。保护区（6b）具有不超过1015cm-3的最大掺杂密度，与稍微掺杂区的厚度相当的宽度和介于40μm到80μm之间的最大穿透深度。保护区（6b）的掺杂密度在平行于主表面（2）的方向上大致直线或逐步地减小。

8. 发明授权

US4961099A High-power GTO thyristor and also a method for its manufacture 失效
标题翻译：大功率GTO晶闸管及其制造方法
公开(公告)号：US4961099A
公开(公告)日：1990-10-02
申请号：US308534
申请日：1989-02-10
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/74 , H01L29/08 , H01L29/36 , H01L29/744
CPC分类号： H01L29/0834 , H01L29/36
摘要： In a high-power GTO thyristor with anode short-circuits (7) in the anode-side p-type emitter layer (6), the triggering sensitivity is improved by an additional thin and lightly doped p.sup.- -type barrier layer (9) between the anode short-circuits (7) and the n-type base layer (5) without the turn-off process being negatively affected.
摘要翻译：在阳极侧p型发射极层（6）中具有阳极短路（7）的大功率GTO晶闸管中，通过附加的薄且轻掺杂的p型势垒层（9）来提高触发灵敏度，在阳极短路（7）和n型基极层（5）之间没有关断过程受到不利影响。

9. 发明授权

US4910573A Gate turn-off thyristor and method of producing same 失效
标题翻译：闸极截流晶闸管及其制造方法
公开(公告)号：US4910573A
公开(公告)日：1990-03-20
申请号：US177489
申请日：1988-04-04
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/08 , H01L29/36 , H01L29/74 , H01L29/744
CPC分类号： H01L29/744 , H01L29/0839 , H01L29/36
摘要： A gate turn-off thyristor (GTO) having a semi-conductor substrate (1) with at least one p-conducting anode layer (4), one n-type base layer (6), one p-type base layer (7) which is in electrical contact with a gate, and one n-conducting cathode layer (8) has a cathode layer (8) with a highly doped zone (10) acting as n.sup.+ emitter and a lightly doped zone (9). The highly doped zone (10) adjoins the surface of the semi-conductor substrate (1) and has a doping density which is at least an order of magnitude higher than that of the p-type base layer (7). The lightly doped zone (9) is situated between a pn junction J.sub.1, produced by the p-type base layer (7) and the cathode layer (8), and the highly doped zone (10) of the cathode layer (8). In a preferred embodiment of the invention, the highly doped zone (10) is so structured that the lightly doped zone (9) extends, in a GTO with mesa structure, from the pn junction J.sub.1 to the surface of the semi-conductor substrate (1) in a central strip (5) of the cathode fingers (2). A method for producing GTO's according to the invention is furthermore specified.
摘要翻译：一种具有至少一个p导电阳极层（4），一个n型基极层（6），一个p型基极层（7）的半导体衬底（1）的栅极截止晶闸管（GTO）其与栅极电接触，并且一个n导电阴极层（8）具有阴极层（8），其具有用作n +发射极的高掺杂区（10）和轻掺杂区（9）。高掺杂区域（10）与半导体衬底（1）的表面相邻并且具有比p型基底层（7）的掺杂密度高至少一个数量级的掺杂密度。轻掺杂区域（9）位于由p型基极层（7）和阴极层（8）产生的pn结J1和阴极层（8）的高掺杂区域（10）之间。在本发明的优选实施例中，高掺杂区（10）的结构使得轻掺杂区（9）在具有台面结构的GTO中从pn结J1延伸到半导体衬底的表面 1）在阴极指（2）的中心条（5）中。进一步说明本发明的GTO的制造方法。

10. 发明授权

US4768075A Power semiconductor module 失效
标题翻译：功率半导体模块
公开(公告)号：US4768075A
公开(公告)日：1988-08-30
申请号：US924739
申请日：1986-10-30
申请人： Bruno Broich , Jens Gobrecht , Peter Roggwiller
发明人： Bruno Broich , Jens Gobrecht , Peter Roggwiller
IPC分类号： H01L23/32 , H01L21/8249 , H01L25/18 , H01L27/06 , H01L25/08
CPC分类号： H01L25/18 , H01L24/34 , H01L2924/12035 , H01L2924/1301 , H01L2924/1306 , H01L2924/13091
摘要： A power semiconductor module including a cascade circuit of a low-voltage high-current MOSFET and of a bipolar semiconductor element, for example a field-controlled thyristor, GTO thyristor or Darlington transistor, as a hybrid combination. In this manner, it is possible to achieve a construction, which exhibits low induction and which saves space and which at the same time permits efficient cooling of the module.
摘要翻译：作为混合组合，包括低压大电流MOSFET的级联电路和双极半导体元件的功率半导体模块，例如场控晶闸管，GTO晶闸管或达林顿晶体管。以这种方式，可以实现具有低感应性并且节省空间并且同时允许模块的有效冷却的结构。

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