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1. 发明授权

US06767828B2 Method for forming patterns for semiconductor devices 有权
标题翻译：用于形成半导体器件的图案的方法
公开(公告)号：US06767828B2
公开(公告)日：2004-07-27
申请号：US09971953
申请日：2001-10-05
申请人： Paul S. Andry , John C. Flake , Bruno Michel , Takatoshi Tsujimura
发明人： Paul S. Andry , John C. Flake , Bruno Michel , Takatoshi Tsujimura
IPC分类号： H01L2144
CPC分类号： H01L28/60 , H01L21/288 , H01L21/76841 , H01L28/55 , H01L2924/0002 , H05K3/182 , H05K3/389 , Y10T428/24926 , H01L2924/00
摘要： A method for forming an electrically conductive layer having predetermined patterns for semiconductor devices includes providing a substrate, forming an insulation layer having OH functional groups on the substrate, forming a patterned polymer layer on the insulation layer, etching the insulation layer to create a patterned insulation layer which has the same patterns as the patterned polymer layer, stripping the patterned polymer layer to expose the patterned insulation layer, treating the patterned insulation layer with a coupling agent which reacts with the OH functional groups, treating the patterned insulation layer with a catalyst-containing solution in which the catalyst reacts with the coupling agent, and depositing electrically conductive material on the patterned insulation layer which is catalytically active.
摘要翻译：一种用于形成具有用于半导体器件的具有预定图案的导电层的方法包括提供衬底，在衬底上形成具有OH官能团的绝缘层，在绝缘层上形成图案化聚合物层，蚀刻绝缘层以产生图案绝缘层，其具有与图案化聚合物层相同的图案，剥离图案化的聚合物层以暴露图案化绝缘层，用与OH官能团反应的偶联剂处理图案化绝缘层，用催化剂层处理图案化绝缘层，其中催化剂与偶联剂反应，并且将导电材料沉积在具有催化活性的图案化绝缘层上。

2. 发明授权

US07989347B2 Process for filling recessed features in a dielectric substrate 有权
标题翻译：用于在电介质基板中填充凹陷特征的工艺
公开(公告)号：US07989347B2
公开(公告)日：2011-08-02
申请号：US12295465
申请日：2006-03-30
申请人： John C. Flake
发明人： John C. Flake
IPC分类号： H01L21/44
CPC分类号： H01L21/2885 , H01L21/76877
摘要： A process for filling recessed features of a dielectric substrate for a semiconductor device, comprises the steps (a) providing a dielectric substrate having a recessed feature in a surface thereof, wherein the smallest dimension (width) across said feature is less than ≦200 nm, a conductive layer being present on at least a portion of said surface, (b) filling said recessed feature with a conductive material, and (c) prior to filling said recessed feature with said conductive material, treating said surface with an accelerator.
摘要翻译：一种用于填充用于半导体器件的电介质衬底的凹陷特征的方法，包括以下步骤：（a）在其表面中提供具有凹陷特征的电介质衬底，其中所述特征上的最小尺寸（宽度）小于n1E; 200 nm，导电层存在于所述表面的至少一部分上，（b）用导电材料填充所述凹陷特征，以及（c）在用所述导电材料填充所述凹陷特征之前，用加速器处理所述表面。

3. 发明授权

US07188630B2 Method to passivate conductive surfaces during semiconductor processing 失效
标题翻译：在半导体加工过程中钝化导电表面的方法
公开(公告)号：US07188630B2
公开(公告)日：2007-03-13
申请号：US10431053
申请日：2003-05-07
申请人： John C. Flake , Kevin E. Cooper , Saifi Usmani
发明人： John C. Flake , Kevin E. Cooper , Saifi Usmani
IPC分类号： B08B6/00 , C25F1/00 , C25F3/30 , C25F5/00
CPC分类号： C11D3/28 , C11D1/146 , C11D1/345 , C11D1/62 , C11D1/72 , C11D3/0073 , C11D3/2003 , C11D3/382 , C11D3/43 , C11D11/0047 , H01L21/02074 , H01L21/3212 , H01L21/7684
摘要： A method for processing semiconductor wafers is disclosed. A solution is applied to a semiconductor wafer to prevent dendrites and electrolytic reactions at the surface of metal interconnects. The solution can be applied during a CMP process or during a post CMP cleaning process. The solution may include a surfactant and a corrosion inhibitor. In one embodiment, the concentration of the surfactant in the solution is less than approximately one percent by weight and the concentration of the corrosion inhibitor in the solution is less than approximately one percent by weight. The solution may also include a solvent and a cosolvent. In an alternate embodiment, the solution includes a solvent and a cosolvent without the surfactant and corrosion inhibitor. In one embodiment, the CMP process and post CMP cleaning process can be performed in the presence of light having a wavelength of less than approximately one micron.
摘要翻译：公开了一种处理半导体晶片的方法。将解决方案应用于半导体晶片以防止金属互连表面处的枝晶和电解反应。该解决方案可以在CMP过程中或CMP后清洗过程中应用。溶液可以包括表面活性剂和腐蚀抑制剂。在一个实施方案中，溶液中表面活性剂的浓度小于约1重量％，并且溶液中腐蚀抑制剂的浓度小于约1重量％。溶液还可以包括溶剂和助溶剂。在另一个实施方案中，溶液包括溶剂和没有表面活性剂和腐蚀抑制剂的助溶剂。在一个实施例中，可以在具有小于约一微米的波长的光的存在下执行CMP工艺和后CMP清洁工艺。

4. 发明授权

US06838354B2 Method for forming a passivation layer for air gap formation 有权
标题翻译：形成气隙形成钝化层的方法
公开(公告)号：US06838354B2
公开(公告)日：2005-01-04
申请号：US10327403
申请日：2002-12-20
申请人： Cindy K. Goldberg , Stanley Michael Filipiak , John C. Flake , Yeong-Jyh T. Lii , Bradley P. Smith , Yuri E. Solomentsev , Terry G. Sparks , Kirk J. Strozewski , Kathleen C. Yu
发明人： Cindy K. Goldberg , Stanley Michael Filipiak , John C. Flake , Yeong-Jyh T. Lii , Bradley P. Smith , Yuri E. Solomentsev , Terry G. Sparks , Kirk J. Strozewski , Kathleen C. Yu
IPC分类号： H01L21/288 , H01L21/768 , H01L21/76
CPC分类号： H01L21/76844 , H01L21/288 , H01L21/7682 , H01L21/76849 , H01L21/76874
摘要： Dummy features (64, 65, 48a, 48b) are formed within an interlevel dielectric layer (36). Passivation layers (32 and 54) are formed by electroless deposition to protect the underlying conductive regions (44, 48a, 48b and 30) from being penetrated from the air gaps (74). In addition, the passivation layers (32 and 54) overhang the underlying conductive regions (44, 48a, 48b and 30), thereby defining dummy features (65a, 65b and 67) adjacent the conductive regions (48a, 44 and 48b). The passivation layers (32 and 54) can be formed without additional patterning steps and help minimize misaligned vias from puncturing air gaps.

5. 发明授权

US07456105B1 CMP metal polishing slurry and process with reduced solids concentration 失效
标题翻译： CMP金属抛光浆料和固体浓度降低的工艺
公开(公告)号：US07456105B1
公开(公告)日：2008-11-25
申请号：US10321973
申请日：2002-12-17
申请人： Kevin Elliot Cooper , Jennifer Lynn Cooper , Janos Farkas , John C. Flake , Johannes Friedrich Groschopf , Yuri Solomentsev
发明人： Kevin Elliot Cooper , Jennifer Lynn Cooper , Janos Farkas , John C. Flake , Johannes Friedrich Groschopf , Yuri Solomentsev
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/3212 , C09G1/02
摘要： This disclosure describes a low particle concentration formulation for slurry which is particularly useful in continuous CMP polishing of copper layers during semiconductor wafer manufacture. The slurry is characterized by particle concentrations generally less than 2 wt %, and advantageously less than 1 wt %. In particular embodiments, where the particle concentration is in a range of 50 to 450 PPM, an 8-fold increase in polishing rate over reactive liquid slurries has been realized. Slurries thus formulated also achieve a reduction in defectivity and in the variations in planarity from wafer to wafer during manufacture, by improving the stability of polishing quality. The slurry formulations permit substantial cost savings over traditional 2-component, reactive liquid and fixed/bonded abrasive slurries. In addition the formulations provides an advantageous way during CMP to easily change the selectivity or rate of removal of one film material vs. another. Yet another use is to provide slurry “pulsing” as a means to activate bonded abrasive or fixed abrasive slurry technology.
摘要翻译：本公开内容描述了用于浆料的低颗粒浓度配方，其特别适用于半导体晶片制造过程中铜层的连续CMP抛光。浆料的特征在于颗粒浓度通常小于2重量％，有利地小于1重量％。在特定实施方案中，其中颗粒浓度在50至450PPM的范围内，抛光速率比反应性液体浆料高8倍。因此，通过提高抛光质量的稳定性，由此制成的浆料也可以在制造过程中实现缺陷率的降低和从晶片到晶片的平面度的变化。与传统的2组分反应性液体和固定/粘结的磨料浆料相比，浆料配方可节省大量成本。此外，制剂在CMP期间提供有利的方式以容易地改变一种膜材料相对于另一种膜材料的选择性或速率。另一种用途是提供浆料“脉冲”作为活化粘合磨料或固定磨料浆料技术的手段。

6. 发明授权

US07387970B2 Method of using an aqueous solution and composition thereof 有权
标题翻译：使用水溶液的方法及其组合物
公开(公告)号：US07387970B2
公开(公告)日：2008-06-17
申请号：US10430987
申请日：2003-05-07
申请人： Kevin E. Cooper , John C. Flake , Johannes Groschopf , Yuri E. Solomentsev
发明人： Kevin E. Cooper , John C. Flake , Johannes Groschopf , Yuri E. Solomentsev
IPC分类号： H01L21/304 , H01L21/306 , C23F1/14
CPC分类号： C09G1/02 , B24B37/24 , C09K3/1463 , H01L21/30625
摘要： A method for processing semiconductor wafers is disclosed. A semiconductor wafer is provided to a semiconductor processing stage where a block copolymer surfactant (BCS) is applied to the wafer surface. In one embodiment, the BCS includes a hydrophobic portion and a hydrophilic portion. Alternatively, the BCS may be a silicone-containing BCS. In one embodiment, the BCS is within an aqueous solution where the concentration of the BCS within the aqueous solution is less than one percent by weight. Also disclosed is an aqueous solution including abrasive particles and a BCS having a hydrophobic portion and a hydrophilic portion. The abrasive particles may include silica, alumina, or ceria.
摘要翻译：公开了一种处理半导体晶片的方法。半导体晶片被提供到半导体处理阶段，其中将嵌段共聚物表面活性剂（BCS）施加到晶片表面。在一个实施方案中，BCS包括疏水部分和亲水部分。或者，BCS可以是含硅氧烷的BCS。在一个实施方案中，BCS在水溶液中，其中水溶液中BCS的浓度小于1重量％。还公开了包含研磨颗粒和具有疏水部分和亲水部分的BCS的水溶液。研磨颗粒可以包括二氧化硅，氧化铝或二氧化铈。

7. 发明授权

US07579279B2 Method to passivate conductive surfaces during semiconductor processing 有权
标题翻译：在半导体加工过程中钝化导电表面的方法
公开(公告)号：US07579279B2
公开(公告)日：2009-08-25
申请号：US11670176
申请日：2007-02-01
申请人： John C. Flake , Kevin E. Cooper , Saifi Usmani
发明人： John C. Flake , Kevin E. Cooper , Saifi Usmani
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： C11D3/28 , C11D1/146 , C11D1/345 , C11D1/62 , C11D1/72 , C11D3/0073 , C11D3/2003 , C11D3/382 , C11D3/43 , C11D11/0047 , H01L21/02074 , H01L21/3212 , H01L21/7684
摘要： A method for processing semiconductor wafers is disclosed. A solution is applied to a semiconductor wafer to prevent dendrites and electrolytic reactions at the surface of metal interconnects. The solution can be applied during a CMP process or during a post CMP cleaning process. The solution may include a surfactant and a corrosion inhibitor. In one embodiment, the concentration of the surfactant in the solution is less than approximately one percent by weight and the concentration of the corrosion inhibitor in the solution is less than approximately one percent by weight. The solution may also include a solvent and a cosolvent. In an alternate embodiment, the solution includes a solvent and a cosolvent without the surfactant and corrosion inhibitor. In one embodiment, the CMP process and post CMP cleaning process can be performed in the presence of light having a wavelength of less than approximately one micron.
摘要翻译：公开了一种处理半导体晶片的方法。将解决方案应用于半导体晶片以防止金属互连表面处的枝晶和电解反应。该解决方案可以在CMP过程中或CMP后清洗过程中应用。溶液可以包括表面活性剂和腐蚀抑制剂。在一个实施方案中，溶液中表面活性剂的浓度小于约1重量％，并且溶液中腐蚀抑制剂的浓度小于约1重量％。溶液还可以包括溶剂和助溶剂。在另一个实施方案中，溶液包括溶剂和没有表面活性剂和腐蚀抑制剂的助溶剂。在一个实施例中，可以在具有小于约一微米的波长的光的存在下执行CMP工艺和后CMP清洁工艺。

8. 发明授权

US06620719B1 Method of forming ohmic contacts using a self doping layer for thin-film transistors 有权
标题翻译：使用薄膜晶体管的自掺杂层形成欧姆接触的方法
公开(公告)号：US06620719B1
公开(公告)日：2003-09-16
申请号：US09540350
申请日：2000-03-31
申请人： Paul Stephen Andry , Evan George Colgan , John C. Flake , Peter Fryer , William Graham , Eugene O'Sullivan
发明人： Paul Stephen Andry , Evan George Colgan , John C. Flake , Peter Fryer , William Graham , Eugene O'Sullivan
IPC分类号： H01L2144
CPC分类号： H01L29/66757 , H01L29/41733 , H01L29/458 , H01L29/66765
摘要： A method for forming ohmic contacts for semiconductor devices, in accordance with the present invention, includes forming a layer containing metal which includes dopants integrally formed therein. The layer containing metal is patterned to form components for a semiconductor device, and a semiconductor layer is deposited for contacting the layer containing metal. The semiconductor device is annealed to outdiffuse dopants from the layer containing metal into the semiconductor layer to form ohmic contacts therebetween.
摘要翻译：根据本发明的用于形成用于半导体器件的欧姆接触的方法包括形成包含一体形成在其中的掺杂剂的金属层。图案化含有金属的层以形成用于半导体器件的部件，并且沉积半导体层以接触含金属层。半导体器件被退火以从含有金属层的掺杂剂扩散到半导体层中以在其间形成欧姆接触。

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