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1. 发明授权

US07221300B2 Digital-to-analog converter data rate reduction by interleaving and recombination through mixer switching 有权
标题翻译：数模转换器数据速率降低通过交错和混合通过混频器切换
公开(公告)号：US07221300B2
公开(公告)日：2007-05-22
申请号：US10851365
申请日：2004-05-21
申请人： Paul A. Fontaine , Ranjit Gharpurey , Anuj Batra , Jaiganesh Balakrishnan
发明人： Paul A. Fontaine , Ranjit Gharpurey , Anuj Batra , Jaiganesh Balakrishnan
IPC分类号： H03M1/00
CPC分类号： H03M1/662 , H04B1/71635
摘要： A system and method implement very high data rate baseband DACs suitable for wireless applications related to new standards (e.g. Ultra-Wide Band) using CMOS processes allowing an integrated solution with the deep-submicron CMOS digital baseband. A single CMOS block working at full speed is discarded in favor of several blocks, each working at a fraction of the original data rate.
摘要翻译：一种系统和方法实现了适用于与新标准（例如超宽带）相关的无线应用的非常高数据速率的基带DAC，其使用允许具有深亚微米CMOS数字基带的集成解决方案的CMOS工艺。以全速工作的单个CMOS块被丢弃，有利于几个块，每个块以原始数据速率的一小部分工作。

2. 发明授权

US07440491B2 Ultra-wideband communications system devices 有权
标题翻译：超宽带通信系统设备
公开(公告)号：US07440491B2
公开(公告)日：2008-10-21
申请号：US10759480
申请日：2004-01-16
申请人： Jaiganesh Balakrishnan , Anuj Batra , Anand G. Dabak , Abdellatif Bellaouar , Paul H. Fontaine , Michel Frechette , Ranjit Gharpurey , Heng-Chih Lin
发明人： Jaiganesh Balakrishnan , Anuj Batra , Anand G. Dabak , Abdellatif Bellaouar , Paul H. Fontaine , Michel Frechette , Ranjit Gharpurey , Heng-Chih Lin
IPC分类号： H04B1/00
CPC分类号： H04B1/719 , H04B1/71635 , H04B1/71637
摘要： System for ultra-wideband communications providing high data rates over an extended operating range in the presence of interferers. A preferred embodiment comprises an ultra-wideband (UWB) device that makes use of a portion of the UWB frequency range to help provide good performance in the presence of interferers. Additionally, since only a portion of the UWB frequency range is used, multiple devices can simultaneously transmit and receive by using different portions of the UWB frequency range.
摘要翻译：用于在存在干扰源的情况下在扩展工作范围内提供高数据速率的超宽带通信系统。优选实施例包括利用UWB频率范围的一部分来帮助在存在干扰源的情况下提供良好性能的超宽带（UWB）设备。此外，由于仅使用UWB频率范围的一部分，所以多个设备可以通过使用UWB频率范围的不同部分同时发送和接收。

3. 发明授权

US07756002B2 Time-frequency interleaved orthogonal frequency division multiplexing ultra wide band physical layer 有权
标题翻译：时频交织正交频分复用超宽带物理层
公开(公告)号：US07756002B2
公开(公告)日：2010-07-13
申请号：US10688169
申请日：2003-10-18
申请人： Anuj Batra , Jaiganesh Balakrishnan , Anand G. Dabak , Ranjit Gharpurey , Paul H. Fontaine , Heng-Chih Lin
发明人： Anuj Batra , Jaiganesh Balakrishnan , Anand G. Dabak , Ranjit Gharpurey , Paul H. Fontaine , Heng-Chih Lin
IPC分类号： H04J11/00
CPC分类号： H04B1/7163 , H04L1/0041 , H04L1/0069 , H04L1/0071 , H04L1/0075 , H04L27/2602
摘要： A PHY entity for a UWB system utilizes the unlicensed 3.1-10.6 GHZ UWB band, as regulated in the United States by the Code of Federal Regulation, Title 47, Section 15. The UWB system provides a wireless pico area network (PAN) with data payload communication capabilities of 55, 80, 110, 160, 200, 320 and 480 Mb/s. The UWB system employs orthogonal frequency division multiplexing (OFDM) and uses a total of 122 sub-carriers that are modulated using quadrature phase shift keying (QPSK). Forward error correction coding (convolutional coding) is used with a coding rate of 11/32, 1/2, 5/8 and 3/4.
摘要翻译： UWB系统的PHY实体利用美国由“联邦法规”第47章第15节规定的未经授权的3.1-10.6 GHZ UWB频带。UWB系统提供无线微微区域网络（PAN）与数据有效载荷通信能力为55,80,110,160,200,320和480 Mb / s。 UWB系统采用正交频分复用（OFDM），并且使用使用正交相移键控（QPSK）调制的总共122个子载波。前向纠错编码（卷积编码）的编码率为11/32，1/2，5/8和3/4。

4. 发明申请

US20050258992A1 Digital-to-analog converter data rate reduction by interleaving and recombination through mixer switching 有权
标题翻译：数模转换器数据速率降低通过交错和混合通过混频器切换
公开(公告)号：US20050258992A1
公开(公告)日：2005-11-24
申请号：US10851365
申请日：2004-05-21
申请人： Paul Fontaine , Ranjit Gharpurey , Anuj Batra , Jaiganesh Balakrishnan
发明人： Paul Fontaine , Ranjit Gharpurey , Anuj Batra , Jaiganesh Balakrishnan
IPC分类号： H03M1/66 , H04B1/69
CPC分类号： H03M1/662 , H04B1/71635
摘要： A system and method implement very high data rate baseband DACs suitable for wireless applications related to new standards (e.g. Ultra-Wide Band) using CMOS processes allowing an integrated solution with the deep-submicron CMOS digital baseband. A single CMOS block working at full speed is discarded in favor of several blocks, each working at a fraction of the original data rate.
摘要翻译：一种系统和方法实现了适用于与新标准（例如超宽带）相关的无线应用的非常高数据速率的基带DAC，其使用允许具有深亚微米CMOS数字基带的集成解决方案的CMOS工艺。以全速工作的单个CMOS块被丢弃，有利于几个块，每个块以原始数据速率的一小部分工作。

5. 发明授权

US06876262B2 Technique for generating carrier frequencies with fast hopping capability 有权
标题翻译：用于产生具有快速跳变能力的载波频率的技术
公开(公告)号：US06876262B2
公开(公告)日：2005-04-05
申请号：US10626924
申请日：2003-07-25
申请人： Ranjit Gharpurey , Anuj Batra , Jaiganesh Balakrishnan , Anand G. Dabak
发明人： Ranjit Gharpurey , Anuj Batra , Jaiganesh Balakrishnan , Anand G. Dabak
IPC分类号： H03L7/00 , H03L7/16 , H03L7/18 , H04B1/40 , H04B1/69 , H04L27/00
CPC分类号： H04L27/0014 , H03L7/18 , H04B1/406 , H04B1/7136 , H04L2027/0016 , H04L2027/0053
摘要： A technique for generating carrier frequencies with fast hopping capability associated with multiband systems for ultra wideband applications. The technique employs a single VCO 20 that is locked in a PLL 30. The output of this VCO 20 is divided in the frequency domain. The divided frequencies thus obtained are combined in a single-sideband manner to obtain various other frequencies. The single-sideband combination requires open loop operations such as multiplication and addition or subtraction to implement, and hence is very fast. The VCO center frequency is not disturbed in the process. Since the required frequencies are generated in an open-loop fashion, instead of inside a PLL, the speed is increased by orders of magnitude.
摘要翻译：用于产生具有与用于超宽带应用的多频带系统相关联的具有快速跳变能力的载波频率的技术。该技术采用锁定在PLL 30中的单个VCO 20。该VCO 20的输出在频域中被划分。这样获得的划分频率以单边带方式组合以获得各种其它频率。单边带组合需要开环操作，例如乘法和加法或减法来实现，因此非常快。 VCO中心频率在此过程中不受干扰。由于所需的频率是以开环方式产生的，而不是在PLL内部，速度增加了数量级。

6. 发明授权

US07376174B2 Rake receiver architecture for an ultra-wideband (UWB) receiver 有权
标题翻译：用于超宽带（UWB）接收机的耙式接收器架构
公开(公告)号：US07376174B2
公开(公告)日：2008-05-20
申请号：US10335803
申请日：2003-01-02
申请人： Anuj Batra , Anand G. Dabak , Ranjit Gharpurey
发明人： Anuj Batra , Anand G. Dabak , Ranjit Gharpurey
IPC分类号： H04B1/69
CPC分类号： H04B1/719 , H04B1/71637
摘要： System and method for combining maximizing a received signal in a multipath environment. A preferred embodiment comprises a rake receiver (for example, rake receiver 1100), created from switched capacitors, with N fingers. Each of the fingers is coupled to a signal input for a period of time to accumulate a charge on a storing capacitor (for example, storing capacitor 1115). The charges stored on the storing capacitors can then be read-out to produce a value. The rake receiver can implement either equal ratio combining or maximum gain combining to further improve received signal strength.
摘要翻译：用于组合在多径环境中最大化接收信号的系统和方法。优选实施例包括由N个手指开关的切换电容器产生的瑞克接收器（例如，瑞克接收器1100）。每个手指耦合到信号输入一段时间以在存储电容器（例如，存储电容器1115）上积累电荷。然后可以读出存储在存储电容器上的电荷以产生一个值。耙式接收机可以实现等比组合或最大增益组合，以进一步提高接收信号强度。

7. 发明授权

US07397870B2 Ultra-wideband (UWB) receiver 有权
标题翻译：超宽带（UWB）接收机
公开(公告)号：US07397870B2
公开(公告)日：2008-07-08
申请号：US10335769
申请日：2003-01-02
申请人： Anuj Batra , Anand G. Dabak , Ranjit Gharpurey
发明人： Anuj Batra , Anand G. Dabak , Ranjit Gharpurey
IPC分类号： H03D1/00
CPC分类号： H04B1/7183 , H04B1/71637
摘要： System and method for maximizing a signal strength of a received signal pulse. A preferred embodiment comprises a self-adjusting correlator/integrator (for example, correlator/integrator 325) that uses no historical timing information. The self-adjusting correlator/integrator uses a plurality of simple correlators/integrators (for example, correlator/integrator 805) which are configured to process a received signal at various times surrounding the signal pulse's expected arrival. A comparator (for example, comparator 820) selects an output of the simple correlators/integrators with greatest magnitude.
摘要翻译：用于最大化接收信号脉冲的信号强度的系统和方法。优选实施例包括不调整历史定时信息的自调整相关器/积分器（例如，相关器/积分器325）。自调整相关器/积分器使用多个简单相关器/积分器（例如，相关器/积分器805），其被配置为在围绕信号脉冲的预期到达的各种时间处理接收信号。比较器（例如，比较器820）选择具有最大幅度的简单相关器/积分器的输出。

8. 发明授权

US06985532B2 Ultra wideband (UWB) transmitter architecture 有权
标题翻译：超宽带（UWB）发射机架构
公开(公告)号：US06985532B2
公开(公告)日：2006-01-10
申请号：US10335717
申请日：2003-01-02
申请人： Anuj Batra , Anand G. Dabak , Ranjit Gharpurey
发明人： Anuj Batra , Anand G. Dabak , Ranjit Gharpurey
IPC分类号： H04B14/06
CPC分类号： H04B1/7174
摘要： System and method for analog signal generation and manipulation in an ultra-wideband (UWB) transmitter. A preferred embodiment comprises a digital portion 305 of an UWB transmitter (for example, transmitter 300), which is responsible for encoding a data stream to be transmitted, and an analog portion 330. The analog portion 330 creates a stream of short duration pulses from the encoded data stream and then filters the stream of short duration pulses. To simplify the generation of the short duration pulses, a quantized representation of the short duration pulse is used. The quantized representation is created via the use of control signals that by coupling differential amplifiers together (such as amplifier 611), generate a voltage drop across a resistor (such as resistor 619) and hence, a current.
摘要翻译：用于在超宽带（UWB）发射机中模拟信号产生和操纵的系统和方法。优选实施例包括负责编码要发送的数据流的UWB发射机（例如，发射机300）的数字部分305和模拟部分330。模拟部分330从编码数据流创建短持续时间脉冲流，然后对短持续时间脉冲流进行滤波。为了简化短持续时间脉冲的产生，使用短持续时间脉冲的量化表示。通过使用通过将差分放大器耦合在一起的控制信号（例如放大器611）来产生量化表示，在电阻器（例如电阻器619）上产生电压降，从而产生电流。

9. 发明授权

US07187909B2 Current mode transmitter 有权
标题翻译：电流模式变送器
公开(公告)号：US07187909B2
公开(公告)日：2007-03-06
申请号：US10811704
申请日：2004-03-29
申请人： Heng-Chih Lin , Ranjit Gharpurey , Paul A. Fontaine
发明人： Heng-Chih Lin , Ranjit Gharpurey , Paul A. Fontaine
IPC分类号： H04B1/02 , H04B17/00
CPC分类号： H03F3/24 , H03F3/345 , H04B1/04
摘要： A current-domain transmitter is configured to receive an input signal and provide a transmitted signal. The transmitter has a plurality of elements, operatively arranged between the input signal and the transmitted signal and configured to represent the input signal with respective electric currents whose respective current magnitudes are each substantially proportional to the input signal. The elements may include a current-steering digital-to-analog converter (DAC), a current mode filter (such as an LPF), a current mode mixer, and/or a current mode amplifier.
摘要翻译：当前域发射机被配置为接收输入信号并提供发射信号。发射机具有多个元件，可操作地布置在输入信号和发射信号之间，并被配置为用相应的电流表示输入信号，其各自的电流幅度大致与输入信号成比例。元件可以包括电流转向数模转换器（DAC），电流模式滤波器（例如LPF），电流模式混频器和/或电流模式放大器。

10. 发明授权

US07187917B2 Current interpolation in multi-phase local oscillator for use with harmonic rejection mixer 有权
标题翻译：用于谐波抑制混频器的多相本机振荡器中的电流插值
公开(公告)号：US07187917B2
公开(公告)日：2007-03-06
申请号：US10811584
申请日：2004-03-29
申请人： Heng-Chih Lin , Ranjit Gharpurey
发明人： Heng-Chih Lin , Ranjit Gharpurey
IPC分类号： H04B1/26
CPC分类号： H03B27/00 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/1483 , H03D7/165 , H03D2200/0033 , H03D2200/0086
摘要： A circuit provides a reduced harmonic content output signal OUTA and/or OUTB that is modulated according to an input signal 231. The circuit has an oscillator circuit 210 and a harmonic rejection mixer (HRM) 230. The oscillator circuit 210 includes at least one “circuit portion” (FIG. 2A) configured to receive first and second orthogonal oscillator input signals (two of I, I−, Q, Q−) having respective first and second phases, and to provide an arbitrarily large number of oscillator output signals (φM) having respective mutually distinct phases that are interpolated between the first and second phases. Harmonic rejection mixer 230 is configured to use the input signal to modulate a combination of the oscillator output signals, the oscillator output signals being respectively weighted so as to provide an emulated sinusoidal signal constituting the reduced harmonic content output signal.
摘要翻译：电路提供根据输入信号231调制的减少的谐波含量输出信号OUTA和/或OUTB。电路具有振荡电路210和谐波抑制混频器（HRM）230。振荡器电路210包括至少一个“电路部分”（图2A），其被配置为接收具有相应的第一和第二相位的第一和第二正交振荡器输入信号（I，I，I，Q-中的两个），并且提供任意大量的振荡器输出信号（phiM），其具有在第一和第二相之间插值的各自相互不同的相位。谐波抑制混频器230被配置为使用输入信号来调制振荡器输出信号的组合，振荡器输出信号被分别加权，以便提供构成还原谐波内容输出信号的仿真正弦信号。

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