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1. 发明授权

US4739282A Current bleeder amplifier with positive feedback 失效
标题翻译：具有正反馈的电流放电放大器
公开(公告)号：US4739282A
公开(公告)日：1988-04-19
申请号：US887217
申请日：1986-07-21
申请人： Norman R. Scheinberg
发明人： Norman R. Scheinberg
IPC分类号： H03F1/22 , H03F1/38 , H03F3/345 , H03F3/16
CPC分类号： H03F1/223 , H03F1/38 , H03F3/3455
摘要： An FET amplifier having a current bleeder includes a positive feedback path for increasing the overall gain of the device. The positive feedback path includes an additional FET having its drain source path connected to the current bleeder and its gate connected to the output of the amplifier. The positive feedback causes the current through the current bleeder to vary in direct response to the output of the amplifier, thereby significantly increasing its overall gain.
摘要翻译：具有电流放电器的FET放大器包括用于增加器件的总体增益的正反馈路径。正反馈路径包括附加FET，其漏极源极连接到电流放电器，其栅极连接到放大器的输出端。正反馈使得通过电流放电器的电流与放大器的输出直接响应变化，从而显着增加其总增益。

2. 发明授权

US4743862A JFET current mirror and voltage level shifting apparatus 失效
标题翻译： JFET电流镜和电压电平转换装置
公开(公告)号：US4743862A
公开(公告)日：1988-05-10
申请号：US858797
申请日：1986-05-02
申请人： Norman R. Scheinberg
发明人： Norman R. Scheinberg
IPC分类号： H03F3/345 , H03F3/45 , H03F3/50 , H03F3/16
CPC分类号： H03F3/45076 , H03F3/3455 , H03F3/505
摘要： A JFET current mirror is employed in the voltage level shifting section of an operational amplifier. The JFET current mirror includes a first and second JFET coupled at their gates for conducting current I1 and I2 respectively. The gate of a third JFET is connected to the drain of the first JFET and the source of the third JFET is connected by a plurality of diodes to the gate of the first JFET. Current flowing through the diodes produces a voltage drop across the diodes sufficient to bias the first JFET into saturation so that I2 will track I1. A fixed resistance R in the path of I2 produces a predetermined voltage level shift provided that I1 is constant. Therefore, a voltage applied to one terminal of R is level shifted by a predetermined voltage with respect to the other terminal of R. The voltage shifted output is then coupled to an internal amplifier section and the output buffer section of the operational amplifier.
摘要翻译：在运算放大器的电压电平移动部分中采用JFET电流镜。 JFET电流镜包括分别在其栅极耦合以传导电流I1和I2的第一和第二JFET。第三JFET的栅极连接到第一JFET的漏极，并且第三JFET的源极通过多个二极管连接到第一JFET的栅极。流过二极管的电流产生二极管上的电压降，足以使第一JFET偏置为饱和，使得I2将跟踪I1。 I2的路径中的固定电阻R产生预定的电压电平，只要I1是恒定的。因此，施加到R的一个端子的电压相对于R的另一个端子电平偏移预定的电压。然后将电压偏移输出耦合到运算放大器的内部放大器部分和输出缓冲器部分。

3. 发明授权

US5625307A Low cost monolithic gallium arsenide upconverter chip 失效
标题翻译：低成本单片砷化镓上变频芯片
公开(公告)号：US5625307A
公开(公告)日：1997-04-29
申请号：US845293
申请日：1992-03-03
申请人： Norman R. Scheinberg
发明人： Norman R. Scheinberg
IPC分类号： H03D7/12 , H03D7/14 , H03D7/18 , H03D9/06 , H03B19/00 , H01L25/00 , H04B1/28
CPC分类号： H03F3/45197 , H03D7/125 , H03D7/14 , H03D7/1408 , H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/1491 , H03D9/0675 , H01L2924/0002 , H03D2200/0019 , H03D2200/0025 , H03D2200/0027 , H03D2200/0043 , H03D2200/0084 , H03D7/18 , H03F2203/45228 , H03F2203/45256 , H03F2203/45258 , H03F2203/45458 , H03F2203/45464 , H03F2203/45466
摘要： A monolithic upconverter integrated circuit is described which performs the first frequency conversion of a dual conversion cable television (CATV) receiver. The upconverter chip includes three functional blocks: a Gilbert type image-rejecting mixer, a phase splitter, and a voltage-controlled oscillator. Mixing is performed by a novel Gilbert type mixer including image-rejection inductors to improve the noise figure of the mixer. A differential circuit topology allows the monolithic upconverter chip to utilize a plastic dual inline batwing package without considerable performance loss. On-chip RF bypass networks, in the form of series RC terminations, also help compensate for the undesirable effects of pin inductances in the dual inline package. A resistor-based DC biasing scheme dramatically reduces power-up latency, allowing faster testing.
摘要翻译：描述了执行双转换有线电视（CATV）接收机的第一次频率转换的单片上变频器集成电路。上变频器芯片包括三个功能块：吉尔伯特型图像抑制混频器，分相器和压控振荡器。混合是通过一种新颖的吉尔伯特式混合器进行，包括镜像抑制电感器，以改善混频器的噪声系数。差分电路拓扑结构允许单片上变频器芯片利用塑料双列直插蝙蝠包装，而不会造成相当大的性能损失。以串联RC端接形式的片上RF旁路网络还有助于补偿双列直插封装中引脚电感的不良影响。基于电阻器的直流偏置方案可大大降低上电延迟，从而实现更快的测试。

4. 发明授权

US5563545A Low cost monolithic GaAs upconverter chip 失效
标题翻译：低成本单片GaAs上变频芯片
公开(公告)号：US5563545A
公开(公告)日：1996-10-08
申请号：US312730
申请日：1994-09-27
申请人： Norman R. Scheinberg
发明人： Norman R. Scheinberg
IPC分类号： H03D7/12 , H03D7/14 , H03D7/18 , H03D9/06 , H03K17/16 , H03K17/687
CPC分类号： H03F3/45197 , H03D7/125 , H03D7/14 , H03D7/1408 , H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/1491 , H03D9/0675 , H01L2924/0002 , H03D2200/0019 , H03D2200/0025 , H03D2200/0027 , H03D2200/0043 , H03D2200/0084 , H03D7/18 , H03F2203/45228 , H03F2203/45256 , H03F2203/45258 , H03F2203/45458 , H03F2203/45464 , H03F2203/45466
摘要： A monolithic upconverter integrated circuit is described which performs the first frequency conversion of a dual conversion cable television (CATV) receiver. The upconverter chip includes three functional blocks: a Gilbert type image-rejecting mixer, a phase splitter, and a voltage-controlled oscillator. Mixing is performed by a novel Gilbert type mixer including image-rejection inductors to improve the noise figure of the mixer. A differential circuit topology allows the monolithic upconverter chip to utilize a plastic dual inline batwing package without considerable performance loss. On-chip RF bypass networks, in the form of series RC terminations, also help compensate for the undesirable effects of pin inductances in the dual inline package. A resistor-based DC biasing scheme dramatically reduces power-up latency, allowing faster testing.
摘要翻译：描述了执行双转换有线电视（CATV）接收机的第一次频率转换的单片上变频器集成电路。上变频器芯片包括三个功能块：吉尔伯特型图像抑制混频器，分相器和压控振荡器。混合是通过一种新颖的吉尔伯特式混合器进行，包括镜像抑制电感器，以改善混频器的噪声系数。差分电路拓扑结构允许单片上变频器芯片利用塑料双列直插蝙蝠包装，而不会造成相当大的性能损失。以串联RC端接形式的片上RF旁路网络还有助于补偿双列直插封装中引脚电感的不良影响。基于电阻器的直流偏置方案可大大降低上电延迟，从而实现更快的测试。

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