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1. 发明授权

US5741624A Method for reducing photolithographic steps in a semiconductor interconnect process 失效
公开(公告)号：US5741624A
公开(公告)日：1998-04-21
申请号：US600587
申请日：1996-02-13
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03F1/00 , G03F1/26 , G03F1/29 , G03F1/32 , G03F7/20 , H01L21/027 , H01L21/311 , H01L21/768 , G03F7/26
CPC分类号： G03F1/26 , G03F1/29 , G03F1/32 , G03F7/2022 , H01L21/0274 , H01L21/31144 , H01L21/76813 , H01L2221/1021
摘要： A semiconductor wafer having a first layer and overlying insulating layer receives a photoresist layer. A first photoresist area is exposed to light having a first dosage, while a second, adjacent photoresist area is concurrently exposed to light having a second dosage. The first area and second area then are concurrently developed to partially expose the photoresist layer. The partial exposure removes photoresist within the first area to one depth and within the second area to a second depth. The second depth differs from the first depth. In one embodiment the second depth extends through the photoresist down to the insulating layer. After subsequently performing a contact and/or trench etch through the exposed insulating layer and removing excess photoresist above the insulating layer, conductive material is deposited in the contact/trench opening and over the insulating layer. The result is an upper conductive layer coupled to the first layer via a contact or other conductive connection.

2. 发明授权

US6127096A Method for reducing photolithographic steps in a semiconductor interconnect process 有权
公开(公告)号：US6127096A
公开(公告)日：2000-10-03
申请号：US286285
申请日：1999-04-05
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03F1/00 , G03F1/26 , G03F1/29 , G03F1/32 , G03F7/20 , H01L21/027 , H01L21/311 , H01L21/768
CPC分类号： G03F1/26 , G03F1/29 , G03F1/32 , G03F7/2022 , H01L21/0274 , H01L21/31144 , H01L21/76813 , H01L2221/1021
摘要： A semiconductor wafer having a first layer and overlying insulating layer receives a photoresist layer. A first photoresist area is exposed to light having a first dosage, while a second, adjacent photoresist area is concurrently exposed to light having a second dosage. The first area and second area then are concurrently developed to partially expose the photoresist layer. The partial exposure removes photoresist within the first area to one depth and within the second area to a second depth. The second depth differs from the first depth. In one embodiment, the second depth extends through the photoresist down to the insulating layer. After subsequently performing a contact and/or trench etch through the exposed insulating layer and removing excess photoresist above the insulating layer, conductive material is deposited in the contact/trench opening and over the insulating layer. The result is an upper conductive layer coupled to the first layer via a contact or other conductive connection.

3. 发明授权

US5972569A Method for reducing photolithographic steps in a semiconductor interconnect process 失效
标题翻译：减少半导体互连工艺中的光刻步骤的方法
公开(公告)号：US5972569A
公开(公告)日：1999-10-26
申请号：US946462
申请日：1997-10-07
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03F1/00 , G03F1/26 , G03F1/29 , G03F1/32 , G03F7/20 , H01L21/027 , H01L21/311 , H01L21/768 , G03F7/26
CPC分类号： G03F1/26 , G03F1/29 , G03F1/32 , G03F7/2022 , H01L21/0274 , H01L21/31144 , H01L21/76813 , H01L2221/1021
摘要： A semiconductor wafer having a first layer and overlying insulating layer receives a photoresist layer. A first photoresist area is exposed to light having a first dosage, while a second, adjacent photoresist area is concurrently exposed to light having a second dosage. The first area and second area then are concurrently developed to partially expose the photoresist layer. The partial exposure removes photoresist within the first area to one depth and within the second area to a second depth. The second depth differs from the first depth. In one embodiment the second depth extends through the photoresist down to the insulating layer. After subsequently performing a contact and/or trench etch through the exposed insulating layer and removing excess photoresist above the insulating layer, conductive material is deposited in the contact/trench opening and over the insulating layer. The result is an upper conductive layer coupled to the first layer via a contact or other conductive connection.
摘要翻译：具有第一层和上覆绝缘层的半导体晶片接收光致抗蚀剂层。第一光致抗蚀剂区域暴露于具有第一剂量的光，而第二相邻的光致抗蚀剂区域同时暴露于具有第二剂量的光。然后同时开发第一区域和第二区域以部分地曝光光致抗蚀剂层。部分曝光将第一区域内的光致抗蚀剂移至一个深度并在第二区域内移至第二深度。第二深度与第一深度不同。在一个实施例中，第二深度延伸穿过光致抗蚀剂到达绝缘层。在随后通过暴露的绝缘层进行接触和/或沟槽蚀刻并且去除绝缘层之上的多余的光致抗蚀剂之后，导电材料沉积在接触/沟槽开口中并在绝缘层上方。结果是通过接触或其它导电连接耦合到第一层的上导电层。

4. 发明授权

US06472280B2 Method for forming a spacer for semiconductor manufacture 失效
标题翻译：用于形成用于半导体制造的间隔物的方法
公开(公告)号：US06472280B2
公开(公告)日：2002-10-29
申请号：US09817728
申请日：2001-03-26
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： H01L21336
CPC分类号： H01L29/6659 , H01L21/0337
摘要： Methods for forming self-aligned photosensitive material spacers about protruding structures in semiconductor devices. One embodiment of the invention is a method for forming a LDD structure, utilizing disposable photosensitive material spacers. A second embodiment of the invention includes a method for forming a transistor, having salicided source/drain regions, utilizing photosensitive polyimide spacers for forming the salicided source/drain regions, without disposing of the spacers. A third embodiment of the invention includes a method for creating an offset from a protruding structure on a semiconductor substrate, using disposable photosensitive material spacers.
摘要翻译：用于在半导体器件中形成围绕突出结构的自对准感光材料间隔物的方法。本发明的一个实施例是一种利用一次性感光材料间隔物形成LDD结构的方法。本发明的第二实施例包括一种用于形成具有水银源/漏极区域的晶体管的方法，其利用光敏聚酰亚胺间隔物来形成水银源/漏区，而不处理间隔物。本发明的第三实施例包括使用一次性感光材料间隔件从半导体衬底上的突出结构产生偏移的方法。

5. 发明授权

US06232191B1 Method for forming a spacer for semiconductor manufacture 失效
公开(公告)号：US06232191B1
公开(公告)日：2001-05-15
申请号：US09133718
申请日：1998-08-13
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： H01L2100
CPC分类号： H01L29/6659 , H01L21/0337
摘要： This invention teaches methods and apparatus for forming self-aligned photosensitive material spacers about protruding structures in semiconductor devices. One embodiment of the invention is a method for forming a LDD structure, utilizing disposable photosensitive material spacers. A second embodiment of the invention comprises a method for forming a transistor, having salicided source/drain regions, utilizing photosensitive polyimide spacers for forming the salicided source/drain regions, without disposing of the spacers. A third embodiment of the invention comprises a method for creating an offset from a protruding structure on a semiconductor substrate, using disposable photosensitive material spacers.

6. 发明授权

US06225174B1 Method for forming a spacer using photosensitive material 失效
标题翻译：使用感光材料形成间隔物的方法
公开(公告)号：US06225174B1
公开(公告)日：2001-05-01
申请号：US08661795
申请日：1996-06-13
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03C516
CPC分类号： H01L29/6659 , H01L21/0337
摘要： This invention teaches methods and apparatus for forming self-aligned photosensitive material spacers about protruding structures in semiconductor devices. One embodiment of the invention is a method for forming a lightly doped drain (LDD) structure, utilizing disposable photosensitive material spacers. A second embodiment of the invention comprises a method for forming a transistor, having salicided source/drain regions, utilizing photosensitive polyimide spacers for forming the salicided source/drain regions, without disposing of the spacers. A third embodiment of the invention comprises a method for creating an offset from a protruding structure on a semiconductor substrate, using disposable photosensitive material spacers.
摘要翻译：本发明教导了用于在半导体器件中形成围绕突出结构的自对准感光材料间隔物的方法和装置。本发明的一个实施例是一种利用一次性感光材料间隔物形成轻掺杂漏极（LDD）结构的方法。本发明的第二实施例包括一种用于形成具有水银源/漏区的晶体管的方法，利用光敏聚酰亚胺间隔物形成水银源/漏区，而不处理间隔物。本发明的第三实施例包括使用一次性感光材料间隔件从半导体衬底上的突出结构产生偏移的方法。

7. 发明授权

US06917411B1 Method for optimizing printing of an alternating phase shift mask having a phase shift error 失效
标题翻译：用于优化具有相移误差的交变相移掩模的打印的方法
公开(公告)号：US06917411B1
公开(公告)日：2005-07-12
申请号：US09503553
申请日：2000-02-11
申请人： Christophe Pierrat , Nanseng Jeng
发明人： Christophe Pierrat , Nanseng Jeng
IPC分类号： G03F1/00 , G03F1/26 , G03F1/72 , G03B27/52 , A61N5/00 , G03B27/42 , G03F9/00
CPC分类号： G03F1/72 , G03F1/26 , G03F7/70425
摘要： Optimizing printing of an image from an alternating phase shifting mask having a phase shift error is accomplished using off-axis illumination. By simulating the image using varying off-axis illumination parameters, optimized parameters are selected to compensate for the phase shift error. Once the off-axis illumination parameters are optimized, the image is shot. In addition, the method of varying off-axis illumination parameters to compensate for a phase shift error permits an alternating phase shifting mask to be shot at two different wavelengths.
摘要翻译：使用离轴照明来实现具有相移误差的交替相移掩模的图像的打印优化。通过使用变化的离轴照明参数模拟图像，选择优化的参数来补偿相移误差。一旦偏轴照明参数被优化，就会拍摄图像。此外，改变离轴照明参数以补偿相移误差的方法允许在两个不同波长下拍摄交替的相移掩模。

8. 发明授权

US06432619B1 Method for reducing photolithographic steps in a semiconductor interconnect process 有权
公开(公告)号：US06432619B1
公开(公告)日：2002-08-13
申请号：US09943995
申请日：2001-08-30
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03F720
摘要： A method for forming a photomask including applying photoresist to a semiconductor substrate, exposing a first area of the photoresist to a first dosage of radiation, and exposing a second area of the photoresist to a second dosage of radiation. The first and second areas may be concurrently exposed. First and second regions of the photoresist are then removed to form first and second openings that have different depths in the photoresist. Such removal may be effected by developing the first and second areas of the photoresist. One of the openings may extend down to an insulating layer formed on the semiconductor substrate. A contact and/or trench etch may be performed to remove. a portion of the insulating layer. Conductive material may then be deposited in the opening so formed to form a contact, a via, or another electrically conductive element that communicates with a structure underlying the insulating layer.

9. 发明授权

US06337172B1 Method for reducing photolithographic steps in a semiconductor interconnect process 失效
标题翻译：减少半导体互连工艺中的光刻步骤的方法
公开(公告)号：US06337172B1
公开(公告)日：2002-01-08
申请号：US09675830
申请日：2000-09-29
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03F720
CPC分类号： G03F1/26 , G03F1/29 , G03F1/32 , G03F7/2022 , H01L21/0274 , H01L21/31144 , H01L21/76813 , H01L2221/1021
摘要： A semiconductor wafer having a first layer and overlying insulating layer receives a photoresist layer. A first photoresist area is exposed to light having a first dosage, while a second, adjacent photoresist area is concurrently exposed to light having a second dosage. The first area and second area then are concurrently developed to partially expose the photoresist layer. The partial exposure removes photoresist within the first area to one depth and within the second area to a second depth. The second depth differs from the first depth. In one embodiment, the second depth extends through the photoresist down to the insulating layer. After subsequently performing a contact and/or trench etch through the exposed insulating layer and removing excess photoresist above the insulating layer, conductive material is deposited in the contact/trench opening and over the insulating layer. The result is an upper conductive layer coupled to the first layer via a contact or other conductive connection.
摘要翻译：具有第一层和上覆绝缘层的半导体晶片接收光致抗蚀剂层。第一光致抗蚀剂区域暴露于具有第一剂量的光，而第二相邻的光致抗蚀剂区域同时暴露于具有第二剂量的光。然后同时开发第一区域和第二区域以部分地曝光光致抗蚀剂层。部分曝光将第一区域内的光致抗蚀剂移至一个深度并在第二区域内移至第二深度。第二深度与第一深度不同。在一个实施例中，第二深度延伸穿过光致抗蚀剂到达绝缘层。在随后通过暴露的绝缘层进行接触和/或沟槽蚀刻并且去除绝缘层之上的多余的光致抗蚀剂之后，导电材料沉积在接触/沟槽开口中并在绝缘层上方。结果是通过接触或其它导电连接耦合到第一层的上导电层。

10. 发明授权

US06221564B1 Method for forming a spacer out of photosensitive material 失效
标题翻译：从感光材料形成间隔物的方法
公开(公告)号：US06221564B1
公开(公告)日：2001-04-24
申请号：US09133587
申请日：1998-08-13
申请人： Nanseng Jeng , Christophe Pierrat
发明人： Nanseng Jeng , Christophe Pierrat
IPC分类号： G03C516
CPC分类号： H01L29/6659 , H01L21/0337
摘要： This invention teaches methods and apparatus for forming self-aligned photosensitive material spacers about protruding structures in semiconductor devices. One embodiment of the invention is a method for forming a lightly doped drain (LDD) structure, utilizing disposable photosensitive material spacers. A second embodiment of the invention comprises a method for forming a transistor, having salicided source/drain regions, utilizing photosensitive polyimide spacers for forming the salicided source/drain regions, without disposing of the spacers. A third embodiment of the invention comprises a method for creating an offset from a protruding structure on a semiconductor substrate, using disposable photosensitive material spacers.
摘要翻译：本发明教导了用于在半导体器件中形成围绕突出结构的自对准感光材料间隔物的方法和装置。本发明的一个实施例是一种利用一次性感光材料间隔物形成轻掺杂漏极（LDD）结构的方法。本发明的第二实施例包括一种用于形成具有水银源/漏区的晶体管的方法，利用光敏聚酰亚胺间隔物形成水银源/漏区，而不处理间隔物。本发明的第三实施例包括使用一次性感光材料间隔件从半导体衬底上的突出结构产生偏移的方法。

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