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1. 发明授权

US11646369B2 Silicon carbide semiconductor device having a conductive layer formed above a bottom surface of a well region so as not to be in ohmic connection with the well region and power converter including the same 有权
公开(公告)号：US11646369B2
公开(公告)日：2023-05-09
申请号：US17202347
申请日：2021-03-16
申请人： Mitsubishi Electric Corporation
发明人： Yuichi Nagahisa , Shiro Hino , Koji Sadamatsu , Hideyuki Hatta , Kotaro Kawahara
IPC分类号： H01L29/78 , H01L29/16 , H01L29/417 , H01L29/47 , H02M7/5387 , H01L29/06 , H01L27/06 , H02P27/08 , H01L29/872 , H01L21/8234
CPC分类号： H01L29/7806 , H01L21/8234 , H01L27/06 , H01L29/0619 , H01L29/0696 , H01L29/1608 , H01L29/41741 , H01L29/47 , H01L29/7804 , H01L29/7811 , H02M7/53871 , H01L29/872 , H02P27/08
摘要： In an SiC-MOSFET with a built-in Schottky diode, a bipolar current may be passed in a second well region formed at a terminal part to reduce a breakdown voltage. In the SiC-MOSFET with the built-in Schottky diode, a conductive layer in Schottky connection with the second well region is provided on the second well region in the terminal part, and the conductive layer is electrically connected with a source electrode of the MOSFET. A conductive layer contact hole is provided for connecting only the conductive layer and the source electrode.

2. 发明授权

US10559652B2 Semiconductor device 有权
公开(公告)号：US10559652B2
公开(公告)日：2020-02-11
申请号：US16063733
申请日：2016-11-22
申请人： Mitsubishi Electric Corporation
发明人： Yutaka Fukui , Katsutoshi Sugawara , Shiro Hino , Kazuya Konishi , Kohei Adachi
IPC分类号： H01L29/06 , H01L29/423 , H01L29/417 , H01L29/08 , H01L29/36 , H01L29/16 , H01L29/78 , H01L29/739 , H01L29/10 , H01L21/04 , H01L21/02 , H01L23/544 , H01L29/66
摘要： A gate connection layer (14) includes a portion placed on an outer trench (TO) with a gate insulating film (7) being interposed. A first main electrode (10) includes a main contact (CS) electrically connected to a well region (4) and a first impurity region (5) within an active region (30), and an outer contact (CO) being spaced away from the active region (30) and in contact with a bottom face of the outer trench (TO). A trench-bottom field relaxing region (13) is provided in a drift layer (3). A trench-bottom high-concentration region (18) has an impurity concentration higher than that of the trench-bottom field relaxing region (13), is provided on the trench-bottom field relaxing region (13), and extends from a position where it faces the gate connection layer (14) with the gate insulating film (7) being interposed, to a position where it is in contact with the outer contact (CO) of the first main electrode (10).

3. 发明授权

US09985093B2 Trench-gate type semiconductor device and manufacturing method therefor 有权
公开(公告)号：US09985093B2
公开(公告)日：2018-05-29
申请号：US15439550
申请日：2017-02-22
申请人： MITSUBISHI ELECTRIC CORPORATION
发明人： Yasuhiro Kagawa , Akihiko Furukawa , Shiro Hino , Hiroshi Watanabe , Masayuki Imaizumi
IPC分类号： H01L29/66 , H01L29/06 , H01L29/16 , H01L29/20 , H01L29/417 , H01L29/423 , H01L29/739 , H01L29/78 , H01L29/10
CPC分类号： H01L29/063 , H01L29/0623 , H01L29/0696 , H01L29/1045 , H01L29/105 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/41741 , H01L29/41766 , H01L29/41775 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/6631 , H01L29/66348 , H01L29/66522 , H01L29/66666 , H01L29/66727 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/7827
摘要： There is provided a trench-gate type semiconductor device that can prevent breakdown of a gate insulating film caused by a displacement current flowing into a protective diffusion layer at a portion of a trench underlying a gate electrode at a turn-off time and simultaneously improves a current density by narrowing a cell pitch. The semiconductor device has a gate electrode 7 embedded into a trench 5 penetrating a base region 3. The gate electrode 7 is disposed into a lattice shape in a planar view, and a protective diffusion layer 13 is formed in a drift layer 2a at the portion underlying thereof. At least one of blocks divided by the gate electrode 7 is a protective contact region 20 on which the trench 5 is entirely formed. A protective contact 21 for connecting the protective diffusion layer 13 at a bottom portion of the trench 5 and a source electrode 9 is disposed on the protective contact region 20.

4. 发明授权

US09954072B2 Silicon-carbide semiconductor device and manufacturing method thereof 有权
公开(公告)号：US09954072B2
公开(公告)日：2018-04-24
申请号：US14428840
申请日：2013-09-05
申请人： Mitsubishi Electric Corporation
发明人： Rina Tanaka , Yasuhiro Kagawa , Shiro Hino , Naruhisa Miura , Masayuki Imaizumi
IPC分类号： H01L21/336 , H01L29/66 , H01L29/78 , H01L29/16 , H01L29/10
CPC分类号： H01L29/66068 , H01L21/26586 , H01L29/0623 , H01L29/1095 , H01L29/1608 , H01L29/7813
摘要： A silicon-carbide semiconductor device that relaxes field intensity in a gate insulating film, and that has a low ON-resistance. The silicon-carbide semiconductor device includes: an n-type silicon-carbide substrate; a drift layer formed on a topside of the n-type silicon-carbide substrate; a trench formed in the drift layer and that includes therein a gate insulating film and a gate electrode; a p-type high-concentration well region formed parallel to the trench with a spacing therefrom and that has a depth larger than that of the trench; and a p-type body region formed to have a depth that gradually increases when nearing from a position upward from the bottom end of the trench by approximately the thickness of the gate insulating film at the bottom of the trench toward the lower end of the p-type high-concentration well region.

5. 发明授权

US09214458B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09214458B2
公开(公告)日：2015-12-15
申请号：US14426062
申请日：2013-04-11
申请人： Mitsubishi Electric Corporation
发明人： Shiro Hino , Naruhisa Miura , Masayuki Imaizumi
IPC分类号： H01L27/095 , H01L27/06 , H01L29/872 , H01L29/16
CPC分类号： H01L27/0629 , H01L29/0696 , H01L29/0878 , H01L29/1608 , H01L29/66068 , H01L29/7806 , H01L29/7813 , H01L29/872
摘要： In a semiconductor device having a built-in Schottky barrier diode as a reflux diode, a maximum unipolar current is increased in a reflux state and a leakage current is reduced in an OFF state. A Schottky electrode is provided in at least a part of a surface between adjacent well regions of a second conductivity type disposed on a surface layer side of a drift layer of a first conductivity type, and an impurity concentration of a first conductivity type in a first region provided in a lower part of the Schottky electrode and provided between the adjacent well regions is set to be higher than a first impurity concentration of a first conductivity type in the drift layer and to be lower than a second impurity concentration of a second conductivity type in the well region.
摘要翻译：在具有内置肖特基势垒二极管作为回流二极管的半导体器件中，最大单相电流在回流状态下增加，并且泄漏电流在OFF状态下降低。肖特基电极设置在布置在第一导电类型的漂移层的表面层侧的第二导电类型的相邻阱区域和第一导电类型的第一导电类型的杂质浓度之间的表面的至少一部分中设置在肖特基电极的下部并且设置在相邻阱区之间的区域被设定为高于漂移层中的第一导电类型的第一杂质浓度，并且低于第二导电类型的第二杂质浓度在井区。

6. 发明授权

US11309416B2 Semiconductor device 有权
公开(公告)号：US11309416B2
公开(公告)日：2022-04-19
申请号：US16757766
申请日：2017-12-21
申请人： Mitsubishi Electric Corporation
发明人： Hideyuki Hatta , Shiro Hino , Katsutoshi Sugawara
IPC分类号： H01L29/78 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/423 , H01L29/66 , H01L29/739
摘要： A drift layer has a first conductivity type. A well region has a second conductivity type. A well contact region has a resistivity lower than that of the well region. A source contact region is provided on the well region, separated from the drift layer by the well region, and has the first conductivity type. A source resistance region is provided on the well region, separated from the drift layer by the well region, is adjacent to the source contact region, has the first conductivity type, and has a sheet resistance higher than that of the source contact region. A source electrode contacts the source contact region, the well contact region, and the source resistance region, and is continuous with the channel at least through the source resistance region.

7. 发明授权

US11049931B2 Semiconductor device 有权
公开(公告)号：US11049931B2
公开(公告)日：2021-06-29
申请号：US16717486
申请日：2019-12-17
申请人： Mitsubishi Electric Corporation
发明人： Yutaka Fukui , Katsutoshi Sugawara , Shiro Hino , Kazuya Konishi , Kohei Adachi
IPC分类号： H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/36 , H01L29/417 , H01L29/423 , H01L29/739 , H01L29/78 , H01L21/02 , H01L21/04 , H01L23/544 , H01L29/66
摘要： A gate connection layer (14) includes a portion placed on an outer trench (TO) with a gate insulating film (7) being interposed. A first main electrode (10) includes a main contact (CS) electrically connected to a well region (4) and a first impurity region (5) within an active region (30), and an outer contact (CO) being spaced away from the active region (30) and in contact with a bottom face of the outer trench (TO). A trench-bottom field relaxing region (13) is provided in a drift layer (3). A trench-bottom high-concentration region (18) has an impurity concentration higher than that of the trench-bottom field relaxing region (13), is provided on the trench-bottom field relaxing region (13), and extends from a position where it faces the gate connection layer (14) with the gate insulating film (7) being interposed, to a position where it is in contact with the outer contact (CO) of the first main electrode (10).

8. 发明授权

US10559653B2 Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device 有权
公开(公告)号：US10559653B2
公开(公告)日：2020-02-11
申请号：US16307184
申请日：2017-05-23
申请人： Mitsubishi Electric Corporation
发明人： Tomokatsu Watanabe , Shiro Hino , Yusuke Yamashiro , Toshiaki Iwamatsu
IPC分类号： H01L31/0312 , H01L29/06 , H01L29/872 , H01L21/20 , H01L21/265 , H01L29/78 , H01L29/12 , H01L21/02 , H01L21/04 , H01L29/10 , H01L29/16 , H01L29/66 , H01L29/739
摘要： The technique disclosed in the Description relates to a technique preventing dielectric breakdown while a silicon carbide semiconductor device is OFF, without degrading process throughput or yield. The silicon carbide semiconductor device relating to the technique disclosed in the Description includes a drift layer of a first conductivity type, a threading dislocation provided to penetrate the drift layer, and an electric-field reduction region of a second conductivity type disposed in a position in the surface layer of the drift layer, the position corresponding to the threading dislocation. The electric-field reduction region is an epitaxial layer.

9. 发明授权

US10475920B2 Semiconductor device and semiconductor device manufacturing method 有权
公开(公告)号：US10475920B2
公开(公告)日：2019-11-12
申请号：US15567670
申请日：2015-11-06
申请人： Mitsubishi Electric Corporation
发明人： Koji Sadamatsu , Shiro Hino
IPC分类号： H01L29/06 , H01L29/16 , H01L29/47 , H01L29/66 , H01L29/78
摘要： A drift layer is made of a wide bandgap semiconductor. First well regions are formed on the drift layer. A source region is formed on each of the first well regions. A gate insulating film is formed on the first well regions. A first electrode is in contact with the source regions, and has diode characteristics allowing unipolar conduction to the drift layer between the first well regions. A second well region is formed on the drift layer. A second electrode is in contact with the second well region, and separated from a gate electrode and the first electrode.

10. 发明授权

US09614029B2 Trench-gate type semiconductor device and manufacturing method therefor 有权
公开(公告)号：US09614029B2
公开(公告)日：2017-04-04
申请号：US14930373
申请日：2015-11-02
申请人： Mitsubishi Electric Corporation
发明人： Yasuhiro Kagawa , Akihiko Furukawa , Shiro Hino , Hiroshi Watanabe , Masayuki Imaizumi
IPC分类号： H01L29/66 , H01L29/06 , H01L29/16 , H01L29/417 , H01L29/739 , H01L29/78 , H01L29/10 , H01L29/20 , H01L29/423
CPC分类号： H01L29/063 , H01L29/0623 , H01L29/0696 , H01L29/1045 , H01L29/105 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/41741 , H01L29/41766 , H01L29/41775 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/6631 , H01L29/66348 , H01L29/66522 , H01L29/66666 , H01L29/66727 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/7827
摘要： There is provided a trench-gate type semiconductor device that can prevent breakdown of a gate insulating film caused by a displacement current flowing into a protective diffusion layer at a portion of a trench underlying a gate electrode at a turn-off time and simultaneously improves a current density by narrowing a cell pitch. The semiconductor device has a gate electrode 7 embedded into a trench 5 penetrating a base region 3. The gate electrode 7 is disposed into a lattice shape in a planar view, and a protective diffusion layer 13 is formed in a drift layer 2a at the portion underlying thereof. At least one of blocks divided by the gate electrode 7 is a protective contact region 20 on which the trench 5 is entirely formed. A protective contact 21 for connecting the protective diffusion layer 13 at a bottom portion of the trench 5 and a source electrode 9 is disposed on the protective contact region 20.

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