会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明授权
    • Electron beam drawing apparatus
    • 电子束描绘装置
    • US06246064B1
    • 2001-06-12
    • US09605879
    • 2000-06-29
    • Minoru SasakiYuji TangeYutaka HojyoKazuyoshi OonukiHiroyuki Itoh
    • Minoru SasakiYuji TangeYutaka HojyoKazuyoshi OonukiHiroyuki Itoh
    • H01J3730
    • B82Y10/00B82Y40/00H01J37/304H01J37/3045H01J37/3174H01J2237/3045H01J2237/30455H01J2237/3175
    • An electron beam drawing process of high throughput, coping with the changes in static distortion and dynamic distortion of a lower layer exposure apparatus or an optical reduction exposure apparatus. At least two marks formed in each chip formed on a wafer are detected for a predetermined number of chips, and the relation between the shape distortion of each chip in the wafer plane and the wafer coordinates is determined from the positions of the detected marks and the designed positions of the marks by a statistical processing. Patterns are drawn in all chips while correcting the patterns to be drawn on the individual chips, by using the relation between the determined chip shape distortion and the wafer coordinates. As a result, the superposition exposure with the lower layer can be with a high throughput and with a high accuracy without any manual adjustment.
    • 一种高产量的电子束拉制工艺,能够应对下层曝光装置或光学还原曝光装置的静态失真和动态变形的变化。 对于预定数量的芯片,检测在晶片上形成的每个芯片中形成的至少两个标记,并且根据检测到的标记和晶片坐标的位置确定晶片平面中每个芯片的形状失真与晶片坐标之间的关系 通过统计处理设计标记的位置。 通过使用确定的芯片形状失真和晶片坐标之间的关系来校正在各个芯片上绘制的图案,在所有芯片中绘制图案。 结果,与下层的重叠曝光可以具有高产量和高精度而无需任何手动调节。