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    • 1. 发明授权
    • Gate-array or field programmable gate array
    • 门阵列或现场可编程门阵列
    • US07725867B2
    • 2010-05-25
    • US11099507
    • 2005-04-06
    • Michael Gude
    • Michael Gude
    • G06F17/50
    • H03K19/1737H03K19/17728H03K19/17736
    • Some Gate Arrays and in particular Filed Programmable Gate Arrays (FPGAs), realize combinatorial logic by utilizing so-called “Look Up Tables” (LUTs). Unfortunaltely the circuit expenditure for a LUT is exponentially increasing with the number of inputs. The invention overcomes this problem by using a set of gates as AND, NAND, OR, NOR, XOR, XNOR, AND/OR combination gate, AND/NOR combination gate, OR/AND combination gate, OR/NAND combination gate, identity comparator between two vectors, multiplexer and adder.In addition, conventional GAs and FPGAs utilize routing structures and channels that allow a so-called Manhattan routing. This has the disadvantage that the signal delay on such a connection is highly dependent on the number of serially linked sections. Consequently, the delay time fluctuates significantly on different connections. The invention overcomes this problem by using a X/Y routing structure with a fixed number of connection points and a fixed local routing.
    • 一些门阵列,特别是可编程门阵列(FPGA),通过利用所谓的“查找表”(LUT)来实现组合逻辑。 不幸的是,LUT的电路支出随输入数量呈指数增长。 本发明通过使用一组门作为AND,NAND,或或NOR,XOR,XNOR,AND / OR组合门,AND / NOR组合门,OR / AND组合门,OR / NAND组合门,同步比较器 两个向量之间,多路复用器和加法器。 此外,传统的GAs和FPGA使用允许所谓的曼哈顿路由的路由结构和信道。 这具有这样的缺点:在这种连接上的信号延迟很大程度上取决于串行连接的部分的数量。 因此,延迟时间在不同连接上显着波动。 本发明通过使用具有固定数量的连接点和固定本地路由的X / Y路由结构来克服这个问题。
    • 2. 发明授权
    • Pourable fatty dispersions
    • 易挥发的脂肪分散体
    • US07186434B2
    • 2007-03-06
    • US10323304
    • 2002-12-19
    • Michael GudeJohannes Arie LaanEckhard Flöter
    • Michael GudeJohannes Arie LaanEckhard Flöter
    • A23D7/005
    • A23D7/0056A23D7/013A23D9/007A23D9/013
    • Liquid margarines and other pourable dispersions which contain a hardstock fat derived from plant waxes. The fat consists of a mixture of triglycerides, which fat is non-hydrogenated and contains less than 10 wt. % of fatty acid residues with a chain length of 6–10 carbon atoms, of which less than 50 wt. % of the triglycerides consist of monoacyl triglycerides and which fat is characterized in that its content of fatty acid residues which are saturated and contain at least 20 carbon atoms is at least 30 wt. %, preferably at least 40 wt. % and more preferably at least 50 wt. % calculated on total fatty acid residues. Such fat can be obtained by a process comprising the steps: selecting a plant wax, reacting the wax esters from the wax or a reactive derivative of those wax esters with glycerol or with a reactive glycerol derivative, purifying and recovering the obtained triglycerides, optionally admixing the product with a triglyceride fat such that the mixture complies with the above fat definition.
    • 液体人造黄油和其他可倾倒的分散体,其含有源自植物蜡的硬脂肪脂肪。 脂肪由甘油三酯的混合物组成,脂肪是非氢化的并且含有小于10重量% %的链长为6-10个碳原子的脂肪酸残基,其中小于50wt。 甘油三酯的百分比由单酰基甘油三酯组成,哪种脂肪的特征在于其饱和并含有至少20个碳原子的脂肪酸残基的含量为至少30重量%。 %,优选至少40wt。 %,更优选至少50wt。 %计算总脂肪酸残留量。 这样的脂肪可以通过包括以下步骤的方法获得:选择植物蜡,使来自蜡的蜡酯或那些蜡酯的反应性衍生物与甘油或与活性甘油衍生物反应,纯化和回收得到的甘油三酸酯,任选混合 具有甘油三酯脂肪的产品,使得该混合物符合上述脂肪定义。
    • 3. 发明授权
    • Delta-sigma analog to digital converter
    • Delta-sigma模数转换器
    • US06710728B2
    • 2004-03-23
    • US10259627
    • 2002-09-30
    • Michael Gude
    • Michael Gude
    • H03M300
    • H03M3/368H03M3/43H03M3/456
    • The present invention improves an analog front-end of a Delta-Sigma analog-to-digital converter (ADC), so that by keeping the simple construction a significant improvement of the resolution is achieved. This is done by a plurality of buffers including a first buffer [5], [7] connected to the D-input of the flip-flop [4] and/or a second buffer [6], [8] connected to the output of the flip-flop on a feedback path, and a power supply different from a power supply of the semiconductor chip so that a decoupling between the semiconductor chip and the analog front-end is achieved. Additionally the frequencies at the output of the flip-flop [4] can be reduced so that the frequencies outside the semiconductor chip are much lower than the sampling clock frequency of the flip-flop [4]. So it is possible to increase the internal sampling frequency into the GigaHertz range without fearing problems in the field of EMC.
    • 本发明改进了Delta-Sigma模数转换器(ADC)的模拟前端,从而通过保持简单的结构实现了分辨率的显着提高。 这是通过多个缓冲器完成的,包括连接到触发器[4]的D输入的第一缓冲器[5],和/或连接到输出端的第二缓冲器[6],[8] 的反馈路径上的触发器,以及与半导体芯片的电源不同的电源,从而实现半导体芯片和模拟前端之间的去耦。 另外,触发器[4]的输出端的频率可以减小,使得半导体芯片外部的频率远低于触发器的采样时钟频率[4]。 因此,可以将内部采样频率提高到GigaHertz范围,而不必担心EMC领域的问题。