专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US6054684A Ultra fast temperature ramp up and down in a furnace using interleaving shutters 失效
标题翻译：使用交错百叶窗在炉内上下高速升温
公开(公告)号：US6054684A
公开(公告)日：2000-04-25
申请号：US964515
申请日：1997-11-05
申请人： Michael F. Pas , C. Rinn Cleavelin , Sylvia D. Pas
发明人： Michael F. Pas , C. Rinn Cleavelin , Sylvia D. Pas
IPC分类号： H01L21/22 , C30B31/12 , H01L21/324 , F27B5/14
CPC分类号： C30B31/12
摘要： One embodiment of the instant invention is a process chamber for heating a semiconductor wafer, the process chamber comprising: heating elements (elements 104 of FIG. 2a) for providing heating energy; means for holding (means 112 of FIG. 2a) the semiconductor wafer; and shutters situated between the heating elements and the means for holding the semiconductor wafer, the shutters (shutters 108 of FIGS. 2a and 2b and shutters of FIGS. 2c and 2d for blocking the heating energy from getting to the semiconductor wafer when the shutters are in a closed position and for directing the heating energy to the semiconductor wafer when in an open position. Preferably, the shutters are comprised of: an outer surface which is coated with a material which reflects the heating energy back towards the heating elements when the shutters are in the closed position; an inner surface which faces the means for holding the semiconductor wafer when the shutters are in the dosed position; an axis which the shutters revolve around so as to open and close; and an insulating material situated between the inner and outer surfaces.
摘要翻译：本发明的一个实施例是用于加热半导体晶片的处理室，所述处理室包括：加热元件（图2a的元件104），用于提供加热能量; 用于保持（图2a的装置112）半导体晶片的装置; 和位于加热元件和用于保持半导体晶片的装置之间的快门，快门（图2a和2b的快门108和图2c和2d的快门，用于当快门为快门时阻止加热能量进入半导体晶片在闭合位置，并且当处于打开位置时将加热能量引导到半导体晶片。优选地，快门由以下部件构成：外表面涂覆有当快门反射加热能量时朝向加热元件反射的材料处于关闭位置;当快门处于计量位置时面对用于保持半导体晶片的装置的内表面;快门围绕着开启和关闭的轴线;以及绝缘材料，位于内部和外表面。

2. 发明授权

US08941094B2 Methods for adjusting the conductivity range of a nanotube fabric layer 有权
标题翻译：调整纳米管织物层电导率范围的方法
公开(公告)号：US08941094B2
公开(公告)日：2015-01-27
申请号：US12874501
申请日：2010-09-02
申请人： C. Rinn Cleavelin , Thomas Rueckes , H. Montgomery Manning , Darlene Hamilton , Feng Gu
发明人： C. Rinn Cleavelin , Thomas Rueckes , H. Montgomery Manning , Darlene Hamilton , Feng Gu
IPC分类号： H01L45/00 , B82Y30/00 , B82Y40/00 , H01B1/24 , H01L29/78 , H01L51/00 , H01L51/44
CPC分类号： H01L45/149 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01B1/24 , H01L29/78 , H01L51/0015 , H01L51/0048 , H01L51/444 , Y02E10/549
摘要： Methods for adjusting and/or limiting the conductivity range of a nanotube fabric layer are disclosed. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via wet chemistry techniques. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via plasma treatment. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via CVD treatment. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via an inert ion gas implant.
摘要翻译：公开了调整和/或限制纳米管织物层的电导率范围的方法。在一些方面，通过湿法化学技术使织物层内的纳米管元件功能化来调节纳米管织物层的导电性。在一些方面，通过等离子体处理使织物层内的纳米管元件功能化来调节纳米管织物层的导电性。在一些方面，通过CVD处理使织物层内的纳米管元件功能化来调节纳米管织物层的导电性。在一些方面，纳米管织物层的导电性通过惰性离子注入物官能化织物层内的纳米管元件来调节。

3. 发明授权

US06246787B1 System and method for knowledgebase generation and management 失效
标题翻译：知识库生成和管理的系统和方法
公开(公告)号：US06246787B1
公开(公告)日：2001-06-12
申请号：US08866771
申请日：1997-05-30
申请人： A. Kathleen Hennessey , YouLing Lin , Rajasekar Reddy , C. Rinn Cleavelin , Howard V. Hastings, II , Pinar Kinokoglu , Wan S. Wong
发明人： A. Kathleen Hennessey , YouLing Lin , Rajasekar Reddy , C. Rinn Cleavelin , Howard V. Hastings, II , Pinar Kinokoglu , Wan S. Wong
IPC分类号： G06K900
CPC分类号： H01L22/20 , G01N21/95607 , G06T7/001 , G06T2207/10056 , G06T2207/30148 , H01L22/12 , H01L2924/014
摘要： A method and system for generating and managing a knowledgebase for use in identifying anomalies on a manufactured object, such as a semiconductor wafer, includes measures for adding, deleting, and organizing data from the knowledgebase.
摘要翻译：用于生成和管理知识库以用于识别诸如半导体晶片的制造对象上的异常的方法和系统包括用于从知识库添加，删除和组织数据的措施。

4. 发明授权

US06292582B1 Method and system for identifying defects in a semiconductor 失效
标题翻译：用于识别半导体缺陷的方法和系统
公开(公告)号：US06292582B1
公开(公告)日：2001-09-18
申请号：US08867154
申请日：1997-05-30
申请人： YouLing Lin , A. Kathleen Hennessey , Ramachandra R. Katragadda , Ramakrishna Pattikonda , Rajasekar Reddy , C. Rinn Cleavelin , Howard V. Hastings, II , Wan S. Wong
发明人： YouLing Lin , A. Kathleen Hennessey , Ramachandra R. Katragadda , Ramakrishna Pattikonda , Rajasekar Reddy , C. Rinn Cleavelin , Howard V. Hastings, II , Wan S. Wong
IPC分类号： G06K900
CPC分类号： G06T7/001 , G01N21/95607 , G06T2207/10056 , G06T2207/30148 , H01L23/544 , H01L2223/54466 , H01L2223/5448 , H01L2924/0002 , H01L2924/00
摘要： A system and method allow for associating a descriptive label with an anomaly on a manufactured object, such as a semiconductor wafer. The method includes placing the manufactured device on a moveable stage; capturing and preparing a digital-pixel-based representation of the image; symbolically decomposing the digital-pixel-based representation of the image to create a primitive-based representation of the image; analyzing the primitive-based representation of the image to detect and locate the anomaly; isolating primitives associated with the anomaly; comparing the isolated primitives associated with the anomaly with primitives in a knowledge base to locate a set of primitives in the knowledge base most like the isolated primitives associated with the anomaly; and assigning a label associated with the set of primitives in the knowledge base that was most similar to the isolated primitives associated with the anomaly. Different layers of semiconductor wafer may be analyzed to determine an appropriate label for a defect.
摘要翻译：系统和方法允许将描述性标签与制造对象（例如半导体晶片）上的异常相关联。该方法包括将制造的装置放置在可移动台上; 捕获和准备图像的基于数字像素的表示; 象征性地分解图像的基于数字像素的表示以创建图像的基于图元的表示; 分析图像的基于图元的表示以检测和定位异常; 隔离与异常相关的原语; 将与异常相关联的孤立原语与知识库中的原语进行比较，以定位知识库中的一组原语，最像是与异常相关联的孤立原语; 并且在与所述异常相关联的所述孤立原语最相似的知识库中分配与所述基元集相关联的标签。可以分析不同层的半导体晶片以确定缺陷的适当标签。

5. 发明申请

US20080014689A1 Method for making planar nanowire surround gate mosfet 审中-公开
标题翻译：制造平面纳米线环绕门mosfet的方法
公开(公告)号：US20080014689A1
公开(公告)日：2008-01-17
申请号：US11482042
申请日：2006-07-07
申请人： C. Rinn Cleavelin , Weize W. Xiong
发明人： C. Rinn Cleavelin , Weize W. Xiong
IPC分类号： H01L21/8234
CPC分类号： H01L29/0665 , B82Y10/00 , H01L29/0673 , H01L29/42392 , H01L29/66772 , H01L29/66795 , H01L29/78696
摘要： Embodiments provide a method of fabricating a plurality of planar nanowires surround gate semiconductor device. The planar nanowires can be formed between a source and a drain over an insulating layer of a semiconductor substrate. A gate stack can be grown or deposited all-around the planar nanowires. The gate stack can then be etched and patterned. During this process, the planar nanowires are severed between the gate and the source, and between the gate and the drain, leaving portions of the gate-all-around planar nanowires remain between the source and the drain and serve as the active region of the channel. The remaining gate-all-around planar nanowires can be epitaxially regrown to reconnect to the source and the drain.
摘要翻译：实施例提供一种制造多个平面纳米线环绕栅极半导体器件的方法。可以在半导体衬底的绝缘层上的源极和漏极之间形成平面的纳米线。栅极堆叠可以生长或沉积在平面纳米线周围。然后可以对栅极堆叠进行蚀刻和图案化。在该过程中，平面纳米线在栅极和源极之间以及栅极和漏极之间被切断，使得栅极全周侧平面纳米线的部分保留在源极和漏极之间，并且用作有源区域渠道。剩余的栅极全面的平面纳米线可以外延再生长以重新连接到源极和漏极。

6. 发明授权

US06483938B1 System and method for classifying an anomaly 有权
标题翻译：用于分类异常的系统和方法
公开(公告)号：US06483938B1
公开(公告)日：2002-11-19
申请号：US09519678
申请日：2000-03-06
申请人： A. Kathleen Hennessey , YouLing Lin , Rajasekar Reddy , C. Rinn Cleavelin , Howard V. Hastings, II , Pinar Kinikoglu , Wan S. Wong
发明人： A. Kathleen Hennessey , YouLing Lin , Rajasekar Reddy , C. Rinn Cleavelin , Howard V. Hastings, II , Pinar Kinikoglu , Wan S. Wong
IPC分类号： G06K900
CPC分类号： H01L22/20 , G01N21/95607 , G06T7/001 , G06T2207/10056 , G06T2207/30148 , H01L22/12 , H01L2924/014
摘要： A method and system for generating and managing a knowledgebase for use in identifying anomalies on a manufactured object, such as a semiconductor wafer, includes measures for adding, deleting, and organizing data from the knowledgebase.
摘要翻译：用于生成和管理知识库以用于识别诸如半导体晶片的制造对象上的异常的方法和系统包括用于从知识库添加，删除和组织数据的措施。

7. 发明授权

US5696835A Apparatus and method for aligning and measuring misregistration 失效
标题翻译：对准和测量不对准的装置和方法
公开(公告)号：US5696835A
公开(公告)日：1997-12-09
申请号：US603026
申请日：1996-02-16
申请人： A. Kathleen Hennessey , YouLing Lin , Wan Sang Wong , C. Rinn Cleavelin , Stephen J. Demoor , Kwang-Soo Hahn
发明人： A. Kathleen Hennessey , YouLing Lin , Wan Sang Wong , C. Rinn Cleavelin , Stephen J. Demoor , Kwang-Soo Hahn
IPC分类号： G06T7/00 , H01L21/68 , G06K9/00
CPC分类号： G06T7/0044 , H01L21/681 , G06T2207/30148
摘要： A method is provided for aligning a silicon wafer (20) in a fabrication tool (37) having a stage (22) involving the steps of producing a digital image of a portion of wafer (20) in a scope-of-view window (48), converting the digital image to image primitives, comparing the image primitives to grammar template primitives to locate a known intersection on wafer (20); and moving the stage (22) to align wafer (20). A method and apparatus are disclosed for determining the misregistration of two layers of a wafer (20) by converting targets (158, 160) to primitives and determining the relative displacement in symbolic space. The misregistration apparatus involves a camera (34), a video-to-digital converter (32), a computer (28), and a stage adjuster (24).
摘要翻译：提供了一种用于在具有级（22）的制造工具（37）中对准硅晶片（20）的方法，其包括以下步骤：在视野窗口中产生晶片（20）的一部分的数字图像将数字图像转换为图像原语，将图像原语与语法模板图元进行比较，以定位晶片（20）上的已知交叉点; 以及移动台（22）以对准晶片（20）。公开了一种用于通过将目标（158,160）转换为原语并确定符号空间中的相对位移来确定晶片（20）的两层不对准的方法和装置。该对准装置包括摄像机（34），视频 - 数字转换器（32），计算机（28）和平台调节器（24）。

8. 发明授权

US07189627B2 Method to improve SRAM performance and stability 有权
标题翻译：提高SRAM性能和稳定性的方法
公开(公告)号：US07189627B2
公开(公告)日：2007-03-13
申请号：US10921532
申请日：2004-08-19
申请人： Zhiqiang Wu , Shaofeng Yu , C. Rinn Cleavelin
发明人： Zhiqiang Wu , Shaofeng Yu , C. Rinn Cleavelin
IPC分类号： H01L21/76
CPC分类号： H01L27/1104 , G11C11/412 , H01L27/11
摘要： A technique is disclosed for increasing the width of a transistor (300) while the transistor itself may be scaled down. The transistor width (382) is increased by forming recesses (352) within shallow trench isolation (STI) regions (328) adjacent to the transistor (300). The recesses (352) provide an area that wraps around the transistor and thereby increases the width (382) of the transistor (300). This wraparound area provides additional space for dopant atom deposition, which facilitates a reduction in random dopant fluctuation (RDF). In this manner, transistors formed in accordance with one or more aspects of the present invention, may yield improved performance when incorporated into SRAM since the probability that such transistors will be more closely matched is increased.
摘要翻译：公开了一种用于增加晶体管（300）的宽度的技术，同时可以缩小晶体管本身。通过在与晶体管（300）相邻的浅沟槽隔离（STI）区域（328）内形成凹槽（352）来增加晶体管宽度（382）。凹部（352）提供围绕晶体管的区域，从而增加晶体管（300）的宽度（382）。该环绕区域为掺杂剂原子沉积提供了额外的空间，这有助于随机掺杂剂波动（RDF）的减少。以这种方式，根据本发明的一个或多个方面形成的晶体管可以在并入SRAM时产生改善的性能，因为这种晶体管将更加紧密匹配的可能性增加。

9. 发明申请

US20110038195A1 METHOD FOR RESETTING A RESISTIVE CHANGE MEMORY ELEMENT 有权
标题翻译：复位电阻变化记忆元件的方法
公开(公告)号：US20110038195A1
公开(公告)日：2011-02-17
申请号：US12618448
申请日：2009-11-13
申请人： Darlene Hamilton , C. Rinn Cleavelin
发明人： Darlene Hamilton , C. Rinn Cleavelin
IPC分类号： G11C11/00 , G11C7/06
CPC分类号： G11C5/06 , B82Y10/00 , G11C5/147 , G11C11/5614 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C13/0009 , G11C13/0011 , G11C13/0061 , G11C13/0064 , G11C13/0069 , G11C13/0097 , G11C13/025 , G11C2013/0076 , G11C2013/0092 , G11C2213/71 , G11C2213/79
摘要： A method of resetting a resistive change memory element is disclosed. The method comprises performing a series of programming operations—for example, a programming pulse of a predetermined voltage level and pulse width—on a resistive change memory element in order to incrementally increase the resistance of the memory element above some predefined threshold. Prior to each programming operation, the resistive state of the memory element is measured and used to determine the parameters used in that programming operation. If this measured resistance value is above a first threshold value, the memory element is determined to already be in a reset state and no further programming operation is performed. If this measured resistance value is below a second threshold value, this second threshold value being less than the first threshold value, a first set of programming parameters are used within the programming operation. If this initial value is above the second threshold value but below the first threshold value, a second set of programming parameters are used within the programming operation.
摘要翻译：公开了一种复位电阻变化存储元件的方法。该方法包括执行一系列编程操作 - 例如，电阻变化存储器元件上的预定电压电平和脉冲宽度的编程脉冲，以便将存储器元件的电阻递增地增加到高于某个预定阈值。在每个编程操作之前，测量存储元件的电阻状态并用于确定在该编程操作中使用的参数。如果该测量的电阻值高于第一阈值，则确定存储元件已经处于复位状态，并且不执行进一步的编程操作。如果该测量的电阻值低于第二阈值，该第二阈值小于第一阈值，则在编程操作中使用第一组编程参数。如果该初始值高于第二阈值但低于第一阈值，则在编程操作中使用第二组编程参数。

10. 发明授权

US06205239B1 System and method for circuit repair 失效
标题翻译：电路修复的系统和方法
公开(公告)号：US06205239B1
公开(公告)日：2001-03-20
申请号：US08866553
申请日：1997-05-30
申请人： YouLing Lin , A. Kathleen Hennessey , Ramakrishna Pattikonda , Rajasekar Reddy , Veera S. Khaja , C. Rinn Cleavelin
发明人： YouLing Lin , A. Kathleen Hennessey , Ramakrishna Pattikonda , Rajasekar Reddy , Veera S. Khaja , C. Rinn Cleavelin
IPC分类号： G06K900
CPC分类号： G06T7/001 , G01N21/95607 , G06T7/0002 , G06T2207/10056 , G06T2207/30148 , H01L22/20 , H01L2924/014
摘要： A system and method for repairing a defect on a manufactured object, which may be a semiconductor wafer, uses a computer and a repair tool. The method includes placing the manufactured device on a moveable stage; capturing and preparing a digital-pixel-based representation of the image; symbolically decomposing the digital-pixel-based representation of an image to create a primitive-based representation of the image; analyzing the primitive-based representation of the image to detect and locate an anomaly; isolating primitives associated with the anomaly; comparing the isolated primitives associated with the anomaly with primitives in a knowledgebase to locate a set of primitives in the knowledgebase that are most like the isolated primitives associated with the anomaly; assigning a defect-type label associated with the set of primitives in the knowledge base that was most similar to the isolated primitives associated with the anomaly; and using a repair tool to repair the defect based on defect-type label for the anomaly.
摘要翻译：用于修复可以是半导体晶片的制造对象上的缺陷的系统和方法使用计算机和修理工具。该方法包括将制造的装置放置在可移动台上; 捕获和准备图像的基于数字像素的表示; 象征性地分解图像的基于数字像素的表示以创建图像的基于图元的表示; 分析图像的基于图元的表示以检测和定位异常; 隔离与异常相关的原语; 将与异常相关联的孤立原语与知识库中的原语进行比较，以定位知识库中最像是与异常相关联的孤立原语的一组原语; 分配与所述知识库中与所述异常相关联的所述孤立原语最相似的所述原始集合相关联的缺陷类型标签; 并使用维修工具根据异常的缺陷型标签修复缺陷。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式