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1. 发明授权

US5471424A Write once type information recording medium, method and apparatus for formatting the same, and method and apparatus for writing data to or reading data from the same 失效
标题翻译：一次写入型信息记录介质，其格式化方法和装置，以及将数据写入数据或从其读取数据的方法和装置
公开(公告)号：US5471424A
公开(公告)日：1995-11-28
申请号：US219303
申请日：1994-03-28
申请人： Masayuki Takada , Osamu Yamada , Toru Kuroda , Koichi Yamazaki , Kazuo Noda
发明人： Masayuki Takada , Osamu Yamada , Toru Kuroda , Koichi Yamazaki , Kazuo Noda
IPC分类号： G11B20/12 , G11B20/18 , G11C7/00 , G06K7/10
CPC分类号： G11B20/1215 , G11B20/18 , G11B20/1809
摘要： A write once type information recording medium having a recording format that includes sectors. Each Sector includes x pieces of p-bit frames. Each frame contains an f-bit synchronization signal region and a d-bit data region. Each bit of at least one x-bit packet in which a v-bit error correction code has been added to u-bit data, is distributed to each one of the data regions of the x pieces of frames. This makes it possible for the write once type information recording medium to have an increased data storage efficiency and an effective error correction capability for a burst error.
摘要翻译：一种具有包括扇区的记录格式的一次写入型信息记录介质。每个扇区包括x个p位帧。每帧包含f位同步信号区域和d位数据区域。向x位数据添加了v位纠错码的至少一个x位数据包的每一位被分配给x个帧的每个数据区。这使得一次写入型信息记录介质可以提高数据存储效率和突发错误的有效纠错能力。

2. 发明授权

US5574735A Error correction circuit which substitutes bits into data stream during periods of data loss 失效
标题翻译：错误纠正电路，在数据丢失期间将位代替数据流
公开(公告)号：US5574735A
公开(公告)日：1996-11-12
申请号：US345112
申请日：1994-11-28
申请人： Masayuki Takada , Osamu Yamada , Toru Kuroda , Koichi Yamazaki
发明人： Masayuki Takada , Osamu Yamada , Toru Kuroda , Koichi Yamazaki
IPC分类号： G11B20/14 , G11B20/18 , H03M13/00 , H03M13/31
CPC分类号： G11B20/1426 , G11B20/1833 , G11B20/1866 , H03M13/00 , H03M13/31
摘要： In an error correction circuit, when a data loss is detected, substitute data comprising all bits of "1" or "0" are generated during a data loss period and substituted for the lost data for the data loss period. Thereafter, the whole data containing the substitute data are decoded in a predetermined error correction system to generate corrected data.
摘要翻译：在纠错电路中，当检测到数据丢失时，在数据丢失期间产生包括所有位“1”或“0”的代替数据，并代替数据丢失周期的丢失数据。此后，将包含替代数据的整个数据在预定的纠错系统中解码以产生校正数据。

3. 发明授权

US5745506A Error correcting decoder 失效
标题翻译：错误纠正解码器
公开(公告)号：US5745506A
公开(公告)日：1998-04-28
申请号：US449916
申请日：1995-05-25
申请人： Syugo Yamashita , Yoshikazu Tomida , Masayuki Takada , Toru Kuroda , Tadashi Isobe , Osamu Yamada
发明人： Syugo Yamashita , Yoshikazu Tomida , Masayuki Takada , Toru Kuroda , Tadashi Isobe , Osamu Yamada
IPC分类号： H03M13/00 , H04J1/00 , H04L1/00
CPC分类号： H04L1/0065 , H03M13/00 , H04L1/0052
摘要： An error correcting decoder includes a flag memory (20) which stores a flag indicative of a success of an error correction for a bit. When a column direction error correction is to be performed, if a flag for a bit indicates a success, no error correction is performed for the bit. That is, an output of a majority logic circuit (78) is forcedly made invalid. In performing the column direction error correction, if the number of success packets in a first-time row direction error correction is smaller than a predetermined value and if the number of bits corrected by the column direction error correction becomes equal to or larger than a predetermined number, it is deemed as that the column direction error correction is unsuccessful. In performing a second-time row direction error correction, when a threshold value is equal to or larger than a predetermined value, the majority logic circuit determines with referring to a result of the column direction error correction, but without referring to the result when the threshold value is smaller than the predetermined value.
摘要翻译：纠错解码器包括标志存储器（20），其存储指示针对位的纠错成功的标志。当要执行列方向错误校正时，如果位的标志指示成功，则不对该位执行纠错。也就是说，多数逻辑电路（78）的输出被强制地变为无效。在执行列方向误差校正时，如果第一行方向误差校正中的成功分组数小于预定值，并且如果通过列方向误差校正校正的比特数等于或大于预定值号码，则视为列方向错误校正不成功。在执行第二次行方向误差校正时，当阈值等于或大于预定值时，多数逻辑电路参考列方向误差校正的结果确定，但是不参考结果时阈值小于预定值。

4. 发明授权

US5719873A Frame-synchronous reproducing circuit 失效
标题翻译：帧同步再现电路
公开(公告)号：US5719873A
公开(公告)日：1998-02-17
申请号：US499256
申请日：1995-07-07
申请人： Syugo Yamashita , Yoshikazu Tomida , Masayuki Takada , Toru Kuroda , Tadashi Isobe , Osamu Yamada
发明人： Syugo Yamashita , Yoshikazu Tomida , Masayuki Takada , Toru Kuroda , Tadashi Isobe , Osamu Yamada
IPC分类号： H04J1/02 , H04B7/26 , H04J3/06 , H04L7/00 , H04L7/08
CPC分类号： H04L7/08 , H04B7/2621 , H04J3/0608
摘要： A frame-synchronous reproducing circuit (10) includes a BIC status register (20) of six stages, and a BIC status signal (c) from each stage of the register is applied to a BIC pattern determination circuit (24) in which the BIC status signal (c) and a BIC changing pattern being stored in advance are compared with each other. If the both are coincident with each other, the BIC pattern determination circuit (24) applies a high-level signal to a JK flip-flop (26) via an OR circuit (48), whereby a high-level signal representing that frame synchronization has been settled is outputted from the JK flip-flop (26).
摘要翻译：帧同步再现电路（10）包括六级的BIC状态寄存器（20），并且来自寄存器的每一级的BIC状态信号（c）被施加到BIC模式确定电路（24），其中BIC 将预先存储的状态信号（c）和BIC变更模式进行比较。如果两者彼此一致，则BIC模式确定电路（24）经由OR电路（48）向JK触发器（26）施加高电平信号，由此表示该帧同步的高电平信号已经稳定的是从JK触发器（26）输出的。

5. 发明授权

US5406551A Method and apparatus for digital signal transmission using orthogonal frequency division multiplexing 失效
标题翻译：使用正交频分复用的数字信号传输方法和装置
公开(公告)号：US5406551A
公开(公告)日：1995-04-11
申请号：US9819
申请日：1993-01-27
申请人： Masafumi Saito , Toru Kuroda , Shigeki Moriyama , Tomohiro Saito , Masayuki Takada , Osamu Yamada
发明人： Masafumi Saito , Toru Kuroda , Shigeki Moriyama , Tomohiro Saito , Masayuki Takada , Osamu Yamada
IPC分类号： H04J1/20 , H04J11/00 , H04J99/00 , H04L27/26
CPC分类号： H04L27/2613 , H04L27/2657 , H04L27/34 , H04L27/2662 , H04L27/2675 , H04L5/0007 , H04L5/0048
摘要： A digital signal transmission using OFDM modulation scheme in which the valid transmission data can be reproduced without requiring a recovery of the carriers at a receiver side. On a transmitter side, the transmission data sequence in which predetermined reference data for each carrier are placed among valid transmission data is modulated according to an orthogonal frequency division multiplexing (OFDM) modulation scheme using a plurality of carriers and obtained OFDM transmission signals are transmitted. On a receiver side, the received OFDM transmission signals are demodulated to obtain received data sequence containing valid received data and received reference data, and the valid transmission data are estimated from the received data sequence according to the valid received data, the received reference data, and the predetermined reference data for each carrier.
摘要翻译：使用OFDM调制方式的数字信号传输，其中可以再现有效的传输数据，而不需要在接收机侧恢复载波。在发送机侧，根据使用多个载波的正交频分复用（OFDM）调制方式对传输数据序列中的每个载波的预定参考数据放置在有效发送数据之间进行发送，并且获得OFDM传输信号。在接收机侧，接收到的OFDM传输信号被解调，以获得包含有效接收数据和接收到的参考数据的接收数据序列，并且根据接收到的数据序列根据接收到的有效数据，接收的参考数据，和每个载波的预定参考数据。

6. 发明授权

US5432800A Methods and apparatuses for transmission and reception of information signals 失效
标题翻译：用于发送和接收信息信号的方法和装置
公开(公告)号：US5432800A
公开(公告)日：1995-07-11
申请号：US968406
申请日：1992-10-29
申请人： Toru Kuroda , Masafumi Saito , Shigeki Moriyama , Tomohiro Saito , Masayuki Takada , Osamu Yamada
发明人： Toru Kuroda , Masafumi Saito , Shigeki Moriyama , Tomohiro Saito , Masayuki Takada , Osamu Yamada
IPC分类号： H03M13/29 , H03M13/33 , H04L1/00 , H04L7/10 , G06F11/10
CPC分类号： H03M13/29 , H03M13/33 , H04L1/0083 , H04L7/10 , H04H2201/15
摘要： Method and apparatus for transmitting an information signal generate a plurality of block signals on the basis of the information signal, generate a plurality of parity block signals on the basis of the plural data block signals, generate a frame signal containing the plural data block signals and the parity block signals, and send out the frame signal. Each of the data block signals includes a first block synchronizing signal indicating the start of the data block signal, a data signal containing the information signal and a first parity signal derived by encoding the data signal. Each of the parity block signals incudes a second block synchronizing signal indicating the start of the parity block signal, a second parity signal and a third parity signal. Bit signals located at same bit positions in the respective second parity signals are derived by encoding bit signals located at the same positions in the respective data signals. Bit signals located at same bit positions in the respective third parity signals are derived by encoding the bit signals located at the same bit positions in the respective first parity signals or alternatively the third parity signal in each parity block signal is derived by encoding the second parity signal in each parity block signal.
摘要翻译：用于发送信息信号的方法和装置基于信息信号产生多个块信号，根据多个数据块信号产生多个奇偶校验块信号，生成包含多个数据块信号的帧信号，以及奇偶校验块信号，并发出帧信号。每个数据块信号包括指示数据块信号的开始的第一块同步信号，包含信息信号的数据信号和通过对数据信号进行编码导出的第一奇偶校验信号。每个奇偶校验块信号包括指示奇偶校验块信号的开始的第二块同步信号，第二奇偶校验信号和第三奇偶校验信号。通过对位于相应数据信号中的相同位置的位信号进行编码，导出位于各个第二奇偶校验信号中相同位位置的位信号。通过对位于相应的第一奇偶校验信号中的相同位位置的位信号进行编码，或者通过对第二奇偶校验位进行编码来导出每个奇偶校验块信号中的第三奇偶校验信号，导出位于相应的第三奇偶校验信号中位于相同位位置的位信号信号在每个奇偶校验块信号。

7. 发明授权

US5003540A Error correction coding and decoding circuit for digitally coded information 失效
标题翻译：用于数字编码信息的纠错编码和解码电路
公开(公告)号：US5003540A
公开(公告)日：1991-03-26
申请号：US238838
申请日：1988-08-31
申请人： Koichi Yamazaki , Yasuyuki Kimura , Osamu Yamada , Toru Kuroda
发明人： Koichi Yamazaki , Yasuyuki Kimura , Osamu Yamada , Toru Kuroda
IPC分类号： H04L1/00 , H03M13/00 , H03M13/33 , H03M13/43
CPC分类号： H03M13/33 , H03M13/43
摘要： An error correction coding and decoding circuit for digitally coded information in which a majority difference set cyclic code is used to apply error correction coding and decoding to a data signal having data bits suitably assigned to information bits and parity bits, characterized in that a clock signal (CLKC) for the internal operation of the circuit, a data load clock signal for loading data onto the circuit, and a data read clock signal for reading data from the circuit are delivered from an external circuit provided separately from the error correction coding and decoding circuit.

8. 发明申请

US20090170696A1 PROCESS FOR PRODUCING CATALYST 有权
标题翻译：生产催化剂的方法
公开(公告)号：US20090170696A1
公开(公告)日：2009-07-02
申请号：US11994654
申请日：2006-07-05
申请人： Masahide Kondo , Masanori Nitta , Hiroyuki Naitou , Toru Kuroda , Seiichi Kawato
发明人： Masahide Kondo , Masanori Nitta , Hiroyuki Naitou , Toru Kuroda , Seiichi Kawato
IPC分类号： B01J23/881
CPC分类号： B01J23/8885 , B01J21/08 , B01J23/002 , B01J23/8876 , B01J35/002 , B01J35/023 , B01J37/0009 , B01J37/0045 , B01J2523/00 , B08B9/08 , C07C45/35 , C07C51/252 , C07C253/18 , C07C47/22 , C07C57/04 , B01J2523/13 , B01J2523/27 , B01J2523/53 , B01J2523/54 , B01J2523/68 , B01J2523/69 , B01J2523/842 , B01J2523/845
摘要： Disclosed is a method for producing a catalyst, in which physical properties of a dried material or a calcined material in a production process of the catalyst are stable and a change in at least one of a catalyst activity and a selectivity to a target product is small and hence reproducibility of the catalyst is excellent. The present invention is a method for producing a catalyst containing molybdenum, bismuth, and iron, which contains the steps of washing a surface of at least one device equipped in an apparatus for the production of catalyst, to which a solid matter adheres, with a basic solution, and producing the catalyst with the apparatus for the production of catalyst thus washed.
摘要翻译：公开了一种催化剂的制造方法，其中，在催化剂的制造方法中，干燥材料或煅烧材料的物理性质稳定，催化剂活性和对目标产物的选择性中的至少一种的变化小催化剂的再现性优异。本发明是一种生产含有钼，铋和铁的催化剂的方法，其包括以下步骤：将装有固体物质的催化剂装置中装备的至少一种装置的表面与碱性溶液，并用生产如此洗涤的催化剂的装置生产催化剂。

9. 发明申请

US20070149809A1 Catalyst for production of unsaturated aldehyde and unsaturated carboxylic acid, method for producing same, and method for producing unsaturated aldehyde and unsaturated carboxylic acid 有权
标题翻译：用于生产不饱和醛和不饱和羧酸的催化剂，其制备方法，以及不饱和醛和不饱和羧酸的制备方法
公开(公告)号：US20070149809A1
公开(公告)日：2007-06-28
申请号：US10582859
申请日：2004-12-09
申请人： Masahide Kondo , Hiroyuki Naitou , Toru Kuroda
发明人： Masahide Kondo , Hiroyuki Naitou , Toru Kuroda
IPC分类号： C07C51/16 , B01J21/00 , C07C45/28
CPC分类号： C07C45/35 , B01J23/002 , B01J23/8876 , B01J23/8885 , B01J37/0009 , B01J37/0045 , B01J2523/00 , C07C45/32 , C07C45/37 , C07C51/252 , C07C47/22 , C07C57/04 , B01J2523/15 , B01J2523/44 , B01J2523/51 , B01J2523/53 , B01J2523/54 , B01J2523/68 , B01J2523/69 , B01J2523/842 , B01J2523/845 , B01J2523/847 , B01J2523/13 , B01J2523/48
摘要： A catalyst for use in producing an unsaturated aldehyde and an unsaturated carboxylic acid which is excellent in catalyst activity and selectivity to the unsaturated aldehyde and the unsaturated carboxylic acid, a method for producing such a catalyst and a method for producing an unsaturated aldehyde and an unsaturated carboxylic acid by using such a catalyst are provided. A method for producing a catalyst containing at least molybdenum, bismuth and iron for use in producing an unsaturated aldehyde and an unsaturated carboxylic acid through gas-phase catalytic oxidation of propylene, isobutylene, tertiary butyl alcohol or methyl tertiary butyl ether with molecular oxygen comprises the steps of kneading particles containing catalyst components, an organic binder and a liquid and extrusion molding the resultant kneaded mixture, the organic binder containing at least a high-viscosity organic binder having a viscosity (of its 1% water solution or dispersion at 20° C.) of from 5,000 mPa.s to 25,000 mPa.s and a low-viscosity organic binder having a viscosity (of its 1% water solution or dispersion at 20° C.) of from 10 mPa.s to less than 5,000 mPa.s.
摘要翻译：用于制备对不饱和醛和不饱和羧酸的催化剂活性和选择性优异的不饱和醛和不饱和羧酸的催化剂，这种催化剂的制备方法以及不饱和醛和不饱和醛的制备方法提供了使用这种催化剂的羧酸。通过丙烯，异丁烯，叔丁醇或甲基叔丁基醚与分子氧的气相催化氧化制备用于制备不饱和醛和不饱和羧酸的至少含有钼，铋和铁的催化剂的方法包括捏合含有催化剂组分的颗粒，有机粘合剂和液体并挤出成型所得捏合混合物的步骤，所述有机粘合剂含有至少具有粘度（其1％水溶液或分散体在20℃）的高粘度有机粘合剂。）为5,000mPa.s至25,000mPa.s，粘度（其1％水溶液或20℃下的分散体为20℃）的低粘度有机粘合剂为10mPa.s至小于5,000mPa。 s。

10. 发明授权

US06973118B1 Digital broadcasting apparatus 有权
标题翻译：数字广播设备
公开(公告)号：US06973118B1
公开(公告)日：2005-12-06
申请号：US09914131
申请日：2000-02-25
申请人： Yasunari Ikeda , Toshihisa Hyakudai , Takahiro Okada , Tamotsu Ikeda , Toru Kuroda , Naohiko Iai , Kenichi Tsuchida , Makoto Sasaki
发明人： Yasunari Ikeda , Toshihisa Hyakudai , Takahiro Okada , Tamotsu Ikeda , Toru Kuroda , Naohiko Iai , Kenichi Tsuchida , Makoto Sasaki
IPC分类号： H04H20/72 , H04L27/26 , H04B1/69 , H04J11/00 , H04N5/94
CPC分类号： H04L27/2618 , H04B2201/70706 , H04H20/72
摘要： A frequency interleaving circuit frequency-interleaves main signals generated according to sound data by parameters set according to frequencies of transmission channels. A sub-signal generating circuit generates sub-signals for transmission control including pilot signals. Mapping circuits modulate the sub-signals by using pseudo-random sequences generated based on initial values of random codes set according to frequencies of transmission channels. The frequency-interleaved main signals and the sub-signals modulated by the mapping circuits are OFDM-modulated. Then, they are converted to the frequencies of the transmission channels. An increase of a dynamic range of transmission signals can be suppressed by controlling the initial values of random codes set.
摘要翻译：频率交织电路按照根据传输信道的频率设置的参数，根据声音数据对由主要信号进行频率交织。子信号发生电路产生用于包括导频信号的传输控制的子信号。映射电路通过使用基于根据传输信道的频率设置的随机码的初始值生成的伪随机序列来调制子信号。频率交织的主信号和由映射电路调制的子信号被OFDM调制。然后，它们被转换成传输信道的频率。可以通过控制随机码集的初始值来抑制传输信号的动态范围的增加。

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