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1. 发明授权

US06235146B1 Vacuum treatment system and its stage 有权
标题翻译：真空处理系统及其阶段
公开(公告)号：US06235146B1
公开(公告)日：2001-05-22
申请号：US09313253
申请日：1999-05-18
申请人： Masanori Kadotani , Saburo Kanai , Youichi Itou , Takashi Fujii , Hironobu Kawahara , Ryouji Hamasaki , Kazue Takahashi , Motohiko Yoshigai
发明人： Masanori Kadotani , Saburo Kanai , Youichi Itou , Takashi Fujii , Hironobu Kawahara , Ryouji Hamasaki , Kazue Takahashi , Motohiko Yoshigai
IPC分类号： H01L2100
CPC分类号： H01L21/67023 , H01J2237/2001 , Y10S156/914
摘要： A stage with an electrostatic attracting means is adapted for use in a wafer treatment at a high temperature in a vacuum treatment system. In a vacuum treatment system having a stage provided in a treatment chamber, which electrostatically attracts an object to the stage in a low pressure atmosphere, and treats the object at high temperature by heating the stage, an electrode member of the stage is made of titanium or a titanium alloy and a dielectric film for electrostatic attraction is formed on the electrode member. In order to bond firmly titanium and alumina ceramics, it is desirable to sandwich a nickel alloy (Ni—Al) between the materials.
摘要翻译：具有静电吸引装置的阶段适用于在真空处理系统中在高温下进行晶片处理。在具有设置在处理室中的阶段的真空处理系统中，其在低压气氛中将物体静电吸引到工作台上，并且通过加热工作台在高温下处理物体，所述工作台的电极构件由钛制成或者在电极部件上形成钛合金和静电吸引用的电介质膜。为了牢固地结合钛和氧化铝陶瓷，期望在材料之间夹着镍合金（Ni-Al）。

2. 发明授权

US06549393B2 Semiconductor wafer processing apparatus and method 失效
标题翻译：半导体晶片加工装置及方法
公开(公告)号：US06549393B2
公开(公告)日：2003-04-15
申请号：US09946615
申请日：2001-09-06
申请人： Seiichiro Kanno , Hironobu Kawahara , Mitsuru Suehiro , Saburo Kanai , Ken Yoshioka
发明人： Seiichiro Kanno , Hironobu Kawahara , Mitsuru Suehiro , Saburo Kanai , Ken Yoshioka
IPC分类号： H02N1300
CPC分类号： H01L21/67109 , H01J2237/2001
摘要： A wafer stage 2 for holding a semiconductor wafer in a plasma treatment apparatus by setting the wafer on the wafer stage, said wafer stage 2 comprising a base material 26 equipped with refrigerant flow paths for allowing a refrigerant for temperature adjustment to flow; a stress-reducing member 28 provided on the wafer setting side of said base material 26 and having a smaller thermal expansion coefficient than does said base material; a dielectric film 30 provided on the wafer setting side of said stress-reducing member; and a deflection-preventing member 29 provided on the wafer non-setting side of said base material and having a smaller thermal expansion coefficient than does said base material. When the wafer stage is used, the temperature of the wafer as a substrate to be processed can be controlled uniformly and very accurately.
摘要翻译：晶片载物台2，用于通过将晶片放置在晶片台上，将半导体晶片保持在等离子体处理装置中，所述晶片台2包括配备有制冷剂流路的基材26，所述制冷剂流路用于使用于温度调节的制冷剂流动; 设置在所述基材26的晶片固定侧并且具有比所述基材更小的热膨胀系数的应力减小构件28; 设置在所述减压构件的晶片固定侧的电介质膜30; 以及设置在所述基材的晶片非凝固侧并且具有比所述基材更小的热膨胀系数的防偏转构件29。当使用晶片台时，可以均匀且非常精确地控制作为被处理基板的晶片的温度。

3. 发明授权

US06867144B2 Apparatus and method for plasma processing high-speed semiconductor circuits with increased yield 失效
标题翻译：用于等离子体处理高速半导体电路的装置和方法，其产量增加
公开(公告)号：US06867144B2
公开(公告)日：2005-03-15
申请号：US10138635
申请日：2002-05-06
申请人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
发明人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
IPC分类号： H01L21/3065 , H01J37/32 , H01L21/302
CPC分类号： H01J37/32706
摘要： A plasma etching method of a wafer includes the steps of electrostatically attracting the wafer which has a gate oxide film onto a wafer mounting electrode in a vacuum processing chamber, introducing a mixed gas into the vacuum processing chamber on the basis of an etching recipe, generating a magnetic field inside the vacuum processing chamber, generating a plasma in the vacuum processing chamber, applying a bias power to the wafer to accelerate ions in the plasma toward the wafer, and setting an impedance of a portion of the wafer mounting electrode which corresponds to an outer periphery of the wafer as viewed from a bias power supply to a value which is greater than that of a center portion of the wafer mounting electrode using an electrode arranged within the wafer mounting electrode at a position corresponding to the outer periphery of the wafer and formed under an insulating film for electrostatically attracting the wafer.
摘要翻译：晶片的等离子体蚀刻方法包括以下步骤：将具有栅极氧化膜的晶片静电吸引到真空处理室中的晶片安装电极上，基于蚀刻配方将混合气体引入真空处理室，产生真空处理室内部的磁场，在真空处理室内产生等离子体，向晶片施加偏置功率，将等离子体中的离子加速朝向晶片，将晶片安装电极的一部分的阻抗设定为对应于从晶片安装电极的晶片安装电极的对应于晶片外周的位置的晶片安装电极的晶片安装电极的中心部分的角度看，晶片的外周是从偏压电源观察到的值并形成在用于静电吸引晶片的绝缘膜下。

4. 发明授权

US06537012B2 Vacuum processing apparatus and a vacuum processing system 失效
公开(公告)号：US06537012B2
公开(公告)日：2003-03-25
申请号：US10086709
申请日：2002-03-04
申请人： Hironobu Kawahara , Mitsuru Suehiro , Kazue Takahashi , Hideyuki Yamamoto , Katsuya Watanabe
发明人： Hironobu Kawahara , Mitsuru Suehiro , Kazue Takahashi , Hideyuki Yamamoto , Katsuya Watanabe
IPC分类号： H01L213065
CPC分类号： H01L21/6719 , H01L21/67161 , H01L21/67196 , H01L21/67201 , H01L21/67207 , Y10S414/135 , Y10S414/139
摘要： The vacuum processing apparatus has an atmospheric loader having a plurality of cassette tables and a transport unit for carrying wafers, a vacuum loader equipped with vacuum wafer-processing chambers and a vacuum transport chamber communicating with the processing chambers via gate valves, and a locking unit provided with a loading lock chamber and unloading lock chambers that have gate valves for connecting the atmospheric transport unit and vacuum transport chamber; wherein two etching chambers, formed by UHF-ECR reactors, are arranged symmetrically with respect to an axial line passing through the middle of the vacuum transport chamber and locking unit, only at the opposite side of the locking unit across the vacuum transport chamber, and at an acute angle with respect to the vacuum transport chamber, and UHF-ECR antennas, almost parallel to the foregoing axial line, are opened at the opposite side to that of the vacuum transport chamber.

5. 发明申请

US20080023145A1 PLASMA PROCESSING APPARATUS AND METHOD 失效
标题翻译：等离子体加工设备和方法
公开(公告)号：US20080023145A1
公开(公告)日：2008-01-31
申请号：US11865836
申请日：2007-10-02
申请人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
发明人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
IPC分类号： H01L21/306
CPC分类号： H01J37/32192 , H01J37/321 , H01J37/32559 , H01J37/32623 , H01J37/32706
摘要： A plasma processing apparatus includes a high-frequency power source for applying bias power to an electrode on which a substrate is disposed, an insulating layer formed on a surface of the electrode, a conductive material buried within the insulating layer, a feeder line connecting the high-frequency power source and the conductive material, a variable capacitor provided in the feeder line, and a direct current power source connected to the electrode at a position between the electrode and the high-frequency power source. One portion of the insulating layer where the conductive material is buried formed on an outer part of the electrode has a thickness which is greater than a thickness of another portion of the insulating layer where the conducting material is not buried and which extends from a central part of the electrode to the one portion of the insulating layer.
摘要翻译：等离子体处理装置包括用于向其上设置基板的电极施加偏置功率的高频电源，形成在电极的表面上的绝缘层，埋在绝缘层内的导电材料，连接高频电源和导电材料，设置在馈电线路中的可变电容器，以及在电极和高频电源之间的位置处连接到电极的直流电源。绝缘层的绝缘层的一部分形成在电极的外部部分上，其厚度大于绝缘层的另一部分的厚度，其中导电材料不被埋入，并且其厚度从中心部分延伸的绝缘层的一部分。

6. 发明授权

US06759338B2 Plasma processing apparatus and method 失效
标题翻译：等离子体处理装置及方法
公开(公告)号：US06759338B2
公开(公告)日：2004-07-06
申请号：US09795487
申请日：2001-03-01
申请人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
发明人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
IPC分类号： H01L21302
CPC分类号： H01J37/32192 , H01J37/321 , H01J37/32559 , H01J37/32623 , H01J37/32706
摘要： A plasma processing apparatus and a plasma processing method for processing a wafer of a large diameter to produce a high speed semiconductor circuit at a high yield are provided. A thickness of an insulating film formed on a surface of an electrode opposing to a substrate to be processed is locally changed, an electrode is provided in the insulating film and a bypassed bias current is supplied to the electrode. An electrode is provided in an insulating film on a surface of the electrode opposing to a material adjacent to the substrate to be processed and a bypassed bias current is supplied to the electrode.
摘要翻译：提供了一种等离子体处理装置和等离子体处理方法，用于处理大直径的晶片以高产率生产高速半导体电路。在与被处理基板相对的电极的表面上形成的绝缘膜的厚度局部变化，在绝缘膜中设置电极，向电极提供旁路偏置电流。在电极的表面上设置有与被处理基板相邻的材料的绝缘膜上的电极，向电极供给旁路偏置电流。

7. 发明授权

US06649021B2 Apparatus and method for plasma processing high-speed semiconductor circuits with increased yield 失效
公开(公告)号：US06649021B2
公开(公告)日：2003-11-18
申请号：US09908844
申请日：2001-07-20
申请人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
发明人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
IPC分类号： H01L2100
CPC分类号： H01J37/32706
摘要： A plasma processing apparatus processes high-speed semiconductor circuits by using plasma with an increased yield. The plasma processing apparatus has a vacuum vessel including an exhaust device, a starting material gas supplying device, an electrode for installing a workpiece (wafer) and a device for applying radio frequency power to the wafer. This apparatus converts the starting material gas to plasma inside the vacuum vessel and plasma-processes a wafer surface, wherein an insulating film is interposed between the electrode for installing the wafer and the wafer and has a conductive material at a part thereof, and the conductive material is electrically grounded through an impedance regulating circuit.

8. 发明授权

US06558100B1 Vacuum processing apparatus and a vacuum processing system 失效
公开(公告)号：US06558100B1
公开(公告)日：2003-05-06
申请号：US09697324
申请日：2000-10-27
申请人： Hironobu Kawahara , Mitsuru Suehiro , Kazue Takahashi , Hideyuki Yamamoto , Katsuya Watanabe
发明人： Hironobu Kawahara , Mitsuru Suehiro , Kazue Takahashi , Hideyuki Yamamoto , Katsuya Watanabe
IPC分类号： H01L213065
CPC分类号： H01L21/6719 , H01L21/67161 , H01L21/67196 , H01L21/67201 , H01L21/67207 , Y10S414/135 , Y10S414/139
摘要： The vacuum processing apparatus has an atmospheric loader having a plurality of cassette tables and a transport unit for carrying wafers, a vacuum loader equipped with vacuum wafer-processing chambers and a vacuum transport chamber communicating with the processing chambers via gate valves, and a locking unit provided with a loading lock chamber and unloading lock chambers that have gate valves for connecting the atmospheric transport unit and vacuum transport chamber; wherein two etching chambers, formed by UHF-ECR reactors, are arranged symmetrically with respect to an axial line passing through the middle of the vacuum transport chamber and locking unit, only at the opposite side of the locking unit across the vacuum transport chamber, and at an acute angle with respect to the vacuum transport chamber, and UHF-ECR antennas, almost parallel to the foregoing axial line, are opened at the opposite side to that of the vacuum transport chamber.

9. 发明授权

US07608162B2 Plasma processing apparatus and method 失效
标题翻译：等离子体处理装置及方法
公开(公告)号：US07608162B2
公开(公告)日：2009-10-27
申请号：US11865836
申请日：2007-10-02
申请人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
发明人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306 , H01L21/683
CPC分类号： H01J37/32192 , H01J37/321 , H01J37/32559 , H01J37/32623 , H01J37/32706
摘要： A plasma processing apparatus includes a high-frequency power source for applying bias power to an electrode on which a substrate is disposed, an insulating layer formed on a surface of the electrode, a conductive material buried within the insulating layer, a feeder line connecting the high-frequency power source and the conductive material, a variable capacitor provided in the feeder line, and a direct current power source connected to the electrode at a position between the electrode and the high-frequency power source. One portion of the insulating layer where the conductive material is buried formed on an outer part of the electrode has a thickness which is greater than a thickness of another portion of the insulating layer where the conducting material is not buried and which extends from a central part of the electrode to the one portion of the insulating layer.
摘要翻译：等离子体处理装置包括用于向其上设置基板的电极施加偏置功率的高频电源，形成在电极的表面上的绝缘层，埋在绝缘层内的导电材料，连接高频电源和导电材料，设置在馈电线路中的可变电容器，以及在电极和高频电源之间的位置处连接到电极的直流电源。绝缘层的绝缘层的一部分形成在电极的外部部分上，其厚度大于绝缘层的另一部分的厚度，其中导电材料不被埋入，并且其厚度从中心部分延伸的绝缘层的一部分。

10. 发明授权

US07288166B2 Plasma processing apparatus 失效
标题翻译：等离子体处理装置
公开(公告)号：US07288166B2
公开(公告)日：2007-10-30
申请号：US10663646
申请日：2003-09-17
申请人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
发明人： Yutaka Ohmoto , Hironobu Kawahara , Ken Yoshioka , Kazue Takahashi , Saburou Kanai
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306
CPC分类号： H01J37/32192 , H01J37/321 , H01J37/32559 , H01J37/32623 , H01J37/32706
摘要： A plasma processing apparatus for manufacturing a semiconductor device includes an apparatus for applying bias powers to a substrate to be processed and a material adjacent to the substrate, an apparatus for adjusting a feeding impedance for the bias power applied to the material, and an apparatus for adjusting feeding impedances for the bias powers to a plurality of positions on the substrate so as to make electrons projected to the substrate from the plasma uniform within a surface of the substrate.
摘要翻译：一种用于制造半导体器件的等离子体处理设备包括：用于向待处理衬底施加偏压功率的设备和与衬底相邻的材料;用于调节施加到该材料上的偏置功率的馈电阻抗的设备;以及用于将所述偏置功率的馈送阻抗调整到所述衬底上的多个位置，以使得在所述衬底的表面内使等离子体投射到所述衬底的电子均匀。

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