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    • 2. 发明授权
    • Silver and silver alloy plating bath
    • 银和银合金电镀浴
    • US07628903B1
    • 2009-12-08
    • US09563479
    • 2000-05-02
    • Kiyotaka TsujiTetsuji NishikawaTakao TakeuchiKeigo ObataHidemi Nawafune
    • Kiyotaka TsujiTetsuji NishikawaTakao TakeuchiKeigo ObataHidemi Nawafune
    • C25D3/46C23C18/31
    • C25D3/46C25D3/64
    • A silver and silver alloy plating bath, includes (A) a soluble salt, having a silver salt or a mixture of a silver salt and a salt of a metal such as tin, bismuth, indium, lead, and the like; and (B) a particular aliphatic sulfide compound, such as thiobis(diethyleneglycol), dithiobis(triglycerol), 3,3′-thiodipropanol, thiodiglycerin, 3,6-dithiooctane-1,8-diol, and the like, which contain at least one or more of an ether oxygen atom, a 1-hydroxypropyl group, a hydroxypropylene group, or two or more of a sulfide bond in the molecule, and not containing a basic nitrogen atom. Compared to baths containing aliphatic monosulfide compounds, such as thiodiglycol or beta-thiodiglycol, which do not contain an ether oxygen atom, 1-hydroxypropyl group, a hydroxypropylene group, or two or more of a sulfide bond in the molecule, by having these particular compounds, the plating bath of the present invention has excellent stability over extended time, excellent co-deposition of silver and various metals, and excellent appearance of the electrodeposition coating.
    • 银和银合金电镀浴包括(A)可溶性盐,其具有银盐或银盐和金属如锡,铋,铟,铅等的盐的混合物; 和(B)特定的脂族硫醚化合物,例如硫代双(二甘醇),二硫代双(三甘油),3,3'-硫代二丙醇,硫二甘油,3,6-二硫辛烷-1,8-二醇等, 至少一个或多个醚氧原子,1-羟丙基,羟基亚丙基,或分子中的硫原子键中的两个或多个,并且不含碱性氮原子。 与分子中含有不含醚氧原子,1-羟丙基,羟基亚丙基或两个或多个硫键的脂族单硫醚化合物如硫二甘醇或β-硫二甘醇相比,具有这些特定 化合物,本发明的电镀浴在延长的时间内具有优异的稳定性,优异的银和各种金属的共沉积,以及优异的电沉积外观。
    • 6. 发明授权
    • Variable resistance element and nonvolatile semiconductor memory device using the same
    • 可变电阻元件和使用其的非易失性半导体存储器件
    • US08350245B2
    • 2013-01-08
    • US13133809
    • 2009-12-08
    • Kiyotaka Tsuji
    • Kiyotaka Tsuji
    • H01L29/02
    • H01L27/101H01L27/2436H01L27/2472H01L45/08H01L45/1233H01L45/146H01L45/1625H01L45/1675
    • To provide a variable resistance element capable of preventing the interface resistance, in a side of the variable resistance element in which resistance change is not allowed, from changing to high resistance due to applied voltage. The variable resistance element is configured by providing a variable resistance film (265) between a first electrode (280) and a second electrode (250), the oxygen concentration within the film of the variable resistance film (265) is high at the side of an interface with the second electrode (250) (high-concentration variable resistance layer (260)) and low at the side of an interface with the first electrode (280) (low-concentration variable resistance layer (270)), and the junction surface area between the low-concentration variable resistance layer (270) and the first electrode (280) is larger than the interface surface area between the high-concentration variable resistance layer (260) and the second electrode (250).
    • 为了提供一种可变电阻元件,能够防止在不允许电阻变化的可变电阻元件侧的界面电阻由于施加的电压而变为高电阻。 可变电阻元件通过在第一电极(280)和第二电极(250)之间设置可变电阻膜(265)而构成,可变电阻膜(265)的膜内的氧浓度在 与第二电极(250)(高浓度可变电阻层(260))的界面和与第一电极(280)的界面侧的低(低浓度可变电阻层(270))的界面, 低浓度可变电阻层(270)和第一电极(280)之间的表面积大于高浓度可变电阻层(260)和第二电极(250)之间的界面面积。
    • 7. 发明申请
    • VARIABLE RESISTANCE ELEMENT AND MANUFACTURING METHOD OF THE SAME
    • 可变电阻元件及其制造方法
    • US20110074539A1
    • 2011-03-31
    • US12994916
    • 2010-04-14
    • Kiyotaka Tsuji
    • Kiyotaka Tsuji
    • H01C7/10H01C17/00
    • H01L45/1246H01L27/101H01L45/08H01L45/1233H01L45/146H01L45/1625H01L45/1683Y10T29/49082
    • A variable resistance element capable of increasing stability of a resistance changing operation and reducing a current necessary for changing, to a low resistance state for the first time, the variable resistance element in an initial state immediately after manufacture. The variable resistance element includes: a first electrode (101); a memory cell hole (150) formed above the first electrode (101); a first variable resistance layer (201) covering a bottom of the memory cell hole (150) and an upper surface of the first electrode (101); a second variable resistance layer (202) formed on the first variable resistance layer (201); and a second electrode (102) formed on the memory cell hole (150), in which a thickness of the first variable resistance layer (201) at the bottom of the memory cell hole (150) gradually decreases toward an edge area of the memory cell hole (150) and has a local minimum value around the edge area of the memory cell hole (150). Furthermore, an oxygen concentration in the first variable resistance layer (201) is higher than an oxygen concentration in the second variable resistance layer (202).
    • 一种可变电阻元件,其能够增加电阻变化操作的稳定性,并且减少在制造后立即将初始状态中的可变电阻元件首次变为低电阻状态所需的电流。 可变电阻元件包括:第一电极(101); 形成在所述第一电极(101)上方的存储单元孔(150); 覆盖存储单元孔(150)底部的第一可变电阻层(201)和第一电极(101)的上表面; 形成在第一可变电阻层(201)上的第二可变电阻层(202); 以及形成在存储单元孔(150)上的第二电极(102),其中存储单元孔(150)底部的第一可变电阻层(201)的厚度朝向存储器的边缘区域逐渐减小 电池孔(150),并且在存储单元孔(150)的边缘区域周围具有局部最小值。 此外,第一可变电阻层(201)中的氧浓度高于第二可变电阻层(202)中的氧浓度。
    • 9. 发明申请
    • Magnetic memory, and its operating method
    • 磁记忆体及其操作方法
    • US20060056250A1
    • 2006-03-16
    • US10512545
    • 2003-04-21
    • Sadahiko MiuraTadahiko SugibayashiHideaki NumataKiyotaka Tsuji
    • Sadahiko MiuraTadahiko SugibayashiHideaki NumataKiyotaka Tsuji
    • G11C7/00
    • H01L27/228B82Y10/00G11C11/16
    • A technology for eliminating the defects in a tunnel insulation film of magnetic tunnel junction and for suppressing generation of a defective bit in an MRAM using magnetic tunnel junction in a memory. The magnetic memory includes a substrate, an interlayer insulation film covering the upper surface side of the substrate, memory cells, and plugs penetrating the interlayer insulation film. The memory cell includes a first magnetic layer formed on the upper surface side of the interlayer insulation film, a tunnel insulation layer formed on the first magnetic layer, and a second magnetic layer formed on the tunnel insulation layer. The plug is connected electrically with the first magnetic layer. The tunnel current passing part of the tunnel insulation layer located between the first and second magnetic layers is arranged, at least partially, so as not to overlap the plug in the direction perpendicular to the surface of the substrate.
    • 一种用于消除磁隧道结隧道绝缘膜中的缺陷并用于抑制在存储器中使用磁性隧道结的MRAM中的有缺陷位的产生的技术。 磁性存储器包括基板,覆盖基板的上表面侧的层间绝缘膜,存储单元和穿透层间绝缘膜的插塞。 存储单元包括形成在层间绝缘膜的上表面侧的第一磁性层,形成在第一磁性层上的隧道绝缘层和形成在隧道绝缘层上的第二磁性层。 插头与第一磁性层电连接。 位于第一和第二磁性层之间的隧道绝缘层的隧道电流通过部分被布置成至少部分地不与垂直于衬底的表面的方向上的插塞重叠。