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1. 发明申请

US20120032323A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120032323A1
公开(公告)日：2012-02-09
申请号：US13264120
申请日：2009-04-30
申请人： Masahiro Matsumoto , Masahiko Fujisawa , Akihiro Osaki , Atsushi Ishii
发明人： Masahiro Matsumoto , Masahiko Fujisawa , Akihiro Osaki , Atsushi Ishii
IPC分类号： H01L23/48 , H01L21/768 , H01L23/52 , H01L21/60
CPC分类号： H01L23/49503 , H01L21/76801 , H01L21/76807 , H01L21/76811 , H01L21/76832 , H01L23/3128 , H01L23/3192 , H01L23/5329 , H01L23/53295 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/97 , H01L2224/02126 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/1147 , H01L2224/13022 , H01L2224/13099 , H01L2224/16225 , H01L2224/32014 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/48465 , H01L2224/48599 , H01L2224/73204 , H01L2224/73253 , H01L2224/92 , H01L2224/92247 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01052 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/12041 , H01L2924/1306 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/16195 , H01L2924/181 , H01L2924/30105 , H01L2224/81 , H01L2224/83 , H01L2224/85 , H01L2924/00 , H01L2224/05556 , H01L2924/3512 , H01L2924/00012 , H01L2924/01004
摘要： A preferred aim of the invention is to provide technique for improving reliability of semiconductor devices when using a low-dielectric-constant film having a lower dielectric constant than a silicon oxide film to a part of an interlayer insulating film. More specifically, to achieve the preferred aim, an interlayer insulating film IL1 forming a first fine layer is formed of a middle-Young's-modulus film, and thus it is possible to separate an integrated high-Young's-modulus layer (a semiconductor substrate 1S and a contact interlayer insulating film CIL) and an interlayer insulating film (a low-Young's-modulus film; a low-dielectric-constant film) IL2 forming a second fine layer not to let them directly contact with each other, and stress can be diverged. As a result, film exfoliation of the interlayer insulating film IL2 formed of a low-Young's-modulus film can be prevented and thus reliability of semiconductor devices can be improved.
摘要翻译：本发明的一个优选目的是提供一种技术，当使用具有比氧化硅膜低的介电常数的低介电常数膜与层间绝缘膜的一部分时，提高半导体器件的可靠性。更具体地，为了实现优选目的，形成第一微细层的层间绝缘膜IL1由中等杨氏模量膜形成，因此可以将集成的高杨氏模量层（半导体基板1S 和接触层间绝缘膜CIL）和形成第二细层的层间绝缘膜（低杨氏模量膜;低介电常数膜）IL2，不使它们彼此直接接触，应力可以是分歧结果，可以防止由低杨氏模量膜形成的层间绝缘膜IL2的膜剥离，从而可以提高半导体器件的可靠性。

2. 发明授权

US5565708A Semiconductor device comprising composite barrier layer 失效
标题翻译：包括复合阻挡层的半导体器件
公开(公告)号：US5565708A
公开(公告)日：1996-10-15
申请号：US440808
申请日：1995-05-15
申请人： Akihiko Ohsaki , Sumio Yamaguchi , Atsushi Ishii , Kazuyoshi Maekawa , Masahiko Fujisawa
发明人： Akihiko Ohsaki , Sumio Yamaguchi , Atsushi Ishii , Kazuyoshi Maekawa , Masahiko Fujisawa
IPC分类号： H01L21/28 , C23C14/06 , C23C14/18 , C23C14/58 , H01L21/203 , H01L21/205 , H01L21/285 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L23/48 , H01L29/46 , H01L29/54 , H01L29/62
CPC分类号： C23C14/5806 , C23C14/0641 , C23C14/185 , H01L21/28518 , H01L21/76843 , H01L21/76846 , H01L21/76855 , H01L21/76856 , H01L23/485 , H01L23/53257 , H01L2924/0002 , Y10S257/915
摘要： A semiconductor device comprising conductors electrically connected through a contact hole interlayer insulation layer with a trilayer barrier layer comprising a titanium silicide layer, titanium silicide layer formed on the titanium silicide by collimation sputtering, and a thermally nitrided titanium formed on the titanium nitride layer. The use of a trilayer barrier layer enables through the capacity of the collimation sputtering apparatus to be increased, prevents particles from occurring, and formation of a low resistance electrical connection between conductors, in addition to preventing diffusion from the titanium nitride layer and the second titanium layer to the thermally nitrided titanium layer, and between conductors.
摘要翻译：一种半导体器件，包括通过接触孔层间绝缘层与通过准直溅射形成在硅化钛上的钛硅化物层，硅化钛层和形成在氮化钛层上的热氮化钛的三层势垒层电连接的导体。除了防止从氮化钛层和第二钛的扩散之外，使用三层阻挡层能够增加准直溅射装置的容量，防止颗粒发生，以及形成导体之间的低电阻电连接层到热氮化钛层和导体之间。

3. 发明授权

US08829679B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08829679B2
公开(公告)日：2014-09-09
申请号：US13534844
申请日：2012-06-27
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L23/48
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

4. 发明申请

US20120267793A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120267793A1
公开(公告)日：2012-10-25
申请号：US13534844
申请日：2012-06-27
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L23/498
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

5. 发明授权

US07998839B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07998839B2
公开(公告)日：2011-08-16
申请号：US12821703
申请日：2010-06-23
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L21/46
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

6. 发明授权

US07759798B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07759798B2
公开(公告)日：2010-07-20
申请号：US12426588
申请日：2009-04-20
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L27/10 , H01L29/74
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

7. 发明授权

US08232650B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08232650B2
公开(公告)日：2012-07-31
申请号：US13180202
申请日：2011-07-11
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L23/48
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

8. 发明申请

US20100261334A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100261334A1
公开(公告)日：2010-10-14
申请号：US12821703
申请日：2010-06-23
申请人： Hiroyuki CHIBAHARA , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki CHIBAHARA , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L21/304
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

9. 发明申请

US20090294912A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090294912A1
公开(公告)日：2009-12-03
申请号：US12426588
申请日：2009-04-20
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L23/02 , H01L21/304
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

10. 发明申请

US20110266657A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110266657A1
公开(公告)日：2011-11-03
申请号：US13180202
申请日：2011-07-11
申请人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
发明人： Hiroyuki Chibahara , Atsushi Ishii , Naoki Izumi , Masahiro Matsumoto
IPC分类号： H01L23/02
CPC分类号： H01L23/02 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
摘要翻译：提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置，以及半导体装置的制造方法。第一层压板包括具有第一机械强度的第一层间绝缘膜。第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。第一区域包括设置在第一层压体内的第一金属层和通孔。第二区域包括设置在第二层压体内的第二金属层和通孔。当在平面图中看到时，第二区域与第一区域的至少一部分重叠，不通过通孔与第一区域耦合，并且在其与第一区域之间夹住第二层间电介质膜。

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